ad9434_fmc: Fix GPIO width

GPIO port width is 15 instead of 32
main
Istvan Csomortani 2014-10-17 15:43:00 +03:00
parent 7f8270d74b
commit 0c56e5b912
2 changed files with 8 additions and 3 deletions

View File

@ -52,6 +52,11 @@ set_property -dict [list CONFIG.PCW_EN_RST2_PORT {1}] $sys_ps7
set_property -dict [list CONFIG.PCW_FPGA2_PERIPHERAL_FREQMHZ {200.0}] $sys_ps7 set_property -dict [list CONFIG.PCW_FPGA2_PERIPHERAL_FREQMHZ {200.0}] $sys_ps7
set_property -dict [list CONFIG.PCW_SPI0_PERIPHERAL_ENABLE {1}] $sys_ps7 set_property -dict [list CONFIG.PCW_SPI0_PERIPHERAL_ENABLE {1}] $sys_ps7
set_property -dict [list CONFIG.PCW_SPI0_SPI0_IO {EMIO}] $sys_ps7 set_property -dict [list CONFIG.PCW_SPI0_SPI0_IO {EMIO}] $sys_ps7
set_property -dict [list CONFIG.PCW_GPIO_EMIO_GPIO_IO {15}] $sys_ps7
set_property LEFT 14 [get_bd_ports GPIO_I]
set_property LEFT 14 [get_bd_ports GPIO_O]
set_property LEFT 14 [get_bd_ports GPIO_T]
# spi connections # spi connections

View File

@ -139,9 +139,9 @@ module system_top (
// internal signals // internal signals
wire [31:0] gpio_i; wire [14:0] gpio_i;
wire [31:0] gpio_o; wire [14:0] gpio_o;
wire [31:0] gpio_t; wire [14:0] gpio_t;
wire spi_miso; wire spi_miso;
wire spi_mosi; wire spi_mosi;