From 0eaa98370e442fe73dbb7fdd7ddbe934d18bc575 Mon Sep 17 00:00:00 2001 From: Rejeesh Kutty Date: Fri, 19 May 2017 15:22:33 -0400 Subject: [PATCH] fmcadc2/vc707- spi clock reg can't be on iob --- projects/fmcadc2/vc707/system_constr.xdc | 1 + 1 file changed, 1 insertion(+) diff --git a/projects/fmcadc2/vc707/system_constr.xdc b/projects/fmcadc2/vc707/system_constr.xdc index 866c24a69..2de57cd6f 100644 --- a/projects/fmcadc2/vc707/system_constr.xdc +++ b/projects/fmcadc2/vc707/system_constr.xdc @@ -41,6 +41,7 @@ create_clock -name rx_ref_clk -period 1.60 [get_ports rx_ref_clk_p] create_clock -name rx_div_clk -period 6.40 [get_pins i_system_wrapper/system_i/util_fmcadc2_xcvr/inst/i_xch_0/i_gtxe2_channel/RXOUTCLK] set_false_path -from [get_cells i_system_wrapper/system_i/axi_ad9625_jesd_rstgen/U0/PR_OUT_DFF[0].peripheral_reset_reg[0]] +set_property IOB false [get_cells -hierarchical -filter {name =~ *SCK_O_NE_4_FDRE_INST}] set_property ASYNC_REG TRUE [get_cells -hier -filter {name =~ *sysref_en_m*}] set_false_path -to [get_cells -hier -filter {name =~ *sysref_en_m1* && IS_SEQUENTIAL}]