axi_dmac: Fixed constraints for axi_dmac core
parent
17675863e0
commit
121a416916
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@ -0,0 +1,24 @@
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if { [get_clocks -quiet -of_objects [get_ports s_axi_aclk]] != ""} {
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set_clock_groups -asynchronous -group [get_clocks -of_objects [get_ports s_axi_aclk]]
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}
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if { [get_clocks -quiet -of_objects [get_ports m_dest_axi_aclk]] != ""} {
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set_clock_groups -asynchronous -group [get_clocks -of_objects [get_ports m_dest_axi_aclk]]
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}
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if { [get_clocks -quiet -of_objects [get_ports m_src_axi_aclk]] != ""} {
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set_clock_groups -asynchronous -group [get_clocks -of_objects [get_ports m_src_axi_aclk]]
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}
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if { [get_clocks -quiet -of_objects [get_ports s_axis_aclk]] != ""} {
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set_clock_groups -asynchronous -group [get_clocks -of_objects [get_ports s_axis_aclk]]
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}
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if { [get_clocks -quiet -of_objects [get_ports m_axis_aclk]] != ""} {
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set_clock_groups -asynchronous -group [get_clocks -of_objects [get_ports m_axis_aclk]]
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}
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if { [get_clocks -quiet -of_objects [get_ports fifo_rd_clk]] != ""} {
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set_clock_groups -asynchronous -group [get_clocks -of_objects [get_ports fifo_rd_clk]]
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}
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@ -1,4 +0,0 @@
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@ -29,11 +29,11 @@ adi_ip_files axi_dmac [list \
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"response_generator.v" \
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"axi_dmac.v" \
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"axi_repack.v" \
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"axi_dmac_constr.xdc" ]
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"axi_dmac_constr.tcl" ]
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adi_ip_properties axi_dmac
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adi_ip_constraints axi_dmac [list \
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"axi_dmac_constr.xdc" ]
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"axi_dmac_constr.tcl" ]
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set_property physical_name {s_axi_aclk} [ipx::get_port_map CLK \
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[ipx::get_bus_interface s_axi_signal_clock [ipx::current_core]]]
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