axi_spdif_rx: Fixed version register issue. Added sampled_data to sensitivity list
parent
8875c5bef3
commit
121b341b45
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@ -411,7 +411,6 @@ begin
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begin
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begin
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if rising_edge(S_AXI_ACLK) then
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if rising_edge(S_AXI_ACLK) then
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if S_AXI_ARESETN = '0' then
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if S_AXI_ARESETN = '0' then
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version_reg <= (others => '0');
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control_reg <= (others => '0');
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control_reg <= (others => '0');
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else
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else
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if wr_stb = '1' then
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if wr_stb = '1' then
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@ -424,7 +423,7 @@ begin
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end if;
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end if;
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end process;
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end process;
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process (rd_addr, version_reg, control_reg, chstatus_reg)
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process (rd_addr, version_reg, control_reg, chstatus_reg, sampled_data)
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begin
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begin
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case rd_addr is
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case rd_addr is
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when 0 => rd_data <= version_reg;
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when 0 => rd_data <= version_reg;
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