axi_spdif_rx: Fixed version register issue. Added sampled_data to sensitivity list

main
Adrian Costina 2016-10-10 17:30:13 +03:00
parent 8875c5bef3
commit 121b341b45
1 changed files with 1 additions and 2 deletions

View File

@ -411,7 +411,6 @@ begin
begin begin
if rising_edge(S_AXI_ACLK) then if rising_edge(S_AXI_ACLK) then
if S_AXI_ARESETN = '0' then if S_AXI_ARESETN = '0' then
version_reg <= (others => '0');
control_reg <= (others => '0'); control_reg <= (others => '0');
else else
if wr_stb = '1' then if wr_stb = '1' then
@ -424,7 +423,7 @@ begin
end if; end if;
end process; end process;
process (rd_addr, version_reg, control_reg, chstatus_reg) process (rd_addr, version_reg, control_reg, chstatus_reg, sampled_data)
begin begin
case rd_addr is case rd_addr is
when 0 => rd_data <= version_reg; when 0 => rd_data <= version_reg;