ad9643- iqcor iqsel changes
parent
649297a0e3
commit
144b8f7383
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@ -34,8 +34,6 @@
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// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// ***************************************************************************
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// ***************************************************************************
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// ***************************************************************************
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// ***************************************************************************
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// ADC channel-
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`timescale 1ns/100ps
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@ -111,8 +109,7 @@ module axi_ad9643_channel (
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// internal signals
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wire [15:0] adc_dfmt_data_s;
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wire [15:0] adc_dcfilter_data_i_s;
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wire [15:0] adc_dcfilter_data_q_s;
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wire [15:0] adc_dcfilter_data_s;
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wire adc_iqcor_enb_s;
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wire adc_dcfilt_enb_s;
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wire adc_dfmt_se_s;
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@ -128,9 +125,6 @@ module axi_ad9643_channel (
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// iq correction inputs
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assign adc_dcfilter_data_i_s = (IQSEL == 1) ? adc_dcfilter_data_in : adc_dcfilter_data_out;
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assign adc_dcfilter_data_q_s = (IQSEL == 1) ? adc_dcfilter_data_out : adc_dcfilter_data_in;
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axi_ad9643_pnmon i_pnmon (
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.adc_clk (adc_clk),
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.adc_data (adc_data),
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@ -163,22 +157,24 @@ module axi_ad9643_channel (
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.valid (1'b1),
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.data (adc_dfmt_data_s),
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.valid_out (),
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.data_out (adc_dcfilter_data_out),
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.data_out (adc_dcfilter_data_s),
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.dcfilt_enb (adc_dcfilt_enb_s),
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.dcfilt_coeff (adc_dcfilt_coeff_s),
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.dcfilt_offset (adc_dcfilt_offset_s));
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end
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endgenerate
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assign adc_dcfilter_data_out = adc_dcfilter_data_s;
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generate
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if (DP_DISABLE == 1) begin
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assign adc_iqcor_data = (IQSEL == 1) ? adc_dcfilter_data_q_s : adc_dcfilter_data_i_s;
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assign adc_iqcor_data = adc_dcfilter_data_s;
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end else begin
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ad_iqcor #(.IQSEL(IQSEL)) i_ad_iqcor (
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.clk (adc_clk),
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.valid (1'b1),
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.data_i (adc_dcfilter_data_i_s),
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.data_q (adc_dcfilter_data_q_s),
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.data_in (adc_dcfilter_data_s),
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.data_iq (adc_dcfilter_data_in),
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.valid_out (),
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.data_out (adc_iqcor_data),
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.iqcor_enable (adc_iqcor_enb_s),
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