From 16db5836430285cc61bcebf2244a73203ae85371 Mon Sep 17 00:00:00 2001 From: Vilmos-Csaba Jozsa <138444259+Villyam@users.noreply.github.com> Date: Wed, 18 Oct 2023 10:28:11 +0300 Subject: [PATCH] FMC pinout configurations for AD4630. (#1193) * projects/ad4630_fmc: Added ad4630_fmc.txt FMC conf file and pinout comments for .xdc files. Signed-off-by: Villyam --- projects/ad4630_fmc/common/ad4630_fmc.txt | 20 +++++++++++++++++++ projects/ad4630_fmc/zed/system_constr.xdc | 16 +++++++-------- .../ad4630_fmc/zed/system_constr_4sdi.xdc | 8 ++++---- 3 files changed, 32 insertions(+), 12 deletions(-) create mode 100644 projects/ad4630_fmc/common/ad4630_fmc.txt diff --git a/projects/ad4630_fmc/common/ad4630_fmc.txt b/projects/ad4630_fmc/common/ad4630_fmc.txt new file mode 100644 index 000000000..20ff30789 --- /dev/null +++ b/projects/ad4630_fmc/common/ad4630_fmc.txt @@ -0,0 +1,20 @@ +# ad4630 + +FMC_pin FMC_port Schematic_name System_top_name IOSTANDARD Termination + +G6 LA00_P_CC SCK_FMC ad463x_spi_sclk LVCMOS25 #N/A +G7 LA00_N_CC CS_FMC ad463x_spi_cs LVCMOS25 #N/A +G9 LA03_P SDO2_FMC ad463x_spi_sdi[2] LVCMOS25 #N/A +G10 LA03_N SDO3_FMC ad463x_spi_sdi[3] LVCMOS25 #N/A +H4 CLK0_M2C_P CLK ad463x_ext_clk LVCMOS25 #N/A +H7 LA02_P SDO0_FMC ad463x_spi_sdi[0] LVCMOS25 #N/A +H8 LA02_N SDO1_FMC ad463x_spi_sdi[1] LVCMOS25 #N/A +H10 LA04_P SDO4_FMC ad463x_spi_sdi[4] LVCMOS25 #N/A +H11 LA04_N SDO5_FMC ad463x_spi_sdi[5] LVCMOS25 #N/A +D8 LA01_P_CC CNV_FMC ad463x_cnv LVCMOS25 #N/A +D9 LA01_N_CC RESET_FMC ad463x_resetn LVCMOS25 #N/A +D11 LA05_P SDO6_FMC ad463x_spi_sdi[6] LVCMOS25 #N/A +D12 LA05_N SDO7_FMC ad463x_spi_sdi[7] LVCMOS25 #N/A +D20 LA17_P_CC SCK_OUT_FMC ad463x_echo_sclk LVCMOS25 #N/A +C11 LA06_N SDI_FMC ad463x_spi_sdo LVCMOS25 #N/A +C22 LA18_P_CC BUSY_FMC ad463x_busy LVCMOS25 #N/A diff --git a/projects/ad4630_fmc/zed/system_constr.xdc b/projects/ad4630_fmc/zed/system_constr.xdc index 1550d9353..9f5d3eb4e 100644 --- a/projects/ad4630_fmc/zed/system_constr.xdc +++ b/projects/ad4630_fmc/zed/system_constr.xdc @@ -4,15 +4,15 @@ ############################################################################### # ad463x_fmc SPI interface -set_property -dict {PACKAGE_PIN L22 IOSTANDARD LVCMOS25 IOB TRUE} [get_ports ad463x_spi_sdo] -set_property -dict {PACKAGE_PIN M19 IOSTANDARD LVCMOS25 IOB TRUE} [get_ports ad463x_spi_sclk] -set_property -dict {PACKAGE_PIN M20 IOSTANDARD LVCMOS25} [get_ports ad463x_spi_cs] +set_property -dict {PACKAGE_PIN L22 IOSTANDARD LVCMOS25 IOB TRUE} [get_ports ad463x_spi_sdo] ; ## C11 FMC_LA06_N +set_property -dict {PACKAGE_PIN M19 IOSTANDARD LVCMOS25 IOB TRUE} [get_ports ad463x_spi_sclk] ; ## G6 FMC_LA00_CC_P +set_property -dict {PACKAGE_PIN M20 IOSTANDARD LVCMOS25} [get_ports ad463x_spi_cs] ; ## G7 FMC_LA00_CC_N -set_property -dict {PACKAGE_PIN B19 IOSTANDARD LVCMOS25} [get_ports ad463x_echo_sclk] -set_property -dict {PACKAGE_PIN N20 IOSTANDARD LVCMOS25} [get_ports ad463x_resetn] -set_property -dict {PACKAGE_PIN D20 IOSTANDARD LVCMOS25} [get_ports ad463x_busy] -set_property -dict {PACKAGE_PIN N19 IOSTANDARD LVCMOS25} [get_ports ad463x_cnv] -set_property -dict {PACKAGE_PIN L18 IOSTANDARD LVCMOS25} [get_ports ad463x_ext_clk] +set_property -dict {PACKAGE_PIN B19 IOSTANDARD LVCMOS25} [get_ports ad463x_echo_sclk] ; ## D20 FMC_LA17_CC_P +set_property -dict {PACKAGE_PIN N20 IOSTANDARD LVCMOS25} [get_ports ad463x_resetn] ; ## D9 FMC_LA01_CC_N +set_property -dict {PACKAGE_PIN D20 IOSTANDARD LVCMOS25} [get_ports ad463x_busy] ; ## C22 FMC_LA18_CC_P +set_property -dict {PACKAGE_PIN N19 IOSTANDARD LVCMOS25} [get_ports ad463x_cnv] ; ## D8 FMC_LA01_CC_P +set_property -dict {PACKAGE_PIN L18 IOSTANDARD LVCMOS25} [get_ports ad463x_ext_clk] ; ## H4 FMC_CLK0_P # external clock, that drives the CNV generator, must have a maximum 100 MHz frequency create_clock -period 10.000 -name cnv_ext_clk [get_ports ad463x_ext_clk] diff --git a/projects/ad4630_fmc/zed/system_constr_4sdi.xdc b/projects/ad4630_fmc/zed/system_constr_4sdi.xdc index 3d6545447..0aca6b40e 100644 --- a/projects/ad4630_fmc/zed/system_constr_4sdi.xdc +++ b/projects/ad4630_fmc/zed/system_constr_4sdi.xdc @@ -3,10 +3,10 @@ ### SPDX short identifier: ADIBSD ############################################################################### -set_property -dict {PACKAGE_PIN P17 IOSTANDARD LVCMOS25} [get_ports {ad463x_spi_sdi[0]}] -set_property -dict {PACKAGE_PIN P18 IOSTANDARD LVCMOS25} [get_ports {ad463x_spi_sdi[1]}] -set_property -dict {PACKAGE_PIN M21 IOSTANDARD LVCMOS25} [get_ports {ad463x_spi_sdi[2]}] -set_property -dict {PACKAGE_PIN M22 IOSTANDARD LVCMOS25} [get_ports {ad463x_spi_sdi[3]}] +set_property -dict {PACKAGE_PIN P17 IOSTANDARD LVCMOS25} [get_ports {ad463x_spi_sdi[0]}] ; ## H07 FMC_LA02_P +set_property -dict {PACKAGE_PIN P18 IOSTANDARD LVCMOS25} [get_ports {ad463x_spi_sdi[1]}] ; ## H08 FMC_LA02_N +set_property -dict {PACKAGE_PIN M21 IOSTANDARD LVCMOS25} [get_ports {ad463x_spi_sdi[2]}] ; ## H10 FMC_LA04_P +set_property -dict {PACKAGE_PIN M22 IOSTANDARD LVCMOS25} [get_ports {ad463x_spi_sdi[3]}] ; ## H11 FMC_LA04_N # input delays for MISO lines (SDO for the device) # data is latched on negative edge