avl_dacfifo: Fix the loopback of avl_xfer_req

When the read FSM is not in a burst, the incomming avl_xfer_req can be
looped back to the write module.
main
Istvan Csomortani 2017-11-02 12:02:54 +00:00
parent 610a237730
commit 17c749962c
1 changed files with 12 additions and 6 deletions

View File

@ -182,7 +182,9 @@ module avl_dacfifo_rd #(
if (avl_reset == 1'b1) begin if (avl_reset == 1'b1) begin
avl_xfer_req_out <= 1'b0; avl_xfer_req_out <= 1'b0;
end else begin end else begin
if ((avl_read_state == IDLE) || (avl_read_state == XFER_STAGING)) begin if ((avl_read_state == IDLE) ||
(avl_read_state == XFER_STAGING) ||
(avl_read_state == XFER_END)) begin
avl_xfer_req_out <= avl_xfer_req_in; avl_xfer_req_out <= avl_xfer_req_in;
end end
end end
@ -203,12 +205,16 @@ module avl_dacfifo_rd #(
end end
end end
XFER_STAGING : begin XFER_STAGING : begin
if (avl_mem_request_data == 1'b1) begin if (avl_xfer_req_in == 1'b1) begin
if (avl_address + AVL_ARINCR <= avl_last_address) begin if (avl_mem_request_data == 1'b1) begin
avl_read_state <= XFER_FULL_BURST; if (avl_address + AVL_ARINCR <= avl_last_address) begin
end else begin avl_read_state <= XFER_FULL_BURST;
avl_read_state <= XFER_PARTIAL_BURST; end else begin
avl_read_state <= XFER_PARTIAL_BURST;
end
end end
end else begin
avl_read_state <= IDLE;
end end
end end
// Avalon transaction with full burst length // Avalon transaction with full burst length