From 1b3fcb586397790000dd0f4b567a455e8c671e7e Mon Sep 17 00:00:00 2001 From: Rejeesh Kutty Date: Mon, 17 Oct 2016 16:10:48 -0400 Subject: [PATCH] util_adxcvr- parameter defaults --- library/xilinx/util_adxcvr/util_adxcvr.v | 179 ++--- library/xilinx/util_adxcvr/util_adxcvr_xch.v | 673 +++++++++---------- library/xilinx/util_adxcvr/util_adxcvr_xcm.v | 66 +- 3 files changed, 462 insertions(+), 456 deletions(-) diff --git a/library/xilinx/util_adxcvr/util_adxcvr.v b/library/xilinx/util_adxcvr/util_adxcvr.v index a847e3ea6..43e0aafa3 100644 --- a/library/xilinx/util_adxcvr/util_adxcvr.v +++ b/library/xilinx/util_adxcvr/util_adxcvr.v @@ -40,23 +40,36 @@ module util_adxcvr #( - // parameters + // gtxe2(0), gthe3(1), gthe4(2) - parameter integer RX_NUM_OF_LANES = 8, - parameter integer TX_NUM_OF_LANES = 8, parameter integer XCVR_TYPE = 0, - parameter integer CPLL_TX_OR_RX_N = 0, - parameter integer CPLL_FBDIV = 2, + + // qpll-configuration + parameter integer QPLL_REFCLK_DIV = 1, parameter integer QPLL_FBDIV_RATIO = 1, - parameter integer RX_OUT_DIV = 1, - parameter integer RX_CLK25_DIV = 20, + parameter [26:0] QPLL_CFG = 27'h0680181, + parameter [ 9:0] QPLL_FBDIV = 10'b0000110000, + + // cpll-configuration + + parameter integer CPLL_FBDIV = 2, + parameter integer CPLL_FBDIV_4_5 = 5, + parameter integer CPLL_TX_OR_RX_N = 0, + + // tx-configuration + + parameter integer TX_NUM_OF_LANES = 8, parameter integer TX_OUT_DIV = 1, parameter integer TX_CLK25_DIV = 20, - parameter [31:0] PMA_RSV = 32'h001e7080, - parameter [72:0] RX_CDR_CFG = 72'h0b000023ff10400020, - parameter [26:0] QPLL_CFG = 27'h0680181, - parameter [ 9:0] QPLL_FBDIV = 10'b0000110000) ( + + // rx-configuration + + parameter integer RX_NUM_OF_LANES = 8, + parameter integer RX_OUT_DIV = 1, + parameter integer RX_CLK25_DIV = 20, + parameter [31:0] RX_PMA_CFG = 32'h001e7080, + parameter [72:0] RX_CDR_CFG = 72'h0b000023ff10400020) ( input up_rstn, input up_clk, @@ -1108,13 +1121,14 @@ module util_adxcvr #( util_adxcvr_xch #( .XCVR_ID (0), .XCVR_TYPE (XCVR_TYPE), - .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .CPLL_FBDIV (CPLL_FBDIV), - .RX_OUT_DIV (RX_OUT_DIV), - .RX_CLK25_DIV (RX_CLK25_DIV), + .CPLL_FBDIV_4_5 (CPLL_FBDIV_4_5), + .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .TX_OUT_DIV (TX_OUT_DIV), .TX_CLK25_DIV (TX_CLK25_DIV), - .PMA_RSV (PMA_RSV), + .RX_OUT_DIV (RX_OUT_DIV), + .RX_CLK25_DIV (RX_CLK25_DIV), + .RX_PMA_CFG (RX_PMA_CFG), .RX_CDR_CFG (RX_CDR_CFG)) i_xch_0 ( .qpll2ch_clk (qpll2ch_clk_0), @@ -1205,13 +1219,14 @@ module util_adxcvr #( util_adxcvr_xch #( .XCVR_ID (1), .XCVR_TYPE (XCVR_TYPE), - .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .CPLL_FBDIV (CPLL_FBDIV), - .RX_OUT_DIV (RX_OUT_DIV), - .RX_CLK25_DIV (RX_CLK25_DIV), + .CPLL_FBDIV_4_5 (CPLL_FBDIV_4_5), + .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .TX_OUT_DIV (TX_OUT_DIV), .TX_CLK25_DIV (TX_CLK25_DIV), - .PMA_RSV (PMA_RSV), + .RX_OUT_DIV (RX_OUT_DIV), + .RX_CLK25_DIV (RX_CLK25_DIV), + .RX_PMA_CFG (RX_PMA_CFG), .RX_CDR_CFG (RX_CDR_CFG)) i_xch_1 ( .qpll2ch_clk (qpll2ch_clk_0), @@ -1302,13 +1317,14 @@ module util_adxcvr #( util_adxcvr_xch #( .XCVR_ID (2), .XCVR_TYPE (XCVR_TYPE), - .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .CPLL_FBDIV (CPLL_FBDIV), - .RX_OUT_DIV (RX_OUT_DIV), - .RX_CLK25_DIV (RX_CLK25_DIV), + .CPLL_FBDIV_4_5 (CPLL_FBDIV_4_5), + .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .TX_OUT_DIV (TX_OUT_DIV), .TX_CLK25_DIV (TX_CLK25_DIV), - .PMA_RSV (PMA_RSV), + .RX_OUT_DIV (RX_OUT_DIV), + .RX_CLK25_DIV (RX_CLK25_DIV), + .RX_PMA_CFG (RX_PMA_CFG), .RX_CDR_CFG (RX_CDR_CFG)) i_xch_2 ( .qpll2ch_clk (qpll2ch_clk_0), @@ -1399,13 +1415,14 @@ module util_adxcvr #( util_adxcvr_xch #( .XCVR_ID (3), .XCVR_TYPE (XCVR_TYPE), - .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .CPLL_FBDIV (CPLL_FBDIV), - .RX_OUT_DIV (RX_OUT_DIV), - .RX_CLK25_DIV (RX_CLK25_DIV), + .CPLL_FBDIV_4_5 (CPLL_FBDIV_4_5), + .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .TX_OUT_DIV (TX_OUT_DIV), .TX_CLK25_DIV (TX_CLK25_DIV), - .PMA_RSV (PMA_RSV), + .RX_OUT_DIV (RX_OUT_DIV), + .RX_CLK25_DIV (RX_CLK25_DIV), + .RX_PMA_CFG (RX_PMA_CFG), .RX_CDR_CFG (RX_CDR_CFG)) i_xch_3 ( .qpll2ch_clk (qpll2ch_clk_0), @@ -1528,13 +1545,14 @@ module util_adxcvr #( util_adxcvr_xch #( .XCVR_ID (4), .XCVR_TYPE (XCVR_TYPE), - .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .CPLL_FBDIV (CPLL_FBDIV), - .RX_OUT_DIV (RX_OUT_DIV), - .RX_CLK25_DIV (RX_CLK25_DIV), + .CPLL_FBDIV_4_5 (CPLL_FBDIV_4_5), + .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .TX_OUT_DIV (TX_OUT_DIV), .TX_CLK25_DIV (TX_CLK25_DIV), - .PMA_RSV (PMA_RSV), + .RX_OUT_DIV (RX_OUT_DIV), + .RX_CLK25_DIV (RX_CLK25_DIV), + .RX_PMA_CFG (RX_PMA_CFG), .RX_CDR_CFG (RX_CDR_CFG)) i_xch_4 ( .qpll2ch_clk (qpll2ch_clk_4), @@ -1625,13 +1643,14 @@ module util_adxcvr #( util_adxcvr_xch #( .XCVR_ID (5), .XCVR_TYPE (XCVR_TYPE), - .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .CPLL_FBDIV (CPLL_FBDIV), - .RX_OUT_DIV (RX_OUT_DIV), - .RX_CLK25_DIV (RX_CLK25_DIV), + .CPLL_FBDIV_4_5 (CPLL_FBDIV_4_5), + .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .TX_OUT_DIV (TX_OUT_DIV), .TX_CLK25_DIV (TX_CLK25_DIV), - .PMA_RSV (PMA_RSV), + .RX_OUT_DIV (RX_OUT_DIV), + .RX_CLK25_DIV (RX_CLK25_DIV), + .RX_PMA_CFG (RX_PMA_CFG), .RX_CDR_CFG (RX_CDR_CFG)) i_xch_5 ( .qpll2ch_clk (qpll2ch_clk_4), @@ -1722,13 +1741,14 @@ module util_adxcvr #( util_adxcvr_xch #( .XCVR_ID (6), .XCVR_TYPE (XCVR_TYPE), - .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .CPLL_FBDIV (CPLL_FBDIV), - .RX_OUT_DIV (RX_OUT_DIV), - .RX_CLK25_DIV (RX_CLK25_DIV), + .CPLL_FBDIV_4_5 (CPLL_FBDIV_4_5), + .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .TX_OUT_DIV (TX_OUT_DIV), .TX_CLK25_DIV (TX_CLK25_DIV), - .PMA_RSV (PMA_RSV), + .RX_OUT_DIV (RX_OUT_DIV), + .RX_CLK25_DIV (RX_CLK25_DIV), + .RX_PMA_CFG (RX_PMA_CFG), .RX_CDR_CFG (RX_CDR_CFG)) i_xch_6 ( .qpll2ch_clk (qpll2ch_clk_4), @@ -1819,13 +1839,14 @@ module util_adxcvr #( util_adxcvr_xch #( .XCVR_ID (7), .XCVR_TYPE (XCVR_TYPE), - .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .CPLL_FBDIV (CPLL_FBDIV), - .RX_OUT_DIV (RX_OUT_DIV), - .RX_CLK25_DIV (RX_CLK25_DIV), + .CPLL_FBDIV_4_5 (CPLL_FBDIV_4_5), + .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .TX_OUT_DIV (TX_OUT_DIV), .TX_CLK25_DIV (TX_CLK25_DIV), - .PMA_RSV (PMA_RSV), + .RX_OUT_DIV (RX_OUT_DIV), + .RX_CLK25_DIV (RX_CLK25_DIV), + .RX_PMA_CFG (RX_PMA_CFG), .RX_CDR_CFG (RX_CDR_CFG)) i_xch_7 ( .qpll2ch_clk (qpll2ch_clk_4), @@ -1948,13 +1969,14 @@ module util_adxcvr #( util_adxcvr_xch #( .XCVR_ID (8), .XCVR_TYPE (XCVR_TYPE), - .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .CPLL_FBDIV (CPLL_FBDIV), - .RX_OUT_DIV (RX_OUT_DIV), - .RX_CLK25_DIV (RX_CLK25_DIV), + .CPLL_FBDIV_4_5 (CPLL_FBDIV_4_5), + .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .TX_OUT_DIV (TX_OUT_DIV), .TX_CLK25_DIV (TX_CLK25_DIV), - .PMA_RSV (PMA_RSV), + .RX_OUT_DIV (RX_OUT_DIV), + .RX_CLK25_DIV (RX_CLK25_DIV), + .RX_PMA_CFG (RX_PMA_CFG), .RX_CDR_CFG (RX_CDR_CFG)) i_xch_8 ( .qpll2ch_clk (qpll2ch_clk_8), @@ -2045,13 +2067,14 @@ module util_adxcvr #( util_adxcvr_xch #( .XCVR_ID (9), .XCVR_TYPE (XCVR_TYPE), - .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .CPLL_FBDIV (CPLL_FBDIV), - .RX_OUT_DIV (RX_OUT_DIV), - .RX_CLK25_DIV (RX_CLK25_DIV), + .CPLL_FBDIV_4_5 (CPLL_FBDIV_4_5), + .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .TX_OUT_DIV (TX_OUT_DIV), .TX_CLK25_DIV (TX_CLK25_DIV), - .PMA_RSV (PMA_RSV), + .RX_OUT_DIV (RX_OUT_DIV), + .RX_CLK25_DIV (RX_CLK25_DIV), + .RX_PMA_CFG (RX_PMA_CFG), .RX_CDR_CFG (RX_CDR_CFG)) i_xch_9 ( .qpll2ch_clk (qpll2ch_clk_8), @@ -2142,13 +2165,14 @@ module util_adxcvr #( util_adxcvr_xch #( .XCVR_ID (10), .XCVR_TYPE (XCVR_TYPE), - .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .CPLL_FBDIV (CPLL_FBDIV), - .RX_OUT_DIV (RX_OUT_DIV), - .RX_CLK25_DIV (RX_CLK25_DIV), + .CPLL_FBDIV_4_5 (CPLL_FBDIV_4_5), + .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .TX_OUT_DIV (TX_OUT_DIV), .TX_CLK25_DIV (TX_CLK25_DIV), - .PMA_RSV (PMA_RSV), + .RX_OUT_DIV (RX_OUT_DIV), + .RX_CLK25_DIV (RX_CLK25_DIV), + .RX_PMA_CFG (RX_PMA_CFG), .RX_CDR_CFG (RX_CDR_CFG)) i_xch_10 ( .qpll2ch_clk (qpll2ch_clk_8), @@ -2239,13 +2263,14 @@ module util_adxcvr #( util_adxcvr_xch #( .XCVR_ID (11), .XCVR_TYPE (XCVR_TYPE), - .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .CPLL_FBDIV (CPLL_FBDIV), - .RX_OUT_DIV (RX_OUT_DIV), - .RX_CLK25_DIV (RX_CLK25_DIV), + .CPLL_FBDIV_4_5 (CPLL_FBDIV_4_5), + .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .TX_OUT_DIV (TX_OUT_DIV), .TX_CLK25_DIV (TX_CLK25_DIV), - .PMA_RSV (PMA_RSV), + .RX_OUT_DIV (RX_OUT_DIV), + .RX_CLK25_DIV (RX_CLK25_DIV), + .RX_PMA_CFG (RX_PMA_CFG), .RX_CDR_CFG (RX_CDR_CFG)) i_xch_11 ( .qpll2ch_clk (qpll2ch_clk_8), @@ -2368,13 +2393,14 @@ module util_adxcvr #( util_adxcvr_xch #( .XCVR_ID (12), .XCVR_TYPE (XCVR_TYPE), - .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .CPLL_FBDIV (CPLL_FBDIV), - .RX_OUT_DIV (RX_OUT_DIV), - .RX_CLK25_DIV (RX_CLK25_DIV), + .CPLL_FBDIV_4_5 (CPLL_FBDIV_4_5), + .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .TX_OUT_DIV (TX_OUT_DIV), .TX_CLK25_DIV (TX_CLK25_DIV), - .PMA_RSV (PMA_RSV), + .RX_OUT_DIV (RX_OUT_DIV), + .RX_CLK25_DIV (RX_CLK25_DIV), + .RX_PMA_CFG (RX_PMA_CFG), .RX_CDR_CFG (RX_CDR_CFG)) i_xch_12 ( .qpll2ch_clk (qpll2ch_clk_12), @@ -2465,13 +2491,14 @@ module util_adxcvr #( util_adxcvr_xch #( .XCVR_ID (13), .XCVR_TYPE (XCVR_TYPE), - .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .CPLL_FBDIV (CPLL_FBDIV), - .RX_OUT_DIV (RX_OUT_DIV), - .RX_CLK25_DIV (RX_CLK25_DIV), + .CPLL_FBDIV_4_5 (CPLL_FBDIV_4_5), + .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .TX_OUT_DIV (TX_OUT_DIV), .TX_CLK25_DIV (TX_CLK25_DIV), - .PMA_RSV (PMA_RSV), + .RX_OUT_DIV (RX_OUT_DIV), + .RX_CLK25_DIV (RX_CLK25_DIV), + .RX_PMA_CFG (RX_PMA_CFG), .RX_CDR_CFG (RX_CDR_CFG)) i_xch_13 ( .qpll2ch_clk (qpll2ch_clk_12), @@ -2562,13 +2589,14 @@ module util_adxcvr #( util_adxcvr_xch #( .XCVR_ID (14), .XCVR_TYPE (XCVR_TYPE), - .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .CPLL_FBDIV (CPLL_FBDIV), - .RX_OUT_DIV (RX_OUT_DIV), - .RX_CLK25_DIV (RX_CLK25_DIV), + .CPLL_FBDIV_4_5 (CPLL_FBDIV_4_5), + .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .TX_OUT_DIV (TX_OUT_DIV), .TX_CLK25_DIV (TX_CLK25_DIV), - .PMA_RSV (PMA_RSV), + .RX_OUT_DIV (RX_OUT_DIV), + .RX_CLK25_DIV (RX_CLK25_DIV), + .RX_PMA_CFG (RX_PMA_CFG), .RX_CDR_CFG (RX_CDR_CFG)) i_xch_14 ( .qpll2ch_clk (qpll2ch_clk_12), @@ -2659,13 +2687,14 @@ module util_adxcvr #( util_adxcvr_xch #( .XCVR_ID (15), .XCVR_TYPE (XCVR_TYPE), - .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .CPLL_FBDIV (CPLL_FBDIV), - .RX_OUT_DIV (RX_OUT_DIV), - .RX_CLK25_DIV (RX_CLK25_DIV), + .CPLL_FBDIV_4_5 (CPLL_FBDIV_4_5), + .CPLL_TX_OR_RX_N (CPLL_TX_OR_RX_N), .TX_OUT_DIV (TX_OUT_DIV), .TX_CLK25_DIV (TX_CLK25_DIV), - .PMA_RSV (PMA_RSV), + .RX_OUT_DIV (RX_OUT_DIV), + .RX_CLK25_DIV (RX_CLK25_DIV), + .RX_PMA_CFG (RX_PMA_CFG), .RX_CDR_CFG (RX_CDR_CFG)) i_xch_15 ( .qpll2ch_clk (qpll2ch_clk_12), diff --git a/library/xilinx/util_adxcvr/util_adxcvr_xch.v b/library/xilinx/util_adxcvr/util_adxcvr_xch.v index 39c323af2..14b477914 100644 --- a/library/xilinx/util_adxcvr/util_adxcvr_xch.v +++ b/library/xilinx/util_adxcvr/util_adxcvr_xch.v @@ -43,14 +43,18 @@ module util_adxcvr_xch #( parameter integer XCVR_ID = 0, parameter integer XCVR_TYPE = 0, - parameter integer CPLL_TX_OR_RX_N = 0, + parameter integer CPLL_FBDIV = 2, - parameter integer RX_OUT_DIV = 1, - parameter integer RX_CLK25_DIV = 10, + parameter integer CPLL_FBDIV_4_5 = 5, + parameter integer CPLL_TX_OR_RX_N = 0, + parameter integer TX_OUT_DIV = 1, - parameter integer TX_CLK25_DIV = 10, - parameter [31:0] PMA_RSV = 32'h00018480, - parameter [72:0] RX_CDR_CFG = 72'h03000023ff20400020) ( + parameter integer TX_CLK25_DIV = 20, + + parameter integer RX_OUT_DIV = 1, + parameter integer RX_CLK25_DIV = 20, + parameter [31:0] RX_PMA_CFG = 32'h001e7080, + parameter [72:0] RX_CDR_CFG = 72'h0b000023ff10400020) ( // pll interface @@ -313,48 +317,16 @@ module util_adxcvr_xch #( generate if (XCVR_TYPE == 0) begin GTXE2_CHANNEL #( - .SIM_RECEIVER_DETECT_PASS ("TRUE"), - .SIM_TX_EIDLE_DRIVE_LEVEL ("X"), - .SIM_RESET_SPEEDUP ("TRUE"), - .SIM_CPLLREFCLK_SEL (3'b001), - .SIM_VERSION ("3.0"), .ALIGN_COMMA_DOUBLE ("FALSE"), .ALIGN_COMMA_ENABLE (10'b1111111111), - .ALIGN_COMMA_WORD (1), + .ALIGN_COMMA_WORD (4), .ALIGN_MCOMMA_DET ("TRUE"), .ALIGN_MCOMMA_VALUE (10'b1010000011), .ALIGN_PCOMMA_DET ("TRUE"), .ALIGN_PCOMMA_VALUE (10'b0101111100), - .SHOW_REALIGN_COMMA ("TRUE"), - .RXSLIDE_AUTO_WAIT (7), - .RXSLIDE_MODE ("OFF"), - .RX_SIG_VALID_DLY (10), - .RX_DISPERR_SEQ_MATCH ("TRUE"), - .DEC_MCOMMA_DETECT ("TRUE"), - .DEC_PCOMMA_DETECT ("TRUE"), - .DEC_VALID_COMMA_ONLY ("FALSE"), .CBCC_DATA_SOURCE_SEL ("DECODED"), - .CLK_COR_SEQ_2_USE ("FALSE"), - .CLK_COR_KEEP_IDLE ("FALSE"), - .CLK_COR_MAX_LAT (35), - .CLK_COR_MIN_LAT (31), - .CLK_COR_PRECEDENCE ("TRUE"), - .CLK_COR_REPEAT_WAIT (0), - .CLK_COR_SEQ_LEN (1), - .CLK_COR_SEQ_1_ENABLE (4'b1111), - .CLK_COR_SEQ_1_1 (10'b0000000000), - .CLK_COR_SEQ_1_2 (10'b0000000000), - .CLK_COR_SEQ_1_3 (10'b0000000000), - .CLK_COR_SEQ_1_4 (10'b0000000000), - .CLK_CORRECT_USE ("FALSE"), - .CLK_COR_SEQ_2_ENABLE (4'b1111), - .CLK_COR_SEQ_2_1 (10'b0000000000), - .CLK_COR_SEQ_2_2 (10'b0000000000), - .CLK_COR_SEQ_2_3 (10'b0000000000), - .CLK_COR_SEQ_2_4 (10'b0000000000), .CHAN_BOND_KEEP_ALIGN ("FALSE"), - .CHAN_BOND_MAX_SKEW (7), - .CHAN_BOND_SEQ_LEN (1), + .CHAN_BOND_MAX_SKEW (1), .CHAN_BOND_SEQ_1_1 (10'b0000000000), .CHAN_BOND_SEQ_1_2 (10'b0000000000), .CHAN_BOND_SEQ_1_3 (10'b0000000000), @@ -366,9 +338,35 @@ module util_adxcvr_xch #( .CHAN_BOND_SEQ_2_4 (10'b0000000000), .CHAN_BOND_SEQ_2_ENABLE (4'b1111), .CHAN_BOND_SEQ_2_USE ("FALSE"), - .FTS_DESKEW_SEQ_ENABLE (4'b1111), - .FTS_LANE_DESKEW_CFG (4'b1111), - .FTS_LANE_DESKEW_EN ("FALSE"), + .CHAN_BOND_SEQ_LEN (1), + .CLK_CORRECT_USE ("FALSE"), + .CLK_COR_KEEP_IDLE ("FALSE"), + .CLK_COR_MAX_LAT (12), + .CLK_COR_MIN_LAT (8), + .CLK_COR_PRECEDENCE ("TRUE"), + .CLK_COR_REPEAT_WAIT (0), + .CLK_COR_SEQ_1_1 (10'b0100000000), + .CLK_COR_SEQ_1_2 (10'b0000000000), + .CLK_COR_SEQ_1_3 (10'b0000000000), + .CLK_COR_SEQ_1_4 (10'b0000000000), + .CLK_COR_SEQ_1_ENABLE (4'b1111), + .CLK_COR_SEQ_2_1 (10'b0100000000), + .CLK_COR_SEQ_2_2 (10'b0000000000), + .CLK_COR_SEQ_2_3 (10'b0000000000), + .CLK_COR_SEQ_2_4 (10'b0000000000), + .CLK_COR_SEQ_2_ENABLE (4'b1111), + .CLK_COR_SEQ_2_USE ("FALSE"), + .CLK_COR_SEQ_LEN (1), + .CPLL_CFG (24'hBC07DC), + .CPLL_FBDIV (CPLL_FBDIV), + .CPLL_FBDIV_45 (CPLL_FBDIV_4_5), + .CPLL_INIT_CFG (24'h00001E), + .CPLL_LOCK_CFG (16'h01E8), + .CPLL_REFCLK_DIV (1), + .DEC_MCOMMA_DETECT ("TRUE"), + .DEC_PCOMMA_DETECT ("TRUE"), + .DEC_VALID_COMMA_ONLY ("FALSE"), + .DMONITOR_CFG (24'h000A00), .ES_CONTROL (6'b000000), .ES_ERRDET_EN ("TRUE"), .ES_EYE_SCAN_EN ("TRUE"), @@ -379,94 +377,137 @@ module util_adxcvr_xch #( .ES_QUAL_MASK (80'h00000000000000000000), .ES_SDATA_MASK (80'h00000000000000000000), .ES_VERT_OFFSET (9'b000000000), - .RX_DATA_WIDTH (40), + .FTS_DESKEW_SEQ_ENABLE (4'b1111), + .FTS_LANE_DESKEW_CFG (4'b1111), + .FTS_LANE_DESKEW_EN ("FALSE"), + .GEARBOX_MODE (3'b000), + .IS_CPLLLOCKDETCLK_INVERTED (1'b0), + .IS_DRPCLK_INVERTED (1'b0), + .IS_GTGREFCLK_INVERTED (1'b0), + .IS_RXUSRCLK2_INVERTED (1'b0), + .IS_RXUSRCLK_INVERTED (1'b0), + .IS_TXPHDLYTSTCLK_INVERTED (1'b0), + .IS_TXUSRCLK2_INVERTED (1'b0), + .IS_TXUSRCLK_INVERTED (1'b0), .OUTREFCLK_SEL_INV (2'b11), - .PMA_RSV (PMA_RSV), - .PMA_RSV2 (16'h2070), - .PMA_RSV3 (2'b00), - .PMA_RSV4 (32'h00000000), - .RX_BIAS_CFG (12'b000000000100), - .DMONITOR_CFG (24'h000A00), - .RX_CM_SEL (2'b11), - .RX_CM_TRIM (3'b010), - .RX_DEBUG_CFG (12'b000000000000), - .RX_OS_CFG (13'b0000010000000), - .TERM_RCAL_CFG (5'b10000), - .TERM_RCAL_OVRD (1'b0), - .TST_RSV (32'h00000000), - .RX_CLK25_DIV (RX_CLK25_DIV), - .TX_CLK25_DIV (TX_CLK25_DIV), - .UCODEER_CLR (1'b0), .PCS_PCIE_EN ("FALSE"), .PCS_RSVD_ATTR (48'h000000000000), - .RXBUF_ADDR_MODE ("FULL"), + .PD_TRANS_TIME_FROM_P2 (12'h03c), + .PD_TRANS_TIME_NONE_P2 (8'h3c), + .PD_TRANS_TIME_TO_P2 (8'h64), + .PMA_RSV (RX_PMA_CFG), + .PMA_RSV2 (16'h2050), + .PMA_RSV3 (2'b00), + .PMA_RSV4 (32'h00000000), + .RXBUFRESET_TIME (5'b00001), + .RXBUF_ADDR_MODE ("FAST"), .RXBUF_EIDLE_HI_CNT (4'b1000), .RXBUF_EIDLE_LO_CNT (4'b0000), .RXBUF_EN ("TRUE"), - .RX_BUFFER_CFG (6'b000000), .RXBUF_RESET_ON_CB_CHANGE ("TRUE"), .RXBUF_RESET_ON_COMMAALIGN ("FALSE"), .RXBUF_RESET_ON_EIDLE ("FALSE"), .RXBUF_RESET_ON_RATE_CHANGE ("TRUE"), - .RXBUFRESET_TIME (5'b00001), - .RXBUF_THRESH_OVFLW (61), - .RXBUF_THRESH_OVRD ("FALSE"), - .RXBUF_THRESH_UNDFLW (4), - .RXDLY_CFG (16'h001F), - .RXDLY_LCFG (9'h030), - .RXDLY_TAP_CFG (16'h0000), - .RXPH_CFG (24'h000000), - .RXPHDLY_CFG (24'h084020), - .RXPH_MONITOR_SEL (5'b00000), - .RX_XCLK_SEL ("RXREC"), - .RX_DDI_SEL (6'b000000), - .RX_DEFER_RESET_BUF_EN ("TRUE"), + .RXBUF_THRESH_OVFLW (57), + .RXBUF_THRESH_OVRD ("TRUE"), + .RXBUF_THRESH_UNDFLW (3), + .RXCDRFREQRESET_TIME (5'b00001), + .RXCDRPHRESET_TIME (5'b00001), .RXCDR_CFG (RX_CDR_CFG), .RXCDR_FR_RESET_ON_EIDLE (1'b0), .RXCDR_HOLD_DURING_EIDLE (1'b0), - .RXCDR_PH_RESET_ON_EIDLE (1'b0), .RXCDR_LOCK_CFG (6'b010101), - .RXCDRFREQRESET_TIME (5'b00001), - .RXCDRPHRESET_TIME (5'b00001), - .RXISCANRESET_TIME (5'b00001), - .RXPCSRESET_TIME (5'b00001), - .RXPMARESET_TIME (5'b00011), - .RXOOB_CFG (7'b0000110), + .RXCDR_PH_RESET_ON_EIDLE (1'b0), + .RXDFELPMRESET_TIME (7'b0001111), + .RXDLY_CFG (16'h001F), + .RXDLY_LCFG (9'h030), + .RXDLY_TAP_CFG (16'h0000), .RXGEARBOX_EN ("FALSE"), - .GEARBOX_MODE (3'b000), + .RXISCANRESET_TIME (5'b00001), + .RXLPM_HF_CFG (14'b00000011110000), + .RXLPM_LF_CFG (14'b00000011110000), + .RXOOB_CFG (7'b0000110), + .RXOUT_DIV (RX_OUT_DIV), + .RXPCSRESET_TIME (5'b00001), + .RXPHDLY_CFG (24'h084020), + .RXPH_CFG (24'h000000), + .RXPH_MONITOR_SEL (5'b00000), + .RXPMARESET_TIME (5'b00011), .RXPRBS_ERR_LOOPBACK (1'b0), - .PD_TRANS_TIME_FROM_P2 (12'h03c), - .PD_TRANS_TIME_NONE_P2 (8'h3c), - .PD_TRANS_TIME_TO_P2 (8'h64), + .RXSLIDE_AUTO_WAIT (7), + .RXSLIDE_MODE ("OFF"), + .RX_BIAS_CFG (12'b000000000100), + .RX_BUFFER_CFG (6'b000000), + .RX_CLK25_DIV (RX_CLK25_DIV), + .RX_CLKMUX_PD (1'b1), + .RX_CM_SEL (2'b11), + .RX_CM_TRIM (3'b010), + .RX_DATA_WIDTH (40), + .RX_DDI_SEL (6'b000000), + .RX_DEBUG_CFG (12'b000000000000), + .RX_DEFER_RESET_BUF_EN ("TRUE"), + .RX_DFE_GAIN_CFG (23'h020FEA), + .RX_DFE_H2_CFG (12'b000000000000), + .RX_DFE_H3_CFG (12'b000001000000), + .RX_DFE_H4_CFG (11'b00011110000), + .RX_DFE_H5_CFG (11'b00011100000), + .RX_DFE_KL_CFG (13'b0000011111110), + .RX_DFE_KL_CFG2 (32'h301148AC), + .RX_DFE_LPM_CFG (16'h0104), + .RX_DFE_LPM_HOLD_DURING_EIDLE (1'b0), + .RX_DFE_UT_CFG (17'b10001111000000000), + .RX_DFE_VP_CFG (17'b00011111100000011), + .RX_DFE_XYD_CFG (13'b0000000000000), + .RX_DISPERR_SEQ_MATCH ("TRUE"), + .RX_INT_DATAWIDTH (1), + .RX_OS_CFG (13'b0000010000000), + .RX_SIG_VALID_DLY (10), + .RX_XCLK_SEL ("RXREC"), .SAS_MAX_COM (64), .SAS_MIN_COM (36), - .SATA_BURST_SEQ_LEN (4'b1111), - .SATA_BURST_VAL (3'b100), - .SATA_EIDLE_VAL (3'b100), + .SATA_BURST_SEQ_LEN (4'b0101), + .SATA_BURST_VAL (3'b111), + .SATA_CPLL_CFG ("VCO_3000MHZ"), + .SATA_EIDLE_VAL (3'b111), .SATA_MAX_BURST (8), .SATA_MAX_INIT (21), .SATA_MAX_WAKE (7), .SATA_MIN_BURST (4), .SATA_MIN_INIT (12), .SATA_MIN_WAKE (4), + .SHOW_REALIGN_COMMA ("TRUE"), + .SIM_CPLLREFCLK_SEL (3'b001), + .SIM_RECEIVER_DETECT_PASS ("TRUE"), + .SIM_RESET_SPEEDUP ("TRUE"), + .SIM_TX_EIDLE_DRIVE_LEVEL ("X"), + .SIM_VERSION ("4.0"), + .TERM_RCAL_CFG (5'b10000), + .TERM_RCAL_OVRD (1'b0), .TRANS_TIME_RATE (8'h0E), + .TST_RSV (32'h00000000), .TXBUF_EN ("TRUE"), .TXBUF_RESET_ON_RATE_CHANGE ("TRUE"), .TXDLY_CFG (16'h001F), .TXDLY_LCFG (9'h030), .TXDLY_TAP_CFG (16'h0000), - .TXPH_CFG (16'h0780), + .TXGEARBOX_EN ("FALSE"), + .TXOUT_DIV (TX_OUT_DIV), + .TXPCSRESET_TIME (5'b00001), .TXPHDLY_CFG (24'h084020), + .TXPH_CFG (16'h0780), .TXPH_MONITOR_SEL (5'b00000), - .TX_XCLK_SEL ("TXOUT"), + .TXPMARESET_TIME (5'b00001), + .TX_CLK25_DIV (TX_CLK25_DIV), + .TX_CLKMUX_PD (1'b1), .TX_DATA_WIDTH (40), .TX_DEEMPH0 (5'b00000), .TX_DEEMPH1 (5'b00000), + .TX_DRIVE_MODE ("DIRECT"), .TX_EIDLE_ASSERT_DELAY (3'b110), .TX_EIDLE_DEASSERT_DELAY (3'b100), + .TX_INT_DATAWIDTH (1), .TX_LOOPBACK_DRIVE_HIZ ("FALSE"), .TX_MAINCURSOR_SEL (1'b0), - .TX_DRIVE_MODE ("DIRECT"), .TX_MARGIN_FULL_0 (7'b1001110), .TX_MARGIN_FULL_1 (7'b1001001), .TX_MARGIN_FULL_2 (7'b1000101), @@ -477,65 +518,24 @@ module util_adxcvr_xch #( .TX_MARGIN_LOW_2 (7'b1000010), .TX_MARGIN_LOW_3 (7'b1000000), .TX_MARGIN_LOW_4 (7'b1000000), - .TXGEARBOX_EN ("FALSE"), - .TXPCSRESET_TIME (5'b00001), - .TXPMARESET_TIME (5'b00001), + .TX_PREDRIVER_MODE (1'b0), + .TX_QPI_STATUS_EN (1'b0), .TX_RXDETECT_CFG (14'h1832), .TX_RXDETECT_REF (3'b100), - .CPLL_CFG (24'hBC07DC), - .CPLL_FBDIV (CPLL_FBDIV), - .CPLL_FBDIV_45 (5), - .CPLL_INIT_CFG (24'h00001E), - .CPLL_LOCK_CFG (16'h01E8), - .CPLL_REFCLK_DIV (1), - .RXOUT_DIV (RX_OUT_DIV), - .TXOUT_DIV (TX_OUT_DIV), - .SATA_CPLL_CFG ("VCO_3000MHZ"), - .RXDFELPMRESET_TIME (7'b0001111), - .RXLPM_HF_CFG (14'b00000011110000), - .RXLPM_LF_CFG (14'b00000011110000), - .RX_DFE_GAIN_CFG (23'h020FEA), - .RX_DFE_H2_CFG (12'b000000000000), - .RX_DFE_H3_CFG (12'b000001000000), - .RX_DFE_H4_CFG (11'b00011110000), - .RX_DFE_H5_CFG (11'b00011100000), - .RX_DFE_KL_CFG (13'b0000011111110), - .RX_DFE_LPM_CFG (16'h0954), - .RX_DFE_LPM_HOLD_DURING_EIDLE (1'b0), - .RX_DFE_UT_CFG (17'b10001111000000000), - .RX_DFE_VP_CFG (17'b00011111100000011), - .RX_CLKMUX_PD (1'b1), - .TX_CLKMUX_PD (1'b1), - .RX_INT_DATAWIDTH (1), - .TX_INT_DATAWIDTH (1), - .TX_QPI_STATUS_EN (1'b0), - .RX_DFE_KL_CFG2 (32'h3010D90C), - .RX_DFE_XYD_CFG (13'b0001100010000), - .TX_PREDRIVER_MODE (1'b0)) + .TX_XCLK_SEL ("TXOUT"), + .UCODEER_CLR (1'b0)) i_gtxe2_channel ( + .CFGRESET (1'h0), + .CLKRSVD (4'h0), .CPLLFBCLKLOST (), .CPLLLOCK (cpll_locked_s), .CPLLLOCKDETCLK (up_clk), - .CPLLLOCKEN (1'd1), - .CPLLPD (1'b0), + .CPLLLOCKEN (1'h1), + .CPLLPD (1'h0), .CPLLREFCLKLOST (), - .CPLLREFCLKSEL (3'b001), + .CPLLREFCLKSEL (3'h1), .CPLLRESET (up_cpll_rst), - .GTRSVD (16'b0000000000000000), - .PCSRSVDIN (16'b0000000000000000), - .PCSRSVDIN2 (5'b00000), - .PMARSVDIN (5'b00000), - .PMARSVDIN2 (5'b00000), - .TSTIN (20'b11111111111111111111), - .TSTOUT (), - .CLKRSVD (4'b0000), - .GTGREFCLK (1'd0), - .GTNORTHREFCLK0 (1'd0), - .GTNORTHREFCLK1 (1'd0), - .GTREFCLK0 (cpll_ref_clk), - .GTREFCLK1 (1'd0), - .GTSOUTHREFCLK0 (1'd0), - .GTSOUTHREFCLK1 (1'd0), + .DMONITOROUT (), .DRPADDR (up_addr_int[8:0]), .DRPCLK (up_clk), .DRPDI (up_wdata_int), @@ -543,206 +543,183 @@ module util_adxcvr_xch #( .DRPEN (up_enb_int), .DRPRDY (up_ready_s), .DRPWE (up_wr_int), - .GTREFCLKMONITOR (), + .EYESCANDATAERROR (), + .EYESCANMODE (1'h0), + .EYESCANRESET (1'h0), + .EYESCANTRIGGER (1'h0), + .GTGREFCLK (1'h0), + .GTNORTHREFCLK0 (1'h0), + .GTNORTHREFCLK1 (1'h0), + .GTREFCLK0 (cpll_ref_clk), + .GTREFCLK1 (1'h0), + .GTRESETSEL (1'h0), + .GTRSVD (16'h0), + .GTRXRESET (up_rx_rst), + .GTSOUTHREFCLK0 (1'h0), + .GTSOUTHREFCLK1 (1'h0), + .GTTXRESET (up_tx_rst), + .GTXRXN (rx_n), + .GTXRXP (rx_p), + .GTXTXN (tx_n), + .GTXTXP (tx_p), + .LOOPBACK (3'h0), + .PCSRSVDIN (16'h0), + .PCSRSVDIN2 (5'h0), + .PMARSVDIN (5'h0), + .PMARSVDIN2 (5'h0), .QPLLCLK (qpll2ch_clk), .QPLLREFCLK (qpll2ch_ref_clk), - .RXSYSCLKSEL (rx_sys_clk_sel_s), - .TXSYSCLKSEL (tx_sys_clk_sel_s), - .DMONITOROUT (), - .TX8B10BEN (1'd1), - .LOOPBACK (3'd0), - .PHYSTATUS (), - .RXRATE (rx_rate_m2), - .RXVALID (), - .RXPD (2'b00), - .TXPD (2'b00), - .SETERRSTATUS (1'd0), - .EYESCANRESET (1'd0), - .RXUSERRDY (up_rx_user_ready), - .EYESCANDATAERROR (), - .EYESCANMODE (1'd0), - .EYESCANTRIGGER (1'd0), - .RXCDRFREQRESET (1'd0), - .RXCDRHOLD (1'd0), - .RXCDRLOCK (), - .RXCDROVRDEN (1'd0), - .RXCDRRESET (1'd0), - .RXCDRRESETRSV (1'd0), - .RXCLKCORCNT (), - .RX8B10BEN (1'd1), - .RXUSRCLK (rx_clk), - .RXUSRCLK2 (rx_clk), - .RXDATA ({rx_data_open_s[31:0], rx_data}), - .RXPRBSERR (), - .RXPRBSSEL (3'd0), - .RXPRBSCNTRESET (1'd0), - .RXDFEXYDEN (1'd0), - .RXDFEXYDHOLD (1'd0), - .RXDFEXYDOVRDEN (1'd0), - .RXDISPERR ({rx_disperr_open_s[3:0], rx_disperr}), - .RXNOTINTABLE ({rx_notintable_open_s, rx_notintable}), - .GTXRXP (rx_p), - .GTXRXN (rx_n), - .RXBUFRESET (1'd0), + .RESETOVRD (1'h0), + .RX8B10BEN (1'h1), + .RXBUFRESET (1'h0), .RXBUFSTATUS (), - .RXDDIEN (1'd0), - .RXDLYBYPASS (1'd1), - .RXDLYEN (1'd0), - .RXDLYOVRDEN (1'd0), - .RXDLYSRESET (1'd0), - .RXDLYSRESETDONE (), - .RXPHALIGN (1'd0), - .RXPHALIGNDONE (), - .RXPHALIGNEN (1'd0), - .RXPHDLYPD (1'd0), - .RXPHDLYRESET (1'd0), - .RXPHMONITOR (), - .RXPHOVRDEN (1'd0), - .RXPHSLIPMONITOR (), - .RXSTATUS (), .RXBYTEISALIGNED (), .RXBYTEREALIGN (), - .RXCOMMADET (), - .RXCOMMADETEN (1'd1), - .RXMCOMMAALIGNEN (rx_calign), - .RXPCOMMAALIGNEN (rx_calign), - .RXCHANBONDSEQ (), - .RXCHBONDEN (1'd0), - .RXCHBONDLEVEL (3'd0), - .RXCHBONDMASTER (1'd1), - .RXCHBONDO (), - .RXCHBONDSLAVE (1'd0), - .RXCHANISALIGNED (), - .RXCHANREALIGN (), - .RXDFEAGCHOLD (1'd0), - .RXDFEAGCOVRDEN (1'd0), - .RXDFECM1EN (1'd0), - .RXDFELFHOLD (1'd0), - .RXDFELFOVRDEN (1'd1), - .RXDFELPMRESET (1'd0), - .RXDFETAP2HOLD (1'd0), - .RXDFETAP2OVRDEN (1'd0), - .RXDFETAP3HOLD (1'd0), - .RXDFETAP3OVRDEN (1'd0), - .RXDFETAP4HOLD (1'd0), - .RXDFETAP4OVRDEN (1'd0), - .RXDFETAP5HOLD (1'd0), - .RXDFETAP5OVRDEN (1'd0), - .RXDFEUTHOLD (1'd0), - .RXDFEUTOVRDEN (1'd0), - .RXDFEVPHOLD (1'd0), - .RXDFEVPOVRDEN (1'd0), - .RXDFEVSEN (1'd0), - .RXLPMLFKLOVRDEN (1'd0), - .RXMONITOROUT (), - .RXMONITORSEL (2'd0), - .RXOSHOLD (1'd0), - .RXOSOVRDEN (1'd0), - .RXLPMHFHOLD (1'd0), - .RXLPMHFOVRDEN (1'd0), - .RXLPMLFHOLD (1'd0), - .RXRATEDONE (), - .RXOUTCLK (rx_out_clk_s), - .RXOUTCLKFABRIC (), - .RXOUTCLKPCS (), - .RXOUTCLKSEL (up_rx_out_clk_sel), - .RXDATAVALID (), - .RXHEADER (), - .RXHEADERVALID (), - .RXSTARTOFSEQ (), - .RXGEARBOXSLIP (1'd0), - .GTRXRESET (up_rx_rst), - .RXOOBRESET (1'd0), - .RXPCSRESET (1'd0), - .RXPMARESET (1'd0), - .RXLPMEN (up_rx_lpm_dfe_n), - .RXCOMSASDET (), - .RXCOMWAKEDET (), - .RXCOMINITDET (), - .RXELECIDLE (), - .RXELECIDLEMODE (2'b10), - .RXPOLARITY (1'd0), - .RXSLIDE (1'd0), + .RXCDRFREQRESET (1'h0), + .RXCDRHOLD (1'h0), + .RXCDROVRDEN (1'h0), + .RXCDRRESET (1'h0), + .RXCDRRESETRSV (1'h0), .RXCHARISCOMMA (), .RXCHARISK ({rx_charisk_open_s[3:0], rx_charisk}), - .RXCHBONDI (5'd0), + .RXCHBONDEN (1'h0), + .RXCHBONDI (5'h0), + .RXCHBONDLEVEL (3'h0), + .RXCHBONDMASTER (1'h1), + .RXCHBONDSLAVE (1'h0), + .RXCOMMADET (), + .RXCOMMADETEN (1'h1), + .RXDATA ({rx_data_open_s[31:0], rx_data}), + .RXDDIEN (1'h0), + .RXDFEAGCHOLD (1'h0), + .RXDFEAGCOVRDEN (1'h0), + .RXDFECM1EN (1'h0), + .RXDFELFHOLD (1'h0), + .RXDFELFOVRDEN (1'h0), + .RXDFELPMRESET (1'h0), + .RXDFETAP2HOLD (1'h0), + .RXDFETAP2OVRDEN (1'h0), + .RXDFETAP3HOLD (1'h0), + .RXDFETAP3OVRDEN (1'h0), + .RXDFETAP4HOLD (1'h0), + .RXDFETAP4OVRDEN (1'h0), + .RXDFETAP5HOLD (1'h0), + .RXDFETAP5OVRDEN (1'h0), + .RXDFEUTHOLD (1'h0), + .RXDFEUTOVRDEN (1'h0), + .RXDFEVPHOLD (1'h0), + .RXDFEVPOVRDEN (1'h0), + .RXDFEVSEN (1'h0), + .RXDFEXYDEN (1'h1), + .RXDFEXYDHOLD (1'h0), + .RXDFEXYDOVRDEN (1'h0), + .RXDISPERR ({rx_disperr_open_s[3:0], rx_disperr}), + .RXDLYBYPASS (1'h1), + .RXDLYEN (1'h0), + .RXDLYOVRDEN (1'h0), + .RXDLYSRESET (1'h0), + .RXELECIDLEMODE (2'h3), + .RXGEARBOXSLIP (1'h0), + .RXLPMEN (up_rx_lpm_dfe_n), + .RXLPMHFHOLD (1'h0), + .RXLPMHFOVRDEN (1'h0), + .RXLPMLFHOLD (1'h0), + .RXLPMLFKLOVRDEN (1'h0), + .RXMCOMMAALIGNEN (rx_calign), + .RXMONITOROUT (), + .RXMONITORSEL (2'h0), + .RXNOTINTABLE ({rx_notintable_open_s, rx_notintable}), + .RXOOBRESET (1'h0), + .RXOSHOLD (1'h0), + .RXOSOVRDEN (1'h0), + .RXOUTCLK (rx_out_clk_s), + .RXOUTCLKFABRIC (), + .RXOUTCLKSEL (up_rx_out_clk_sel), + .RXPCOMMAALIGNEN (rx_calign), + .RXPCSRESET (1'h0), + .RXPD (2'h0), + .RXPHALIGN (1'h0), + .RXPHALIGNEN (1'h0), + .RXPHDLYPD (1'h0), + .RXPHDLYRESET (1'h0), + .RXPHOVRDEN (1'h0), + .RXPMARESET (1'h0), + .RXPOLARITY (1'h0), + .RXPRBSCNTRESET (1'h0), + .RXPRBSERR (), + .RXPRBSSEL (3'h0), + .RXQPIEN (1'h0), + .RXRATE (rx_rate_m2), .RXRESETDONE (rx_rst_done_s), - .RXQPIEN (1'd0), - .RXQPISENN (), - .RXQPISENP (), - .TXPHDLYTSTCLK (1'd0), - .TXPOSTCURSOR (5'd0), - .TXPOSTCURSORINV (1'd0), - .TXPRECURSOR (5'd0), - .TXPRECURSORINV (1'd0), - .TXQPIBIASEN (1'd0), - .TXQPISTRONGPDOWN (1'd0), - .TXQPIWEAKPUP (1'd0), - .CFGRESET (1'd0), - .GTTXRESET (up_tx_rst), - .PCSRSVDOUT (), - .TXUSERRDY (up_tx_user_ready), - .GTRESETSEL (1'd0), - .RESETOVRD (1'd0), - .TXCHARDISPMODE (8'd0), - .TXCHARDISPVAL (8'd0), - .TXUSRCLK (tx_clk), - .TXUSRCLK2 (tx_clk), - .TXELECIDLE (1'd0), - .TXMARGIN (3'd0), - .TXRATE (tx_rate_m2), - .TXSWING (1'd0), - .TXPRBSFORCEERR (1'd0), - .TXDLYBYPASS (1'd1), - .TXDLYEN (1'd0), - .TXDLYHOLD (1'd0), - .TXDLYOVRDEN (1'd0), - .TXDLYSRESET (1'd0), - .TXDLYSRESETDONE (), - .TXDLYUPDOWN (1'd0), - .TXPHALIGN (1'd0), - .TXPHALIGNDONE (), - .TXPHALIGNEN (1'd0), - .TXPHDLYPD (1'd0), - .TXPHDLYRESET (1'd0), - .TXPHINIT (1'd0), - .TXPHINITDONE (), - .TXPHOVRDEN (1'd0), + .RXSLIDE (1'h0), + .RXSTATUS (), + .RXSYSCLKSEL (rx_sys_clk_sel_s), + .RXUSERRDY (up_rx_user_ready), + .RXUSRCLK (rx_clk), + .RXUSRCLK2 (rx_clk), + .SETERRSTATUS (1'h0), + .TSTIN (20'hfffff), + .TX8B10BBYPASS (8'h0), + .TX8B10BEN (1'h1), + .TXBUFDIFFCTRL (3'h4), .TXBUFSTATUS (), - .TXBUFDIFFCTRL (3'b100), - .TXDEEMPH (1'd0), - .TXDIFFCTRL (4'b1000), - .TXDIFFPD (1'd0), - .TXINHIBIT (1'd0), - .TXMAINCURSOR (7'b0000000), - .TXPISOPD (1'd0), + .TXCHARDISPMODE (8'h0), + .TXCHARDISPVAL (8'h0), + .TXCHARISK ({4'd0, tx_charisk}), + .TXCOMINIT (1'h0), + .TXCOMSAS (1'h0), + .TXCOMWAKE (1'h0), .TXDATA ({32'd0, tx_data}), - .GTXTXP (tx_p), - .GTXTXN (tx_n), + .TXDEEMPH (1'h0), + .TXDETECTRX (1'h0), + .TXDIFFCTRL (4'h8), + .TXDIFFPD (1'h0), + .TXDLYBYPASS (1'h1), + .TXDLYEN (1'h0), + .TXDLYHOLD (1'h0), + .TXDLYOVRDEN (1'h0), + .TXDLYSRESET (1'h0), + .TXDLYUPDOWN (1'h0), + .TXELECIDLE (1'h0), + .TXHEADER (3'h0), + .TXINHIBIT (1'h0), + .TXMAINCURSOR (7'h0), + .TXMARGIN (3'h0), .TXOUTCLK (tx_out_clk_s), .TXOUTCLKFABRIC (), .TXOUTCLKPCS (), .TXOUTCLKSEL (up_tx_out_clk_sel), - .TXRATEDONE (), - .TXCHARISK ({4'd0, tx_charisk}), - .TXGEARBOXREADY (), - .TXHEADER (3'd0), - .TXSEQUENCE (7'd0), - .TXSTARTSEQ (1'd0), - .TXPCSRESET (1'd0), - .TXPMARESET (1'd0), - .TXRESETDONE (tx_rst_done_s), - .TXCOMFINISH (), - .TXCOMINIT (1'd0), - .TXCOMSAS (1'd0), - .TXCOMWAKE (1'd0), - .TXPDELECIDLEMODE (1'd0), - .TXPOLARITY (1'd0), - .TXDETECTRX (1'd0), - .TX8B10BBYPASS (8'd0), + .TXPCSRESET (1'h0), + .TXPD (2'h0), + .TXPDELECIDLEMODE (1'h0), + .TXPHALIGN (1'h0), + .TXPHALIGNEN (1'h0), + .TXPHDLYPD (1'h0), + .TXPHDLYRESET (1'h0), + .TXPHDLYTSTCLK (1'h0), + .TXPHINIT (1'h0), + .TXPHOVRDEN (1'h0), + .TXPISOPD (1'h0), + .TXPMARESET (1'h0), + .TXPOLARITY (1'h0), + .TXPOSTCURSOR (5'h0), + .TXPOSTCURSORINV (1'h0), + .TXPRBSFORCEERR (1'h0), .TXPRBSSEL (3'd0), - .TXQPISENP (), - .TXQPISENN ()); + .TXPRECURSOR (5'h0), + .TXPRECURSORINV (1'h0), + .TXQPIBIASEN (1'h0), + .TXQPISTRONGPDOWN (1'h0), + .TXQPIWEAKPUP (1'h0), + .TXRATE (tx_rate_m2), + .TXRESETDONE (tx_rst_done_s), + .TXSEQUENCE (7'h0), + .TXSTARTSEQ (1'h0), + .TXSWING (1'h0), + .TXSYSCLKSEL (tx_sys_clk_sel_s), + .TXUSERRDY (up_tx_user_ready), + .TXUSRCLK (tx_clk), + .TXUSRCLK2 (tx_clk)); end endgenerate @@ -787,7 +764,7 @@ module util_adxcvr_xch #( .ADAPT_CFG1 (16'b0000000000000000), .ALIGN_COMMA_DOUBLE ("FALSE"), .ALIGN_COMMA_ENABLE (10'b1111111111), - .ALIGN_COMMA_WORD (1), + .ALIGN_COMMA_WORD (1'h1), .ALIGN_MCOMMA_DET ("TRUE"), .ALIGN_MCOMMA_VALUE (10'b1010000011), .ALIGN_PCOMMA_DET ("TRUE"), @@ -798,7 +775,7 @@ module util_adxcvr_xch #( .CBCC_DATA_SOURCE_SEL ("DECODED"), .CDR_SWAP_MODE_EN (1'b0), .CHAN_BOND_KEEP_ALIGN ("FALSE"), - .CHAN_BOND_MAX_SKEW (1), + .CHAN_BOND_MAX_SKEW (1'h1), .CHAN_BOND_SEQ_1_1 (10'b0000000000), .CHAN_BOND_SEQ_1_2 (10'b0000000000), .CHAN_BOND_SEQ_1_3 (10'b0000000000), @@ -810,13 +787,13 @@ module util_adxcvr_xch #( .CHAN_BOND_SEQ_2_4 (10'b0000000000), .CHAN_BOND_SEQ_2_ENABLE (4'b1111), .CHAN_BOND_SEQ_2_USE ("FALSE"), - .CHAN_BOND_SEQ_LEN (1), + .CHAN_BOND_SEQ_LEN (1'h1), .CLK_CORRECT_USE ("FALSE"), .CLK_COR_KEEP_IDLE ("FALSE"), .CLK_COR_MAX_LAT (12), .CLK_COR_MIN_LAT (8), .CLK_COR_PRECEDENCE ("TRUE"), - .CLK_COR_REPEAT_WAIT (0), + .CLK_COR_REPEAT_WAIT (1'h0), .CLK_COR_SEQ_1_1 (10'b0100000000), .CLK_COR_SEQ_1_2 (10'b0100000000), .CLK_COR_SEQ_1_3 (10'b0100000000), @@ -828,7 +805,7 @@ module util_adxcvr_xch #( .CLK_COR_SEQ_2_4 (10'b0100000000), .CLK_COR_SEQ_2_ENABLE (4'b1111), .CLK_COR_SEQ_2_USE ("FALSE"), - .CLK_COR_SEQ_LEN (1), + .CLK_COR_SEQ_LEN (1'h1), .CPLL_CFG0 (16'b0110011111111010), .CPLL_CFG1 (16'b1010010010010100), .CPLL_CFG2 (16'b1111000000000111), @@ -838,7 +815,7 @@ module util_adxcvr_xch #( .CPLL_INIT_CFG0 (16'b0000000000011110), .CPLL_INIT_CFG1 (8'b00000000), .CPLL_LOCK_CFG (16'b0000000111101000), - .CPLL_REFCLK_DIV (1), + .CPLL_REFCLK_DIV (1'h1), .DDI_CTRL (2'b00), .DDI_REALIGN_WAIT (15), .DEC_MCOMMA_DETECT ("TRUE"), @@ -1057,7 +1034,7 @@ module util_adxcvr_xch #( .RX_EYESCAN_VS_RANGE (2'b00), .RX_EYESCAN_VS_UT_SIGN (1'b0), .RX_FABINT_USRCLK_FLOP (1'b0), - .RX_INT_DATAWIDTH (1), + .RX_INT_DATAWIDTH (1'h1), .RX_PMA_POWER_SAVE (1'b0), .RX_PROGDIV_CFG (20.0), .RX_SAMPLE_PERIOD (3'b101), @@ -1141,7 +1118,7 @@ module util_adxcvr_xch #( .TX_EML_PHI_TUNE (1'b0), .TX_FABINT_USRCLK_FLOP (1'b0), .TX_IDLE_DATA_ZERO (1'b0), - .TX_INT_DATAWIDTH (1), + .TX_INT_DATAWIDTH (1'h1), .TX_LOOPBACK_DRIVE_HIZ ("FALSE"), .TX_MAINCURSOR_SEL (1'b0), .TX_MARGIN_FULL_0 (7'b1001111), @@ -1542,7 +1519,7 @@ module util_adxcvr_xch #( .ADAPT_CFG2 (16'h0000), .ALIGN_COMMA_DOUBLE ("FALSE"), .ALIGN_COMMA_ENABLE (10'b1111111111), - .ALIGN_COMMA_WORD (1), + .ALIGN_COMMA_WORD (1'h1), .ALIGN_MCOMMA_DET ("TRUE"), .ALIGN_MCOMMA_VALUE (10'b1010000011), .ALIGN_PCOMMA_DET ("TRUE"), @@ -1557,7 +1534,7 @@ module util_adxcvr_xch #( .CDR_SWAP_MODE_EN (1'b0), .CFOK_PWRSVE_EN (1'b1), .CHAN_BOND_KEEP_ALIGN ("FALSE"), - .CHAN_BOND_MAX_SKEW (1), + .CHAN_BOND_MAX_SKEW (1'h1), .CHAN_BOND_SEQ_1_1 (10'b0000000000), .CHAN_BOND_SEQ_1_2 (10'b0000000000), .CHAN_BOND_SEQ_1_3 (10'b0000000000), @@ -1569,7 +1546,7 @@ module util_adxcvr_xch #( .CHAN_BOND_SEQ_2_4 (10'b0000000000), .CHAN_BOND_SEQ_2_ENABLE (4'b1111), .CHAN_BOND_SEQ_2_USE ("FALSE"), - .CHAN_BOND_SEQ_LEN (1), + .CHAN_BOND_SEQ_LEN (1'h1), .CH_HSPMUX (16'h2424), .CKCAL1_CFG_0 (16'b1100000011000000), .CKCAL1_CFG_1 (16'b0101000011000000), @@ -1587,7 +1564,7 @@ module util_adxcvr_xch #( .CLK_COR_MAX_LAT (12), .CLK_COR_MIN_LAT (8), .CLK_COR_PRECEDENCE ("TRUE"), - .CLK_COR_REPEAT_WAIT (0), + .CLK_COR_REPEAT_WAIT (1'h0), .CLK_COR_SEQ_1_1 (10'b0100000000), .CLK_COR_SEQ_1_2 (10'b0100000000), .CLK_COR_SEQ_1_3 (10'b0100000000), @@ -1599,7 +1576,7 @@ module util_adxcvr_xch #( .CLK_COR_SEQ_2_4 (10'b0100000000), .CLK_COR_SEQ_2_ENABLE (4'b1111), .CLK_COR_SEQ_2_USE ("FALSE"), - .CLK_COR_SEQ_LEN (1), + .CLK_COR_SEQ_LEN (1'h1), .CPLL_CFG0 (16'h01fa), .CPLL_CFG1 (16'h0023), .CPLL_CFG2 (16'h0002), @@ -1608,7 +1585,7 @@ module util_adxcvr_xch #( .CPLL_FBDIV_45 (5), .CPLL_INIT_CFG0 (16'h02b2), .CPLL_LOCK_CFG (16'h01e8), - .CPLL_REFCLK_DIV (1), + .CPLL_REFCLK_DIV (1'h1), .CTLE3_OCAP_EXT_CTRL (3'b000), .CTLE3_OCAP_EXT_EN (1'b0), .DDI_CTRL (2'b00), @@ -1698,7 +1675,7 @@ module util_adxcvr_xch #( .PD_TRANS_TIME_FROM_P2 (12'h03c), .PD_TRANS_TIME_NONE_P2 (8'h19), .PD_TRANS_TIME_TO_P2 (8'h64), - .PREIQ_FREQ_BST (0), + .PREIQ_FREQ_BST (1'h0), .PROCESS_PAR (3'b010), .RATE_SW_USE_DRP (1'b1), .RCLK_SIPO_DLY_ENB (1'b0), @@ -1861,7 +1838,7 @@ module util_adxcvr_xch #( .RX_DFELPM_KLKH_AGC_STUP_EN (1'b1), .RX_DFE_AGC_CFG0 (2'b10), .RX_DFE_AGC_CFG1 (4), - .RX_DFE_KL_LPM_KH_CFG0 (1), + .RX_DFE_KL_LPM_KH_CFG0 (1'h1), .RX_DFE_KL_LPM_KH_CFG1 (4), .RX_DFE_KL_LPM_KL_CFG0 (2'b01), .RX_DFE_KL_LPM_KL_CFG1 (4), @@ -1877,7 +1854,7 @@ module util_adxcvr_xch #( .RX_EYESCAN_VS_RANGE (2'b00), .RX_EYESCAN_VS_UT_SIGN (1'b0), .RX_FABINT_USRCLK_FLOP (1'b0), - .RX_INT_DATAWIDTH (1), + .RX_INT_DATAWIDTH (1'h1), .RX_PMA_POWER_SAVE (1'b0), .RX_PMA_RSV0 (16'h0000), .RX_PROGDIV_CFG (0.000000), @@ -1911,7 +1888,7 @@ module util_adxcvr_xch #( .SIM_RECEIVER_DETECT_PASS ("TRUE"), .SIM_RESET_SPEEDUP ("TRUE"), .SIM_TX_EIDLE_DRIVE_LEVEL ("Z"), - .SIM_VERSION (1), + .SIM_VERSION (1'h1), .SRSTMODE (1'b0), .TAPDLY_SET_TX (2'h0), .TEMPERATURE_PAR (4'b0010), @@ -1971,7 +1948,7 @@ module util_adxcvr_xch #( .TX_FABINT_USRCLK_FLOP (1'b0), .TX_FIFO_BYP_EN (1'b0), .TX_IDLE_DATA_ZERO (1'b0), - .TX_INT_DATAWIDTH (1), + .TX_INT_DATAWIDTH (1'h1), .TX_LOOPBACK_DRIVE_HIZ ("FALSE"), .TX_MAINCURSOR_SEL (1'b0), .TX_MARGIN_FULL_0 (7'b1011111), @@ -1987,7 +1964,7 @@ module util_adxcvr_xch #( .TX_PHICAL_CFG0 (16'h0000), .TX_PHICAL_CFG1 (16'h7e00), .TX_PHICAL_CFG2 (16'h0201), - .TX_PI_BIASSET (1), + .TX_PI_BIASSET (1'h1), .TX_PI_IBIAS_MID (2'b00), .TX_PMADATA_OPT (1'b0), .TX_PMA_POWER_SAVE (1'b0), diff --git a/library/xilinx/util_adxcvr/util_adxcvr_xcm.v b/library/xilinx/util_adxcvr/util_adxcvr_xcm.v index fa94f3cdf..6c65ec311 100644 --- a/library/xilinx/util_adxcvr/util_adxcvr_xcm.v +++ b/library/xilinx/util_adxcvr/util_adxcvr_xcm.v @@ -43,9 +43,9 @@ module util_adxcvr_xcm #( parameter integer XCVR_ID = 0, parameter integer XCVR_TYPE = 0, - parameter integer QPLL_REFCLK_DIV = 2, + parameter integer QPLL_REFCLK_DIV = 1, parameter integer QPLL_FBDIV_RATIO = 1, - parameter [26:0] QPLL_CFG = 27'h06801C1, + parameter [26:0] QPLL_CFG = 27'h0680181, parameter [ 9:0] QPLL_FBDIV = 10'b0000110000) ( // reset and clocks @@ -119,11 +119,11 @@ module util_adxcvr_xcm #( generate if (XCVR_TYPE == 0) begin GTXE2_COMMON #( - .SIM_RESET_SPEEDUP ("TRUE"), - .SIM_QPLLREFCLK_SEL (3'b001), - .SIM_VERSION ("3.0"), .BIAS_CFG (64'h0000040000001000), .COMMON_CFG (32'h00000000), + .IS_DRPCLK_INVERTED (1'b0), + .IS_GTGREFCLK_INVERTED (1'b0), + .IS_QPLLLOCKDETCLK_INVERTED (1'b0), .QPLL_CFG (QPLL_CFG), .QPLL_CLKOUT_CFG (4'b0000), .QPLL_COARSE_FREQ_OVRD (6'b010000), @@ -137,43 +137,43 @@ module util_adxcvr_xcm #( .QPLL_INIT_CFG (24'h000006), .QPLL_LOCK_CFG (16'h21E8), .QPLL_LPF (4'b1111), - .QPLL_REFCLK_DIV (QPLL_REFCLK_DIV)) + .QPLL_REFCLK_DIV (QPLL_REFCLK_DIV), + .SIM_QPLLREFCLK_SEL (3'b001), + .SIM_RESET_SPEEDUP ("TRUE"), + .SIM_VERSION ("4.0")) i_gtxe2_common ( - .DRPCLK (up_clk), - .DRPEN (up_enb_int), + .BGBYPASSB (1'h1), + .BGMONITORENB (1'h1), + .BGPDB (1'h1), + .BGRCALOVRD (5'h1f), .DRPADDR (up_addr_int[7:0]), - .DRPWE (up_wr_int), + .DRPCLK (up_clk), .DRPDI (up_wdata_int), .DRPDO (up_rdata_s), + .DRPEN (up_enb_int), .DRPRDY (up_ready_s), - .GTGREFCLK (1'd0), - .GTNORTHREFCLK0 (1'd0), - .GTNORTHREFCLK1 (1'd0), + .DRPWE (up_wr_int), + .GTGREFCLK (1'h0), + .GTNORTHREFCLK0 (1'h0), + .GTNORTHREFCLK1 (1'h0), .GTREFCLK0 (qpll_ref_clk), - .GTREFCLK1 (1'd0), - .GTSOUTHREFCLK0 (1'd0), - .GTSOUTHREFCLK1 (1'd0), - .QPLLDMONITOR (), - .QPLLOUTCLK (qpll2ch_clk), - .QPLLOUTREFCLK (qpll2ch_ref_clk), - .REFCLKOUTMONITOR (), - .QPLLFBCLKLOST (), + .GTREFCLK1 (1'h0), + .GTSOUTHREFCLK0 (1'h0), + .GTSOUTHREFCLK1 (1'h0), + .PMARSVD (8'h0), .QPLLLOCK (qpll2ch_locked), .QPLLLOCKDETCLK (up_clk), - .QPLLLOCKEN (1'd1), - .QPLLOUTRESET (1'd0), - .QPLLPD (1'd0), + .QPLLLOCKEN (1'h1), + .QPLLOUTCLK (qpll2ch_clk), + .QPLLOUTREFCLK (qpll2ch_ref_clk), + .QPLLOUTRESET (1'h0), + .QPLLPD (1'h0), .QPLLREFCLKLOST (), - .QPLLREFCLKSEL (3'b001), + .QPLLREFCLKSEL (3'h1), .QPLLRESET (up_qpll_rst), - .QPLLRSVD1 (16'b0000000000000000), - .QPLLRSVD2 (5'b11111), - .BGBYPASSB (1'd1), - .BGMONITORENB (1'd1), - .BGPDB (1'd1), - .BGRCALOVRD (5'b00000), - .PMARSVD (8'b00000000), - .RCALENB (1'd1)); + .QPLLRSVD1 (16'h0), + .QPLLRSVD2 (5'h1f), + .RCALENB (1'h1)); end endgenerate @@ -406,7 +406,7 @@ module util_adxcvr_xcm #( .SDM1INITSEED0_1 (9'b000010001), .SIM_MODE ("FAST"), .SIM_RESET_SPEEDUP ("TRUE"), - .SIM_VERSION (1)) + .SIM_VERSION (1'h1)) i_gthe4_common ( .BGBYPASSB (1'd1), .BGMONITORENB (1'd1),