common/mitx045: Remove carrier support
parent
449911fd8f
commit
1c75c7b9ca
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@ -1,229 +0,0 @@
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# create board design
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# default ports
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:ddrx_rtl:1.0 ddr
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 iic_main
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create_bd_intf_port -mode Master -vlnv xilinx.com:display_processing_system7:fixedio_rtl:1.0 fixed_io
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create_bd_port -dir O spi0_csn_2_o
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create_bd_port -dir O spi0_csn_1_o
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create_bd_port -dir O spi0_csn_0_o
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create_bd_port -dir I spi0_csn_i
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create_bd_port -dir I spi0_clk_i
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create_bd_port -dir O spi0_clk_o
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create_bd_port -dir I spi0_sdo_i
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create_bd_port -dir O spi0_sdo_o
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create_bd_port -dir I spi0_sdi_i
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create_bd_port -dir O spi1_csn_2_o
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create_bd_port -dir O spi1_csn_1_o
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create_bd_port -dir O spi1_csn_0_o
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create_bd_port -dir I spi1_csn_i
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create_bd_port -dir I spi1_clk_i
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create_bd_port -dir O spi1_clk_o
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create_bd_port -dir I spi1_sdo_i
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create_bd_port -dir O spi1_sdo_o
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create_bd_port -dir I spi1_sdi_i
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create_bd_port -dir I -from 63 -to 0 gpio_i
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create_bd_port -dir O -from 63 -to 0 gpio_o
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create_bd_port -dir O -from 63 -to 0 gpio_t
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# hdmi interface
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create_bd_port -dir O hdmi_out_clk
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create_bd_port -dir O hdmi_hsync
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create_bd_port -dir O hdmi_vsync
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create_bd_port -dir O hdmi_data_e
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create_bd_port -dir O -from 15 -to 0 hdmi_data
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# i2s
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create_bd_port -dir O -type clk i2s_mclk
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create_bd_intf_port -mode Master -vlnv analog.com:interface:i2s_rtl:1.0 i2s
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# spdif audio
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create_bd_port -dir O spdif
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# instance: sys_ps7
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ad_ip_instance processing_system7 sys_ps7
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source $ad_hdl_dir/projects/common/mitx045/mitx045_system_ps7.tcl
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ad_ip_parameter sys_ps7 CONFIG.PCW_TTC0_PERIPHERAL_ENABLE 0
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ad_ip_parameter sys_ps7 CONFIG.PCW_EN_CLK1_PORT 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_EN_RST1_PORT 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_EN_CLK2_PORT 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_EN_RST2_PORT 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_FPGA0_PERIPHERAL_FREQMHZ 100.0
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ad_ip_parameter sys_ps7 CONFIG.PCW_FPGA1_PERIPHERAL_FREQMHZ 200.0
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ad_ip_parameter sys_ps7 CONFIG.PCW_FPGA2_PERIPHERAL_FREQMHZ 200.0
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ad_ip_parameter sys_ps7 CONFIG.PCW_USE_FABRIC_INTERRUPT 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_IRQ_F2P_INTR 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_GPIO_EMIO_GPIO_ENABLE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_GPIO_EMIO_GPIO_IO 64
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ad_ip_parameter sys_ps7 CONFIG.PCW_USE_DMA0 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_USE_DMA1 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_USE_DMA2 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_IRQ_F2P_MODE REVERSE
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ad_ip_parameter sys_ps7 CONFIG.PCW_SPI0_PERIPHERAL_ENABLE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_SPI0_SPI0_IO EMIO
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ad_ip_parameter sys_ps7 CONFIG.PCW_SPI1_PERIPHERAL_ENABLE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_SPI1_SPI1_IO EMIO
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ad_ip_instance axi_iic axi_iic_main
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ad_ip_parameter axi_iic_main CONFIG.USE_BOARD_FLOW true
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ad_ip_parameter axi_iic_main CONFIG.IIC_BOARD_INTERFACE Custom
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ad_ip_instance xlconcat sys_concat_intc
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ad_ip_parameter sys_concat_intc CONFIG.NUM_PORTS 16
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ad_ip_instance proc_sys_reset sys_rstgen
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ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1
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# hdmi peripherals
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ad_ip_instance axi_clkgen axi_hdmi_clkgen
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ad_ip_instance axi_hdmi_tx axi_hdmi_core
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ad_ip_parameter axi_hdmi_core CONFIG.INTERFACE 16_BIT
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ad_ip_instance axi_vdma axi_hdmi_dma
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ad_ip_parameter axi_hdmi_dma CONFIG.C_M_AXIS_MM2S_TDATA_WIDTH 64
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ad_ip_parameter axi_hdmi_dma CONFIG.C_USE_MM2S_FSYNC 1
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ad_ip_parameter axi_hdmi_dma CONFIG.C_INCLUDE_S2MM 0
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# audio peripherals
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ad_ip_instance clk_wiz sys_audio_clkgen
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ad_ip_parameter sys_audio_clkgen CONFIG.CLKOUT1_REQUESTED_OUT_FREQ 12.288
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ad_ip_parameter sys_audio_clkgen CONFIG.USE_LOCKED false
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ad_ip_parameter sys_audio_clkgen CONFIG.USE_RESET true
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ad_ip_parameter sys_audio_clkgen CONFIG.USE_PHASE_ALIGNMENT false
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ad_ip_parameter sys_audio_clkgen CONFIG.RESET_TYPE ACTIVE_LOW
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ad_ip_parameter sys_audio_clkgen CONFIG.PRIM_SOURCE No_buffer
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ad_ip_instance axi_spdif_tx axi_spdif_tx_core
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ad_ip_parameter axi_spdif_tx_core CONFIG.DMA_TYPE 1
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ad_ip_parameter axi_spdif_tx_core CONFIG.S_AXI_ADDRESS_WIDTH 16
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ad_ip_instance axi_i2s_adi axi_i2s_adi
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ad_ip_parameter axi_i2s_adi CONFIG.DMA_TYPE 1
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ad_ip_parameter axi_i2s_adi CONFIG.S_AXI_ADDRESS_WIDTH 16
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# system reset/clock definitions
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ad_connect sys_cpu_clk sys_ps7/FCLK_CLK0
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ad_connect sys_200m_clk sys_ps7/FCLK_CLK1
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ad_connect sys_cpu_reset sys_rstgen/peripheral_reset
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ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn
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ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk
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ad_connect sys_rstgen/ext_reset_in sys_ps7/FCLK_RESET0_N
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# interface connections
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ad_connect ddr sys_ps7/DDR
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ad_connect gpio_i sys_ps7/GPIO_I
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ad_connect gpio_o sys_ps7/GPIO_O
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ad_connect gpio_t sys_ps7/GPIO_T
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ad_connect fixed_io sys_ps7/FIXED_IO
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ad_connect iic_main axi_iic_main/iic
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ad_connect sys_200m_clk axi_hdmi_clkgen/clk
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# spi connections
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ad_connect spi0_csn_2_o sys_ps7/SPI0_SS2_O
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ad_connect spi0_csn_1_o sys_ps7/SPI0_SS1_O
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ad_connect spi0_csn_0_o sys_ps7/SPI0_SS_O
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ad_connect spi0_csn_i sys_ps7/SPI0_SS_I
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ad_connect spi0_clk_i sys_ps7/SPI0_SCLK_I
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ad_connect spi0_clk_o sys_ps7/SPI0_SCLK_O
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ad_connect spi0_sdo_i sys_ps7/SPI0_MOSI_I
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ad_connect spi0_sdo_o sys_ps7/SPI0_MOSI_O
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ad_connect spi0_sdi_i sys_ps7/SPI0_MISO_I
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ad_connect spi1_csn_2_o sys_ps7/SPI1_SS2_O
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ad_connect spi1_csn_1_o sys_ps7/SPI1_SS1_O
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ad_connect spi1_csn_0_o sys_ps7/SPI1_SS_O
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ad_connect spi1_csn_i sys_ps7/SPI1_SS_I
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ad_connect spi1_clk_i sys_ps7/SPI1_SCLK_I
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ad_connect spi1_clk_o sys_ps7/SPI1_SCLK_O
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ad_connect spi1_sdo_i sys_ps7/SPI1_MOSI_I
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ad_connect spi1_sdo_o sys_ps7/SPI1_MOSI_O
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ad_connect spi1_sdi_i sys_ps7/SPI1_MISO_I
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# hdmi
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ad_connect sys_cpu_clk axi_hdmi_core/vdma_clk
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ad_connect sys_cpu_clk axi_hdmi_dma/m_axis_mm2s_aclk
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ad_connect axi_hdmi_core/hdmi_clk axi_hdmi_clkgen/clk_0
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ad_connect axi_hdmi_core/hdmi_out_clk hdmi_out_clk
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ad_connect axi_hdmi_core/hdmi_16_hsync hdmi_hsync
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ad_connect axi_hdmi_core/hdmi_16_vsync hdmi_vsync
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ad_connect axi_hdmi_core/hdmi_16_data_e hdmi_data_e
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ad_connect axi_hdmi_core/hdmi_16_data hdmi_data
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ad_connect axi_hdmi_core/vdma_valid axi_hdmi_dma/m_axis_mm2s_tvalid
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ad_connect axi_hdmi_core/vdma_data axi_hdmi_dma/m_axis_mm2s_tdata
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ad_connect axi_hdmi_core/vdma_ready axi_hdmi_dma/m_axis_mm2s_tready
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ad_connect axi_hdmi_core/vdma_fs axi_hdmi_dma/mm2s_fsync
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ad_connect axi_hdmi_core/vdma_fs axi_hdmi_core/vdma_fs_ret
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# spdif audio
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ad_connect sys_cpu_clk axi_spdif_tx_core/DMA_REQ_ACLK
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ad_connect sys_cpu_clk sys_ps7/DMA0_ACLK
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ad_connect sys_cpu_resetn axi_spdif_tx_core/DMA_REQ_RSTN
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ad_connect sys_ps7/DMA0_REQ axi_spdif_tx_core/DMA_REQ
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ad_connect sys_ps7/DMA0_ACK axi_spdif_tx_core/DMA_ACK
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ad_connect sys_200m_clk sys_audio_clkgen/clk_in1
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ad_connect sys_cpu_resetn sys_audio_clkgen/resetn
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ad_connect sys_audio_clkgen/clk_out1 axi_spdif_tx_core/spdif_data_clk
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ad_connect spdif axi_spdif_tx_core/spdif_tx_o
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# i2s audio
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ad_connect sys_cpu_clk axi_i2s_adi/DMA_REQ_RX_ACLK
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ad_connect sys_cpu_clk axi_i2s_adi/DMA_REQ_TX_ACLK
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ad_connect sys_cpu_clk sys_ps7/DMA1_ACLK
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ad_connect sys_cpu_clk sys_ps7/DMA2_ACLK
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ad_connect sys_cpu_resetn axi_i2s_adi/DMA_REQ_RX_RSTN
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ad_connect sys_cpu_resetn axi_i2s_adi/DMA_REQ_TX_RSTN
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ad_connect sys_ps7/DMA1_REQ axi_i2s_adi/DMA_REQ_TX
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ad_connect sys_ps7/DMA1_ACK axi_i2s_adi/DMA_ACK_TX
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ad_connect sys_ps7/DMA2_REQ axi_i2s_adi/DMA_REQ_RX
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ad_connect sys_ps7/DMA2_ACK axi_i2s_adi/DMA_ACK_RX
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ad_connect sys_audio_clkgen/clk_out1 i2s_mclk
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ad_connect sys_audio_clkgen/clk_out1 axi_i2s_adi/DATA_CLK_I
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ad_connect i2s axi_i2s_adi/I2S
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# interrupts
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ad_connect sys_concat_intc/dout sys_ps7/IRQ_F2P
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ad_connect sys_concat_intc/In15 axi_hdmi_dma/mm2s_introut
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ad_connect sys_concat_intc/In14 axi_iic_main/iic2intc_irpt
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ad_connect sys_concat_intc/In13 GND
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ad_connect sys_concat_intc/In12 GND
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ad_connect sys_concat_intc/In11 GND
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ad_connect sys_concat_intc/In10 GND
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ad_connect sys_concat_intc/In9 GND
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ad_connect sys_concat_intc/In8 GND
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ad_connect sys_concat_intc/In7 GND
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ad_connect sys_concat_intc/In6 GND
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ad_connect sys_concat_intc/In5 GND
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ad_connect sys_concat_intc/In4 GND
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ad_connect sys_concat_intc/In3 GND
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ad_connect sys_concat_intc/In2 GND
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ad_connect sys_concat_intc/In1 GND
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ad_connect sys_concat_intc/In0 GND
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# interconnects
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ad_cpu_interconnect 0x41600000 axi_iic_main
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ad_cpu_interconnect 0x79000000 axi_hdmi_clkgen
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ad_cpu_interconnect 0x43000000 axi_hdmi_dma
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ad_cpu_interconnect 0x70e00000 axi_hdmi_core
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ad_cpu_interconnect 0x75c00000 axi_spdif_tx_core
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ad_cpu_interconnect 0x77600000 axi_i2s_adi
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ad_mem_hp0_interconnect sys_cpu_clk sys_ps7/S_AXI_HP0
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ad_mem_hp0_interconnect sys_cpu_clk axi_hdmi_dma/M_AXI_MM2S
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@ -1,58 +0,0 @@
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# constraints
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# hdmi
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set_property -dict {PACKAGE_PIN E15 IOSTANDARD LVCMOS18} [get_ports hdmi_out_clk]
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set_property -dict {PACKAGE_PIN D15 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_vsync]
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set_property -dict {PACKAGE_PIN D14 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_hsync]
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set_property -dict {PACKAGE_PIN E16 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data_e]
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set_property -dict {PACKAGE_PIN G17 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[0]]
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set_property -dict {PACKAGE_PIN G16 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[1]]
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set_property -dict {PACKAGE_PIN H16 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[2]]
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set_property -dict {PACKAGE_PIN J16 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[3]]
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set_property -dict {PACKAGE_PIN G15 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[4]]
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set_property -dict {PACKAGE_PIN F15 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[5]]
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set_property -dict {PACKAGE_PIN J15 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[6]]
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set_property -dict {PACKAGE_PIN K15 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[7]]
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set_property -dict {PACKAGE_PIN F14 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[8]]
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set_property -dict {PACKAGE_PIN G14 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[9]]
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set_property -dict {PACKAGE_PIN F13 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[10]]
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set_property -dict {PACKAGE_PIN G12 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[11]]
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set_property -dict {PACKAGE_PIN E13 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[12]]
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set_property -dict {PACKAGE_PIN D13 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[13]]
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set_property -dict {PACKAGE_PIN F12 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[14]]
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set_property -dict {PACKAGE_PIN E12 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports hdmi_data[15]]
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# spdif
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set_property -dict {PACKAGE_PIN F17 IOSTANDARD LVCMOS18} [get_ports spdif]
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# i2s
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set_property -dict {PACKAGE_PIN C14 IOSTANDARD LVCMOS18} [get_ports i2s_mclk]
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set_property -dict {PACKAGE_PIN B17 IOSTANDARD LVCMOS18} [get_ports i2s_bclk]
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set_property -dict {PACKAGE_PIN A17 IOSTANDARD LVCMOS18} [get_ports i2s_lrclk]
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set_property -dict {PACKAGE_PIN C17 IOSTANDARD LVCMOS18} [get_ports i2s_sdata_out]
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set_property -dict {PACKAGE_PIN B16 IOSTANDARD LVCMOS18} [get_ports i2s_sdata_in]
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# iic
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set_property -dict {PACKAGE_PIN B15 IOSTANDARD LVCMOS18 PULLTYPE PULLUP} [get_ports iic_scl]
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set_property -dict {PACKAGE_PIN A15 IOSTANDARD LVCMOS18 PULLTYPE PULLUP} [get_ports iic_sda]
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# gpio (switches, leds and such)
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set_property -dict {PACKAGE_PIN B14 IOSTANDARD LVCMOS18} [get_ports gpio_bd[0]] ; ## GPIO_DIP_SW4_PB0
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set_property -dict {PACKAGE_PIN A14 IOSTANDARD LVCMOS18} [get_ports gpio_bd[1]] ; ## GPIO_DIP_SW5_PB1
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set_property -dict {PACKAGE_PIN A13 IOSTANDARD LVCMOS18} [get_ports gpio_bd[2]] ; ## GPIO_DIP_SW6_PB2
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set_property -dict {PACKAGE_PIN A12 IOSTANDARD LVCMOS18} [get_ports gpio_bd[3]] ; ## GPIO_DIP_SW7_PB3
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set_property -dict {PACKAGE_PIN C7 IOSTANDARD LVCMOS15} [get_ports gpio_bd[4]] ; ## GPIO_SW_0
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set_property -dict {PACKAGE_PIN B7 IOSTANDARD LVCMOS15} [get_ports gpio_bd[5]] ; ## GPIO_SW_1
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set_property -dict {PACKAGE_PIN A7 IOSTANDARD LVCMOS15} [get_ports gpio_bd[6]] ; ## GPIO_SW_2
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set_property -dict {PACKAGE_PIN B9 IOSTANDARD LVCMOS15} [get_ports gpio_bd[7]] ; ## GPIO_SW_3
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set_property -dict {PACKAGE_PIN A8 IOSTANDARD LVCMOS15} [get_ports gpio_bd[8]] ; ## GPIO_SW_4
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set_property -dict {PACKAGE_PIN A9 IOSTANDARD LVCMOS15} [get_ports gpio_bd[9]] ; ## GPIO_SW_5
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set_property -dict {PACKAGE_PIN B10 IOSTANDARD LVCMOS15} [get_ports gpio_bd[10]] ; ## GPIO_SW_6
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set_property -dict {PACKAGE_PIN A10 IOSTANDARD LVCMOS15} [get_ports gpio_bd[11]] ; ## GPIO_SW_7
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@ -1,110 +0,0 @@
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ad_ip_parameter sys_ps7 CONFIG.PCW_PRESET_BANK0_VOLTAGE {LVCMOS 1.8V}
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ad_ip_parameter sys_ps7 CONFIG.PCW_PRESET_BANK1_VOLTAGE {LVCMOS 1.8V}
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ad_ip_parameter sys_ps7 CONFIG.PCW_GPIO_MIO_GPIO_ENABLE {1}
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ad_ip_parameter sys_ps7 CONFIG.PCW_ENET0_PERIPHERAL_ENABLE {1}
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ad_ip_parameter sys_ps7 CONFIG.PCW_ENET0_ENET0_IO {MIO 16 .. 27}
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ad_ip_parameter sys_ps7 CONFIG.PCW_ENET0_GRP_MDIO_ENABLE {1}
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ad_ip_parameter sys_ps7 CONFIG.PCW_ENET0_GRP_MDIO_IO {MIO 52 .. 53}
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ad_ip_parameter sys_ps7 CONFIG.PCW_ENET0_RESET_ENABLE {1}
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ad_ip_parameter sys_ps7 CONFIG.PCW_ENET0_RESET_IO {MIO 47}
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ad_ip_parameter sys_ps7 CONFIG.PCW_USB0_PERIPHERAL_ENABLE {1}
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ad_ip_parameter sys_ps7 CONFIG.PCW_USB0_RESET_ENABLE {1}
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ad_ip_parameter sys_ps7 CONFIG.PCW_USB0_RESET_IO {MIO 7}
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ad_ip_parameter sys_ps7 CONFIG.PCW_I2C0_PERIPHERAL_ENABLE {1}
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ad_ip_parameter sys_ps7 CONFIG.PCW_I2C0_I2C0_IO {MIO 50 .. 51}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_I2C0_RESET_ENABLE {1}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_I2C0_RESET_IO {MIO 46}
|
||||
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_SD0_PERIPHERAL_ENABLE {1}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_SD0_GRP_CD_ENABLE {1}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_SD0_GRP_CD_IO {MIO 14}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_SD0_GRP_WP_ENABLE {1}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_SDIO_PERIPHERAL_FREQMHZ {50}
|
||||
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UART1_PERIPHERAL_ENABLE {1}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UART_PERIPHERAL_FREQMHZ {50}
|
||||
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_QSPI_PERIPHERAL_ENABLE {1}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_QSPI_GRP_SINGLE_SS_ENABLE {0}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_QSPI_GRP_IO1_ENABLE {1}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_QSPI_GRP_FBCLK_ENABLE {1}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_TTC0_PERIPHERAL_ENABLE {1}
|
||||
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_PARTNO {Custom}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_BUS_WIDTH {32 Bit}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_USE_INTERNAL_VREF {1}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_DRAM_WIDTH {16 Bits}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_DEVICE_CAPACITY {4096 MBits}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_SPEED_BIN {DDR3_1066F}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_COL_ADDR_COUNT {10}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_CL {7}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_CWL {5}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_T_RCD {7}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_T_RP {7}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_T_RC {49.5}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_T_RAS_MIN {36.0}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_T_FAW {45.0}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL {1}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_TRAIN_READ_GATE {1}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_TRAIN_DATA_EYE {1}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0 {0.078}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1 {0.074}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 {-0.059}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 {-0.055}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY0 {0.482}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY1 {0.484}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY2 {0.417}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY3 {0.416}
|
||||
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_16_IOTYPE {HSTL 1.8V}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_16_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_17_IOTYPE {HSTL 1.8V}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_17_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_18_IOTYPE {HSTL 1.8V}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_18_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_19_IOTYPE {HSTL 1.8V}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_19_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_20_IOTYPE {HSTL 1.8V}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_20_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_21_IOTYPE {HSTL 1.8V}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_21_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_22_IOTYPE {HSTL 1.8V}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_22_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_23_IOTYPE {HSTL 1.8V}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_23_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_24_IOTYPE {HSTL 1.8V}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_24_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_25_IOTYPE {HSTL 1.8V}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_25_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_26_IOTYPE {HSTL 1.8V}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_26_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_27_IOTYPE {HSTL 1.8V}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_27_PULLUP {disabled}
|
||||
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_28_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_29_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_30_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_31_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_32_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_33_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_34_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_35_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_36_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_37_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_38_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_39_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_40_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_41_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_42_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_43_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_44_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_45_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_48_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_49_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_52_PULLUP {disabled}
|
||||
ad_ip_parameter sys_ps7 CONFIG.PCW_MIO_53_PULLUP {disabled}
|
||||
|
||||
|
Loading…
Reference in New Issue