common: Added synchronization mechanism to the up_adc_common module
parent
767179dce9
commit
1d26639d73
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@ -53,9 +53,12 @@ module up_adc_common (
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adc_ddr_edgesel,
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adc_pin_mode,
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adc_status,
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adc_sync_status,
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adc_status_ovf,
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adc_status_unf,
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adc_clk_ratio,
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adc_start_code,
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adc_sync,
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// channel interface
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@ -124,9 +127,12 @@ module up_adc_common (
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output adc_ddr_edgesel;
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output adc_pin_mode;
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input adc_status;
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input adc_sync_status;
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input adc_status_ovf;
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input adc_status_unf;
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input [31:0] adc_clk_ratio;
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output [31:0] adc_start_code;
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output adc_sync;
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// channel interface
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@ -199,6 +205,8 @@ module up_adc_common (
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reg up_status_unf = 'd0;
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reg [ 7:0] up_usr_chanmax = 'd0;
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reg [31:0] up_adc_gpio_out = 'd0;
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reg [31:0] up_adc_start_code = 'd0;
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reg up_adc_sync = 'd0;
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reg up_rack = 'd0;
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reg [31:0] up_rdata = 'd0;
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@ -209,8 +217,10 @@ module up_adc_common (
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wire up_preset_s;
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wire up_mmcm_preset_s;
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wire up_status_s;
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wire up_sync_status_s;
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wire up_status_ovf_s;
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wire up_status_unf_s;
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wire up_cntrl_xfer_done;
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wire [31:0] up_adc_clk_count_s;
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wire [ 4:0] up_delay_rdata_s;
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wire up_delay_status_s;
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@ -249,6 +259,7 @@ module up_adc_common (
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up_status_unf <= 'd0;
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up_usr_chanmax <= 'd0;
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up_adc_gpio_out <= 'd0;
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up_adc_start_code <= 'd0;
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end else begin
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up_wack <= up_wreq_s;
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if ((up_wreq_s == 1'b1) && (up_waddr[7:0] == 8'h02)) begin
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@ -258,6 +269,13 @@ module up_adc_common (
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up_mmcm_resetn <= up_wdata[1];
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up_resetn <= up_wdata[0];
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end
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if (up_adc_sync == 1'b1) begin
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if (up_cntrl_xfer_done == 1'b1) begin
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up_adc_sync <= 1'b0;
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end
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end else if ((up_wreq_s == 1'b1) && (up_waddr[7:0] == 8'h11)) begin
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up_adc_sync <= up_wdata[3];
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end
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if ((up_wreq_s == 1'b1) && (up_waddr[7:0] == 8'h11)) begin
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up_adc_r1_mode <= up_wdata[2];
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up_adc_ddr_edgesel <= up_wdata[1];
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@ -288,6 +306,9 @@ module up_adc_common (
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if ((up_wreq_s == 1'b1) && (up_waddr[7:0] == 8'h28)) begin
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up_usr_chanmax <= up_wdata[7:0];
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end
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if ((up_wreq_s == 1'b1) && (up_waddr[7:0] == 8'h29)) begin
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up_adc_start_code <= up_wdata[31:0];
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end
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if ((up_wreq_s == 1'b1) && (up_waddr[7:0] == 8'h2f)) begin
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up_adc_gpio_out <= up_wdata;
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end
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@ -308,17 +329,19 @@ module up_adc_common (
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8'h01: up_rdata <= PCORE_ID;
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8'h02: up_rdata <= up_scratch;
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8'h10: up_rdata <= {30'd0, up_mmcm_resetn, up_resetn};
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8'h11: up_rdata <= {29'd0, up_adc_r1_mode, up_adc_ddr_edgesel, up_adc_pin_mode};
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8'h11: up_rdata <= {28'd0, up_adc_sync, up_adc_r1_mode, up_adc_ddr_edgesel, up_adc_pin_mode};
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8'h15: up_rdata <= up_adc_clk_count_s;
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8'h16: up_rdata <= adc_clk_ratio;
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8'h17: up_rdata <= {28'd0, up_status_pn_err, up_status_pn_oos, up_status_or, up_status_s};
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8'h18: up_rdata <= {14'd0, up_delay_sel, up_delay_rwn, up_delay_addr, 3'd0, up_delay_wdata};
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8'h19: up_rdata <= {22'd0, up_delay_locked_s, up_delay_status_s, 3'd0, up_delay_rdata_s};
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8'h1a: up_rdata <= {31'd0, up_sync_status_s};
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8'h1c: up_rdata <= {3'd0, up_drp_rwn, up_drp_addr, up_drp_wdata};
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8'h1d: up_rdata <= {14'd0, up_drp_locked_s, up_drp_status_s, up_drp_rdata_s};
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8'h22: up_rdata <= {29'd0, up_status_ovf, up_status_unf, 1'b0};
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8'h23: up_rdata <= 32'd8;
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8'h28: up_rdata <= {24'd0, adc_usr_chanmax};
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8'h29: up_rdata <= up_adc_start_code;
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8'h2e: up_rdata <= up_adc_gpio_in;
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8'h2f: up_rdata <= up_adc_gpio_out;
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default: up_rdata <= 0;
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@ -338,31 +361,44 @@ module up_adc_common (
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// adc control & status
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up_xfer_cntrl #(.DATA_WIDTH(3)) i_adc_xfer_cntrl (
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up_xfer_cntrl #(.DATA_WIDTH(4)) i_adc_xfer_cntrl (
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.up_rstn (up_rstn),
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.up_clk (up_clk),
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.up_data_cntrl ({ up_adc_r1_mode,
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.up_data_cntrl ({ up_adc_sync,
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up_adc_r1_mode,
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up_adc_ddr_edgesel,
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up_adc_pin_mode}),
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.up_xfer_done (),
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.up_xfer_done (up_cntrl_xfer_done),
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.d_rst (adc_rst),
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.d_clk (adc_clk),
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.d_data_cntrl ({ adc_r1_mode,
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.d_data_cntrl ({ adc_sync,
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adc_r1_mode,
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adc_ddr_edgesel,
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adc_pin_mode}));
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up_xfer_status #(.DATA_WIDTH(3)) i_adc_xfer_status (
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up_xfer_status #(.DATA_WIDTH(4)) i_adc_xfer_status (
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.up_rstn (up_rstn),
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.up_clk (up_clk),
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.up_data_status ({up_status_s,
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.up_data_status ({up_sync_status_s,
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up_status_s,
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up_status_ovf_s,
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up_status_unf_s}),
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.d_rst (adc_rst),
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.d_clk (adc_clk),
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.d_data_status ({ adc_status,
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.d_data_status ({ adc_sync_status,
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adc_status,
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adc_status_ovf,
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adc_status_unf}));
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up_xfer_cntrl #(.DATA_WIDTH(32)) i_adc_xfer_start_code (
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.up_rstn (up_rstn),
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.up_clk (up_clk),
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.up_data_cntrl (up_adc_start_code),
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.up_xfer_done (),
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.d_rst (adc_rst),
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.d_clk (adc_clk),
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.d_data_cntrl (adc_start_code));
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// adc clock monitor
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up_clock_mon i_adc_clock_mon (
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