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ad_rst: Initial value of the registers should be its default value 

This patch will fix the following critical warning, generated by Quartus:

"Critical Warning (18061): Ignored Power-Up Level option on the following
registers
  Critical Warning (18010): Register ad_rst:i_core_rst_reg|rst_sync will power
  up to High File: ad_rst.v Line: 50"
main
Istvan Csomortani 2018-08-07 13:23:15 +01:00
parent 66bf92ec9f
commit 1e7f567e16
1 changed files with 4 additions and 4 deletions
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8
library/common/ad_rst.v
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@ -45,10 +45,10 @@ module ad_rst (
output reg rst); output reg rst);
// internal registers // internal registers
reg rst_async_d1 = 'd0; reg rst_async_d1 = 1'd1;
reg rst_async_d2 = 'd0; reg rst_async_d2 = 1'd1;
reg rst_sync = 'd0; reg rst_sync = 1'd1;
reg rst_sync_d = 'd0 /* synthesis preserve */; reg rst_sync_d = 1'd1 /* synthesis preserve */;
// simple reset synchronizer // simple reset synchronizer
always @(posedge clk or posedge rst_async) begin always @(posedge clk or posedge rst_async) begin