ad_rst: Initial value of the registers should be its default value
This patch will fix the following critical warning, generated by Quartus: "Critical Warning (18061): Ignored Power-Up Level option on the following registers Critical Warning (18010): Register ad_rst:i_core_rst_reg|rst_sync will power up to High File: ad_rst.v Line: 50"main
parent
66bf92ec9f
commit
1e7f567e16
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@ -45,10 +45,10 @@ module ad_rst (
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output reg rst);
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// internal registers
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reg rst_async_d1 = 'd0;
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reg rst_async_d2 = 'd0;
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reg rst_sync = 'd0;
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reg rst_sync_d = 'd0 /* synthesis preserve */;
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reg rst_async_d1 = 1'd1;
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reg rst_async_d2 = 1'd1;
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reg rst_sync = 1'd1;
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reg rst_sync_d = 1'd1 /* synthesis preserve */;
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// simple reset synchronizer
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always @(posedge clk or posedge rst_async) begin
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