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interfaces-- transceiver cores

main
Rejeesh Kutty 2015-08-14 15:33:36 -04:00
parent 8bb68af29d
commit 2345be2237
1 changed files with 38 additions and 34 deletions
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72
library/interfaces/interfaces_ip.tcl
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@ -3,40 +3,16 @@
source ../scripts/adi_env.tcl source ../scripts/adi_env.tcl
source $ad_hdl_dir/library/scripts/adi_ip.tcl source $ad_hdl_dir/library/scripts/adi_ip.tcl
proc adi_if_ports {dir width name {type none}} { adi_if_define if_gt_qpll
adi_if_ports output 1 qpll_rst reset
adi_if_ports output 1 qpll_ref_clk clock
ipx::add_bus_abstraction_port $name [ipx::current_busabs] adi_if_define if_gt_pll
set_property master_presence required [ipx::get_bus_abstraction_ports $name -of_objects [ipx::current_busabs]] adi_if_ports input 1 pll_rst reset
set_property slave_presence required [ipx::get_bus_abstraction_ports $name -of_objects [ipx::current_busabs]] adi_if_ports output 1 cpll_rst_m reset
set_property master_width $width [ipx::get_bus_abstraction_ports $name -of_objects [ipx::current_busabs]] adi_if_ports output 1 cpll_ref_clk_in clock
set_property slave_width $width [ipx::get_bus_abstraction_ports $name -of_objects [ipx::current_busabs]]
set m_dir "in"
set s_dir "out"
if {$dir eq "output"} {
set m_dir "out"
set s_dir "in"
}
set_property master_direction $m_dir [ipx::get_bus_abstraction_ports $name -of_objects [ipx::current_busabs]]
set_property slave_direction $s_dir [ipx::get_bus_abstraction_ports $name -of_objects [ipx::current_busabs]]
if {$type ne "none"} {
set_property is_${type} true [ipx::get_bus_abstraction_ports $name -of_objects [ipx::current_busabs]]
}
}
ipx::create_abstraction_definition ADI user if_gt_rx_rtl 1.0
ipx::create_bus_definition ADI user if_gt_rx 1.0
set_property xml_file_name if_gt_rx_rtl.xml [ipx::current_busabs]
set_property xml_file_name if_gt_rx.xml [ipx::current_busdef]
set_property bus_type_vlnv ADI:user:if_gt_rx:1.0 [ipx::current_busabs]
ipx::save_abstraction_definition [ipx::current_busabs]
ipx::save_bus_definition [ipx::current_busdef]
adi_if_define if_gt_rx
adi_if_ports output 1 rx_p adi_if_ports output 1 rx_p
adi_if_ports output 1 rx_n adi_if_ports output 1 rx_n
adi_if_ports input 1 rx_rst reset adi_if_ports input 1 rx_rst reset
@ -62,6 +38,34 @@ adi_if_ports input 1 rx_ip_sysref
adi_if_ports output 1 rx_ip_sync adi_if_ports output 1 rx_ip_sync
adi_if_ports input 1 rx_ip_rst_done adi_if_ports input 1 rx_ip_rst_done
ipx::save_bus_definition [ipx::current_busdef] adi_if_define if_gt_tx
ipx::save_abstraction_definition [ipx::current_busabs] adi_if_ports input 1 tx_p
adi_if_ports input 1 tx_n
adi_if_ports input 1 tx_rst reset
adi_if_ports output 1 tx_rst_m reset
adi_if_ports input 1 tx_gt_rst reset
adi_if_ports output 1 tx_gt_rst_m reset
adi_if_ports input 1 tx_pll_locked
adi_if_ports output 1 tx_pll_locked_m
adi_if_ports input 1 tx_user_ready
adi_if_ports output 1 tx_user_ready_m
adi_if_ports input 1 tx_rst_done
adi_if_ports output 1 tx_rst_done_m
adi_if_ports input 1 tx_out_clk clock
adi_if_ports output 1 tx_clk clock
adi_if_ports output 1 tx_sysref
adi_if_ports output 1 tx_sync
adi_if_ports output 32 tx_data
adi_if_ports input 1 tx_ip_rst reset
adi_if_ports input 32 tx_ip_data
adi_if_ports input 1 tx_ip_sysref
adi_if_ports input 1 tx_ip_sync
adi_if_ports input 1 tx_ip_rst_done
adi_if_define if_gt_rx_ksig
adi_if_ports output 4 rx_gt_ilas_f
adi_if_ports output 4 rx_gt_ilas_q
adi_if_ports output 4 rx_gt_ilas_a
adi_if_ports output 4 rx_gt_ilas_r
adi_if_ports output 4 rx_gt_cgs_k