up_adc_common: dma bus width is 0x8 (constant)
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32c2abf4e6
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23a62a92b2
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@ -88,7 +88,6 @@ module up_adc_common (
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up_usr_chanmax,
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adc_usr_chanmax,
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dma_bw,
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// bus interface
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@ -153,7 +152,6 @@ module up_adc_common (
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output [ 7:0] up_usr_chanmax;
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input [ 7:0] adc_usr_chanmax;
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input [31:0] dma_bw;
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// bus interface
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@ -298,7 +296,7 @@ module up_adc_common (
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8'h1c: up_rdata <= {3'd0, up_drp_rwn, up_drp_addr, up_drp_wdata};
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8'h1d: up_rdata <= {14'd0, up_drp_locked_s, up_drp_status_s, up_drp_rdata_s};
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8'h22: up_rdata <= {29'd0, up_status_ovf, up_status_unf, 1'b0};
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8'h23: up_rdata <= dma_bw;
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8'h23: up_rdata <= 32'd8;
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8'h28: up_rdata <= {24'd0, adc_usr_chanmax};
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default: up_rdata <= 0;
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endcase
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