diff --git a/projects/adrv9001/zcu102/system_constr.xdc b/projects/adrv9001/zcu102/system_constr.xdc index fc75ff8bc..14dfdcb4d 100644 --- a/projects/adrv9001/zcu102/system_constr.xdc +++ b/projects/adrv9001/zcu102/system_constr.xdc @@ -36,8 +36,8 @@ set_property -dict {PACKAGE_PIN Y10 IOSTANDARD LVCMOS18} [get_ports spi_en] set_property -dict {PACKAGE_PIN W2 IOSTANDARD LVCMOS18} [get_ports tx1_enable] ; #FMC_HPC0_LA09_P IO_L24P_T3U_N10_66 set_property -dict {PACKAGE_PIN U9 IOSTANDARD LVCMOS18} [get_ports tx2_enable] ; #FMC_HPC0_LA29_P IO_L9P_T1L_N4_AD12P_67 -set_property -dict {PACKAGE_PIN V8 IOSTANDARD LVCMOS18} [get_ports vadj_test_1] ; #FMC_HPC0_LA31_P IO_L7P_T1L_N0_QBC_AD13P_67 -set_property -dict {PACKAGE_PIN V7 IOSTANDARD LVCMOS18} [get_ports vadj_test_2] ; #FMC_HPC0_LA31_N IO_L7N_T1L_N1_QBC_AD13N_67 +set_property -dict {PACKAGE_PIN V8 IOSTANDARD LVCMOS18} [get_ports vadj_err] ; #FMC_HPC0_LA31_P IO_L7P_T1L_N0_QBC_AD13P_67 +set_property -dict {PACKAGE_PIN V7 IOSTANDARD LVCMOS18} [get_ports platform_status] ; #FMC_HPC0_LA31_N IO_L7N_T1L_N1_QBC_AD13N_67 set_property UNAVAILABLE_DURING_CALIBRATION TRUE [get_ports tx1_strobe_out_p] set_property UNAVAILABLE_DURING_CALIBRATION TRUE [get_ports tx2_idata_out_p] diff --git a/projects/adrv9001/zcu102/system_top.v b/projects/adrv9001/zcu102/system_top.v index f59bfd868..f14decbfe 100644 --- a/projects/adrv9001/zcu102/system_top.v +++ b/projects/adrv9001/zcu102/system_top.v @@ -121,8 +121,8 @@ module system_top ( output tx2_strobe_out_p, inout sm_fan_tach, - output vadj_test_1, - output vadj_test_2 + input vadj_err, + output platform_status ); // internal registers reg [ 2:0] mcs_sync_m = 'd0; @@ -165,7 +165,7 @@ module system_top ( // assign mssi_sync = gpio_o[54]; - assign {vadj_test_2,vadj_test_1} = 2'b11; + assign platform_status = vadj_err; ad_iobuf #(.DATA_WIDTH(20)) i_iobuf ( .dio_t ({gpio_t[51:32]}), @@ -196,7 +196,9 @@ module system_top ( assign gpio_i[20: 8] = gpio_bd_i; assign gpio_bd_o = gpio_o[ 7: 0]; - assign gpio_i[94:52] = gpio_o[94:52]; + assign gpio_i[54:52] = gpio_o[54:52]; + assign gpio_i[55] = vadj_err; + assign gpio_i[94:56] = gpio_o[94:56]; assign gpio_i[31:21] = gpio_o[31:21]; assign spi_en = spi_csn[0];