From 243a9bc992f5e106fb94c872ce4b02290bc36415 Mon Sep 17 00:00:00 2001 From: Adrian Costina Date: Thu, 2 Apr 2015 15:30:02 +0300 Subject: [PATCH] fmcomms1: AC701 update project to new framework --- projects/fmcomms1/ac701/system_bd.tcl | 1 + projects/fmcomms1/ac701/system_constr.xdc | 3 - projects/fmcomms1/ac701/system_project.tcl | 4 +- projects/fmcomms1/ac701/system_top.v | 84 +++++++--------------- 4 files changed, 29 insertions(+), 63 deletions(-) diff --git a/projects/fmcomms1/ac701/system_bd.tcl b/projects/fmcomms1/ac701/system_bd.tcl index 3ad6610d3..3365e82ed 100644 --- a/projects/fmcomms1/ac701/system_bd.tcl +++ b/projects/fmcomms1/ac701/system_bd.tcl @@ -1,4 +1,5 @@ source $ad_hdl_dir/projects/common/ac701/ac701_system_bd.tcl + source $ad_hdl_dir/projects/common/xilinx/sys_wfifo.tcl source ../common/fmcomms1_bd.tcl diff --git a/projects/fmcomms1/ac701/system_constr.xdc b/projects/fmcomms1/ac701/system_constr.xdc index c7647660d..5edbb533e 100644 --- a/projects/fmcomms1/ac701/system_constr.xdc +++ b/projects/fmcomms1/ac701/system_constr.xdc @@ -157,6 +157,3 @@ set_property DIFF_TERM TRUE [get_ports {adc_data_in_n[13]}] create_clock -period 2.000 -name dac_clk_in [get_ports dac_clk_in_p] create_clock -period 4.000 -name adc_clk_in [get_ports adc_clk_in_p] create_clock -period 8.000 -name dac_div_clk [get_pins i_system_wrapper/system_i/axi_ad9122/dac_div_clk] - -set_false_path -from [get_pins i_system_wrapper/system_i/axi_ad9643_dma/inst/i_request_arb/i_src_dma_fifo/overflow_reg/C] \ - -to [get_pins i_system_wrapper/system_i/sys_wfifo/wfifo_ctl/inst/m_wovf_m1_reg/D] diff --git a/projects/fmcomms1/ac701/system_project.tcl b/projects/fmcomms1/ac701/system_project.tcl index 5c9a3a384..e20e230cd 100644 --- a/projects/fmcomms1/ac701/system_project.tcl +++ b/projects/fmcomms1/ac701/system_project.tcl @@ -1,13 +1,13 @@ - - source ../../scripts/adi_env.tcl source $ad_hdl_dir/projects/scripts/adi_project.tcl +source $ad_hdl_dir/projects/scripts/adi_board.tcl adi_project_create fmcomms1_ac701 adi_project_files fmcomms1_ac701 [list \ "system_top.v" \ "system_constr.xdc"\ + "$ad_hdl_dir/library/common/ad_iobuf.v" \ "$ad_hdl_dir/projects/common/ac701/ac701_system_constr.xdc" ] set_property PROCESSING_ORDER EARLY [get_files $ad_hdl_dir/projects/common/ac701/ac701_system_constr.xdc] diff --git a/projects/fmcomms1/ac701/system_top.v b/projects/fmcomms1/ac701/system_top.v index d1a39c5e0..f15db56d5 100644 --- a/projects/fmcomms1/ac701/system_top.v +++ b/projects/fmcomms1/ac701/system_top.v @@ -77,8 +77,7 @@ module system_top ( fan_pwm, gpio_lcd, - gpio_led, - gpio_sw, + gpio_bd, iic_rstn, iic_scl, @@ -101,15 +100,7 @@ module system_top ( adc_data_in_n, ref_clk_out_p, - ref_clk_out_n, - - hdmi_out_clk, - hdmi_hsync, - hdmi_vsync, - hdmi_data_e, - hdmi_data, - - spdif); + ref_clk_out_n); input sys_rst; input sys_clk_p; @@ -147,8 +138,7 @@ module system_top ( output fan_pwm; inout [ 6:0] gpio_lcd; - inout [ 3:0] gpio_led; - inout [ 8:0] gpio_sw; + inout [12:0] gpio_bd; output iic_rstn; inout iic_scl; @@ -173,14 +163,6 @@ module system_top ( output ref_clk_out_p; output ref_clk_out_n; - output hdmi_out_clk; - output hdmi_hsync; - output hdmi_vsync; - output hdmi_data_e; - output [23:0] hdmi_data; - - output spdif; - // internal registers reg [63:0] dac_ddata_0 = 'd0; @@ -192,6 +174,9 @@ module system_top ( // internal signals + wire [63:0] gpio_i; + wire [63:0] gpio_o; + wire [63:0] gpio_t; wire dac_clk; wire dac_valid_0; wire dac_enable_0; @@ -207,14 +192,21 @@ module system_top ( wire [15:0] adc_data_1; wire ref_clk; wire oddr_ref_clk; - wire [31:0] mb_intrs; // assignments - assign mgt_clk_sel = 2'd0; + assign mgt_clk_sel = 2'd0; + assign fan_pwm = 1'b1; + assign iic_rstn = 1'b1; // instantiations + ad_iobuf #(.DATA_WIDTH(13)) i_iobuf_sw_led ( + .dt (gpio_t[12:0]), + .di (gpio_o[12:0]), + .do (gpio_i[12:0]), + .dio(gpio_bd)); + ODDR #( .DDR_CLK_EDGE ("SAME_EDGE"), .INIT (1'b0), @@ -279,42 +271,20 @@ module system_top ( .ddr3_ras_n (ddr3_ras_n), .ddr3_reset_n (ddr3_reset_n), .ddr3_we_n (ddr3_we_n), - .fan_pwm (fan_pwm), .gpio_lcd_tri_io (gpio_lcd), - .gpio_led_tri_io (gpio_led), - .gpio_sw_tri_io (gpio_sw), - .hdmi_data (hdmi_data), - .hdmi_data_e (hdmi_data_e), - .hdmi_hsync (hdmi_hsync), - .hdmi_out_clk (hdmi_out_clk), - .hdmi_vsync (hdmi_vsync), + .gpio0_o (gpio_o[31:0]), + .gpio0_t (gpio_t[31:0]), + .gpio0_i (gpio_i[31:0]), + .gpio1_o (gpio_o[63:32]), + .gpio1_t (gpio_t[63:32]), + .gpio1_i (gpio_i[63:32]), .iic_main_scl_io (iic_scl), .iic_main_sda_io (iic_sda), - .iic_rstn (iic_rstn), - .mb_intr_10 (mb_intrs[10]), - .mb_intr_11 (mb_intrs[11]), - .mb_intr_12 (mb_intrs[12]), - .mb_intr_13 (mb_intrs[13]), - .mb_intr_14 (mb_intrs[14]), - .mb_intr_15 (mb_intrs[15]), - .mb_intr_16 (mb_intrs[16]), - .mb_intr_17 (mb_intrs[17]), - .mb_intr_18 (mb_intrs[18]), - .mb_intr_19 (mb_intrs[19]), - .mb_intr_20 (mb_intrs[20]), - .mb_intr_21 (mb_intrs[21]), - .mb_intr_22 (mb_intrs[22]), - .mb_intr_23 (mb_intrs[23]), - .mb_intr_24 (mb_intrs[24]), - .mb_intr_25 (mb_intrs[25]), - .mb_intr_26 (mb_intrs[26]), - .mb_intr_27 (mb_intrs[27]), - .mb_intr_28 (mb_intrs[28]), - .mb_intr_29 (mb_intrs[29]), - .mb_intr_30 (mb_intrs[30]), - .mb_intr_31 (mb_intrs[31]), - .ad9122_dma_irq (mb_intrs[12]), - .ad9643_dma_irq (mb_intrs[13]), + .mb_intr_06 (1'b0), + .mb_intr_07 (1'b0), + .mb_intr_08 (1'b0), + .mb_intr_14 (1'b0), + .mb_intr_15 (1'b0), .adc_clk (adc_clk), .adc_clk_in_n (adc_clk_in_n), .adc_clk_in_p (adc_clk_in_p), @@ -322,7 +292,6 @@ module system_top ( .adc_data_1 (adc_data_1), .adc_data_in_n (adc_data_in_n), .adc_data_in_p (adc_data_in_p), - .adc_dma_sync (1'b1), .adc_dma_wdata (adc_dma_wdata), .adc_dma_wr (adc_dma_wr), .adc_enable_0 (adc_enable_0), @@ -358,7 +327,6 @@ module system_top ( .rgmii_td (phy_tx_data), .rgmii_tx_ctl (phy_tx_ctrl), .rgmii_txc (phy_tx_clk), - .spdif (spdif), .sys_clk_n (sys_clk_n), .sys_clk_p (sys_clk_p), .sys_rst (sys_rst),