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spi_engine: Set up default driver value for input ports

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Istvan Csomortani 2017-02-07 12:30:46 +02:00
parent 47db0d80fe
commit 24daffcf5c
2 changed files with 8 additions and 0 deletions
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4
library/spi_engine/axi_spi_engine/axi_spi_engine_ip.tcl
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@ -56,4 +56,8 @@ adi_add_bus "spi_engine_offload_ctrl0" "master" \
adi_add_bus_clock "s_axi_aclk" "spi_engine_offload_ctrl0:s_axi" "s_axi_aresetn" adi_add_bus_clock "s_axi_aclk" "spi_engine_offload_ctrl0:s_axi" "s_axi_aresetn"
foreach port {"up_clk" "up_rstn" "up_wreq" "up_waddr" "up_wdata" "up_rreq" "up_raddr"} {
set_property DRIVER_VALUE "0" [ipx::get_ports $port]
}
ipx::save_core [ipx::current_core] ipx::save_core [ipx::current_core]

4
library/spi_engine/spi_engine_execution/spi_engine_execution_ip.tcl
View File

@ -43,4 +43,8 @@ adi_add_bus "spi" "master" \
} }
adi_add_bus_clock "clk" "spi" "resetn" adi_add_bus_clock "clk" "spi" "resetn"
foreach port {"sdi_1" "sdi_2" "sdi_3"} {
set_property DRIVER_VALUE "0" [ipx::get_ports $port]
}
ipx::save_core [ipx::current_core] ipx::save_core [ipx::current_core]