diff --git a/projects/common/pzsdr/pzsdr_system_bd.tcl b/projects/common/pzsdr/pzsdr_system_bd.tcl index 1eca33b75..6c442708f 100644 --- a/projects/common/pzsdr/pzsdr_system_bd.tcl +++ b/projects/common/pzsdr/pzsdr_system_bd.tcl @@ -153,7 +153,6 @@ ad_connect sys_concat_intc/In0 ps_intr_00 # interconnects ad_cpu_interconnect 0x41600000 axi_iic_main -ad_mem_hp0_interconnect sys_cpu_clk sys_ps7/S_AXI_HP0 # module ad9361 diff --git a/projects/common/pzsdr/pzsdr_system_constr.xdc b/projects/common/pzsdr/pzsdr_system_constr.xdc index 62ed4c56f..5fcd81103 100644 --- a/projects/common/pzsdr/pzsdr_system_constr.xdc +++ b/projects/common/pzsdr/pzsdr_system_constr.xdc @@ -70,6 +70,21 @@ set_property -dict {PACKAGE_PIN A12 IOSTANDARD LVCMOS18} [get_ports spi_miso] set_property -dict {PACKAGE_PIN AF24 IOSTANDARD LVCMOS25 PULLTYPE PULLUP} [get_ports iic_scl] ; ## IO_L5P_T0_13 set_property -dict {PACKAGE_PIN AF25 IOSTANDARD LVCMOS25 PULLTYPE PULLUP} [get_ports iic_sda] ; ## IO_L5N_T0_13 +# gpio + +set_property -dict {PACKAGE_PIN J3 IOSTANDARD LVCMOS18} [get_ports gpio_bd[0]] ; ## (pb) IO_L12N_T1_MRCC_33 +set_property -dict {PACKAGE_PIN D8 IOSTANDARD LVCMOS18} [get_ports gpio_bd[1]] ; ## (pb) IO_L8N_T1_34 +set_property -dict {PACKAGE_PIN F9 IOSTANDARD LVCMOS18} [get_ports gpio_bd[2]] ; ## (pb) IO_L9P_T1_DQS_34 +set_property -dict {PACKAGE_PIN E8 IOSTANDARD LVCMOS18} [get_ports gpio_bd[3]] ; ## (pb) IO_L9N_T1_DQS_34 +set_property -dict {PACKAGE_PIN A8 IOSTANDARD LVCMOS18} [get_ports gpio_bd[4]] ; ## (led) IO_L17N_T2_34 +set_property -dict {PACKAGE_PIN W14 IOSTANDARD LVCMOS25} [get_ports gpio_bd[5]] ; ## (led) IO_0_12 +set_property -dict {PACKAGE_PIN W17 IOSTANDARD LVCMOS25} [get_ports gpio_bd[6]] ; ## (led) IO_25_12 +set_property -dict {PACKAGE_PIN Y16 IOSTANDARD LVCMOS25} [get_ports gpio_bd[7]] ; ## (led) IO_L23P_T3_12 +set_property -dict {PACKAGE_PIN Y15 IOSTANDARD LVCMOS25} [get_ports gpio_bd[8]] ; ## (dip) IO_L23N_T3_12 +set_property -dict {PACKAGE_PIN W16 IOSTANDARD LVCMOS25} [get_ports gpio_bd[9]] ; ## (dip) IO_L24P_T3_12 +set_property -dict {PACKAGE_PIN W15 IOSTANDARD LVCMOS25} [get_ports gpio_bd[10]] ; ## (dip) IO_L24N_T3_12 +set_property -dict {PACKAGE_PIN V19 IOSTANDARD LVCMOS25} [get_ports gpio_bd[11]] ; ## (dip) IO_0_13 + # clocks create_clock -name rx_clk -period 4 [get_ports rx_clk_in_p]