Add shared project top-level Makefile
The project top-level Makefile accept the all, clean and clean-all targets and forward them to their sub-projects. Create a common Makefile include that can be used to implement this behavior. The shared Makefile collects all sub-directories that have a Makefile and then forwards the all, clean and clean-all targets to them. This is implemented by creating virtual targets for each combination of sub-project and all, clean, clean-all targets in the form of "$project/all", ... These virtual sub-targets are then listed as the prerequisites of the project top-level Makefile targets. This means there is no longer a need to re-generate top-level Makefiles when a new project or sub-project is added. It will also allow to remove a lot of boilerplate code. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>main
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####################################################################################
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## Copyright 2018(c) Analog Devices, Inc.
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####################################################################################
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SUBDIRS := $(dir $(wildcard */Makefile))
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# Create virtual targets "$project/all", "$project/clean", "$project/clean-all"
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SUBDIRS_ALL := $(addsuffix all,$(SUBDIRS))
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SUBDIRS_CLEAN := $(addsuffix clean,$(SUBDIRS))
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SUBDIRS_CLEANALL := $(addsuffix clean-all,$(SUBDIRS))
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.PHONY: all clean clean-all $(SUBDIRS_ALL) $(SUBDIRS_CLEAN) $(SUBDIRS_CLEANALL)
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all: $(SUBDIRS_ALL)
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clean: $(SUBDIRS_CLEAN)
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clean-all: $(SUBDIRS_CLEANALL)
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$(SUBDIRS_ALL) $(SUBDIRS_CLEAN) $(SUBDIRS_CLEANALL):
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$(MAKE) -C $(@D) $(@F)
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