diff --git a/library/jesd204/ad_ip_jesd204_tpl_common/up_tpl_common.v b/library/jesd204/ad_ip_jesd204_tpl_common/up_tpl_common.v index bee90c905..c48fc466d 100644 --- a/library/jesd204/ad_ip_jesd204_tpl_common/up_tpl_common.v +++ b/library/jesd204/ad_ip_jesd204_tpl_common/up_tpl_common.v @@ -56,11 +56,11 @@ module up_tpl_common #( input up_rstn, input up_clk, input up_wreq, - input [9:0] up_waddr, + input [10:0] up_waddr, input [31:0] up_wdata, output up_wack, input up_rreq, - input [9:0] up_raddr, + input [10:0] up_raddr, output [31:0] up_rdata, output up_rack ); @@ -77,8 +77,8 @@ module up_tpl_common #( // decode block select - assign up_wreq_s = (up_waddr[9:7] == {COMMON_ID,1'b1}) ? up_wreq : 1'b0; - assign up_rreq_s = (up_raddr[9:7] == {COMMON_ID,1'b1}) ? up_rreq : 1'b0; + assign up_wreq_s = (up_waddr[10:7] == {COMMON_ID,1'b1}) ? up_wreq : 1'b0; + assign up_rreq_s = (up_raddr[10:7] == {COMMON_ID,1'b1}) ? up_rreq : 1'b0; // processor write interface diff --git a/library/jesd204/ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac.v b/library/jesd204/ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac.v index 731859828..2b19b87dd 100644 --- a/library/jesd204/ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac.v +++ b/library/jesd204/ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac.v @@ -68,7 +68,7 @@ module ad_ip_jesd204_tpl_dac #( input s_axi_awvalid, output s_axi_awready, - input [11:0] s_axi_awaddr, + input [12:0] s_axi_awaddr, input [2:0] s_axi_awprot, input s_axi_wvalid, @@ -82,7 +82,7 @@ module ad_ip_jesd204_tpl_dac #( input s_axi_arvalid, output s_axi_arready, - input [11:0] s_axi_araddr, + input [12:0] s_axi_araddr, input [2:0] s_axi_arprot, output s_axi_rvalid, diff --git a/library/jesd204/ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac_regmap.v b/library/jesd204/ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac_regmap.v index eb564d500..c961b1bc6 100644 --- a/library/jesd204/ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac_regmap.v +++ b/library/jesd204/ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac_regmap.v @@ -40,7 +40,7 @@ module ad_ip_jesd204_tpl_dac_regmap #( input s_axi_awvalid, output s_axi_awready, - input [11:0] s_axi_awaddr, + input [12:0] s_axi_awaddr, input [2:0] s_axi_awprot, input s_axi_wvalid, @@ -50,7 +50,7 @@ module ad_ip_jesd204_tpl_dac_regmap #( input s_axi_arvalid, output s_axi_arready, - input [11:0] s_axi_araddr, + input [12:0] s_axi_araddr, input [2:0] s_axi_arprot, output s_axi_rvalid, @@ -106,11 +106,11 @@ module ad_ip_jesd204_tpl_dac_regmap #( wire up_wreq_s; - wire [9:0] up_waddr_s; + wire [10:0] up_waddr_s; wire [31:0] up_wdata_s; wire [NUM_CHANNELS+1:0] up_wack_s; wire up_rreq_s; - wire [9:0] up_raddr_s; + wire [10:0] up_raddr_s; wire [31:0] up_rdata_s[0:NUM_CHANNELS+1]; wire [NUM_CHANNELS+1:0] up_rack_s; @@ -128,7 +128,7 @@ module ad_ip_jesd204_tpl_dac_regmap #( // up bus interface up_axi #( - .AXI_ADDRESS_WIDTH (12) + .AXI_ADDRESS_WIDTH (13) ) i_up_axi ( .up_clk (up_clk), .up_rstn (up_rstn), @@ -231,11 +231,11 @@ module ad_ip_jesd204_tpl_dac_regmap #( .up_rstn (up_rstn), .up_wreq (up_wreq_s), - .up_waddr ({4'b0,up_waddr_s}), + .up_waddr ({3'b0,up_waddr_s}), .up_wdata (up_wdata_s), .up_wack (up_wack_s[0]), .up_rreq (up_rreq_s), - .up_raddr ({4'b0,up_raddr_s}), + .up_raddr ({3'b0,up_raddr_s}), .up_rdata (up_rdata_s[0]), .up_rack (up_rack_s[0]) ); @@ -282,11 +282,11 @@ module ad_ip_jesd204_tpl_dac_regmap #( .up_clk (up_clk), .up_rstn (up_rstn), .up_wreq (up_wreq_s), - .up_waddr ({4'b0,up_waddr_s}), + .up_waddr ({3'b0,up_waddr_s}), .up_wdata (up_wdata_s), .up_wack (up_wack_s[i+1]), .up_rreq (up_rreq_s), - .up_raddr ({4'b0,up_raddr_s}), + .up_raddr ({3'b0,up_raddr_s}), .up_rdata (up_rdata_s[i+1]), .up_rack (up_rack_s[i+1]) );