library: Added util_fir_int and util_fir_dec interpolation/decimation filters
Adrian Costina
parent
8107514dde
commit
30314e4492
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@ -60,6 +60,8 @@ clean:
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make -C util_clkdiv clean
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make -C util_cpack clean
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make -C util_dacfifo clean
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make -C util_fir_dec clean
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make -C util_fir_int clean
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make -C util_gmii_to_rgmii clean
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make -C util_gtlb clean
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make -C util_i2c_mixer clean
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@ -133,6 +135,8 @@ lib:
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-make -C util_clkdiv
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-make -C util_cpack
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-make -C util_dacfifo
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-make -C util_fir_dec
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-make -C util_fir_int
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-make -C util_gmii_to_rgmii
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-make -C util_gtlb
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-make -C util_i2c_mixer
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@ -0,0 +1,46 @@
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####################################################################################
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####################################################################################
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## Copyright 2011(c) Analog Devices, Inc.
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## Auto-generated, do not modify!
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####################################################################################
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####################################################################################
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M_DEPS := util_fir_dec_ip.tcl
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M_DEPS += ../scripts/adi_env.tcl
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M_DEPS += ../scripts/adi_ip.tcl
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M_DEPS += util_fir_dec.v
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M_VIVADO := vivado -mode batch -source
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M_FLIST := *.cache
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M_FLIST += *.data
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M_FLIST += *.xpr
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M_FLIST += *.log
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M_FLIST += component.xml
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M_FLIST += *.jou
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M_FLIST += xgui
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M_FLIST += *.ip_user_files
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M_FLIST += *.srcs
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M_FLIST += *.hw
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M_FLIST += *.sim
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M_FLIST += .Xil
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.PHONY: all clean clean-all
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all: util_fir_dec.xpr
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clean:clean-all
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clean-all:
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rm -rf $(M_FLIST)
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util_fir_dec.xpr: $(M_DEPS)
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-rm -rf $(M_FLIST)
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$(M_VIVADO) util_fir_dec_ip.tcl >> util_fir_dec_ip.log 2>&1
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####################################################################################
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####################################################################################
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@ -0,0 +1,134 @@
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; XILINX CORE Generator(tm)Distributed Arithmetic FIR filter coefficient (.COE) File
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; Generated by MATLAB(R) 9.0 and the DSP System Toolbox 9.2.
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; Generated on: 24-Oct-2016 14:07:18
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Radix = 10;
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Coefficient_Width = 16;
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CoefData = 0,
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-1,
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-2,
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-4,
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-6,
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-8,
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-8,
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-5,
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0,
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8,
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18,
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29,
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37,
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41,
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||||
37,
|
||||
23,
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||||
0,
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||||
-31,
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||||
-67,
|
||||
-100,
|
||||
-124,
|
||||
-130,
|
||||
-113,
|
||||
-69,
|
||||
0,
|
||||
87,
|
||||
181,
|
||||
263,
|
||||
318,
|
||||
326,
|
||||
277,
|
||||
166,
|
||||
0,
|
||||
-202,
|
||||
-410,
|
||||
-589,
|
||||
-700,
|
||||
-709,
|
||||
-594,
|
||||
-352,
|
||||
0,
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||||
420,
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||||
848,
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||||
1211,
|
||||
1432,
|
||||
1446,
|
||||
1210,
|
||||
717,
|
||||
0,
|
||||
-863,
|
||||
-1756,
|
||||
-2535,
|
||||
-3043,
|
||||
-3133,
|
||||
-2690,
|
||||
-1646,
|
||||
0,
|
||||
2180,
|
||||
4757,
|
||||
7534,
|
||||
10278,
|
||||
12743,
|
||||
14697,
|
||||
15951,
|
||||
16384,
|
||||
15951,
|
||||
14697,
|
||||
12743,
|
||||
10278,
|
||||
7534,
|
||||
4757,
|
||||
2180,
|
||||
0,
|
||||
-1646,
|
||||
-2690,
|
||||
-3133,
|
||||
-3043,
|
||||
-2535,
|
||||
-1756,
|
||||
-863,
|
||||
0,
|
||||
717,
|
||||
1210,
|
||||
1446,
|
||||
1432,
|
||||
1211,
|
||||
848,
|
||||
420,
|
||||
0,
|
||||
-352,
|
||||
-594,
|
||||
-709,
|
||||
-700,
|
||||
-589,
|
||||
-410,
|
||||
-202,
|
||||
0,
|
||||
166,
|
||||
277,
|
||||
326,
|
||||
318,
|
||||
263,
|
||||
181,
|
||||
87,
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||||
0,
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-69,
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-113,
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||||
-130,
|
||||
-124,
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||||
-100,
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||||
-67,
|
||||
-31,
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||||
0,
|
||||
23,
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37,
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41,
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37,
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29,
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18,
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8,
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0,
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-5,
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-8,
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-8,
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-6,
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-4,
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-2,
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-1,
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0;
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@ -0,0 +1,73 @@
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// ***************************************************************************
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// ***************************************************************************
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// Copyright 2014(c) Analog Devices, Inc.
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//
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without modification,
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// are permitted provided that the following conditions are met:
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// - Redistributions of source code must retain the above copyright
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||||
// notice, this list of conditions and the following disclaimer.
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// - Redistributions in binary form must reproduce the above copyright
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||||
// notice, this list of conditions and the following disclaimer in
|
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// the documentation and/or other materials provided with the
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// distribution.
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// - Neither the name of Analog Devices, Inc. nor the names of its
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// contributors may be used to endorse or promote products derived
|
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// from this software without specific prior written permission.
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// - The use of this software may or may not infringe the patent rights
|
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// of one or more patent holders. This license does not release you
|
||||
// from the requirement that you obtain separate licenses from these
|
||||
// patent holders to use this software.
|
||||
// - Use of the software either in source or binary form, must be run
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// on or directly connected to an Analog Devices Inc. component.
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//
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// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A
|
||||
// PARTICULAR PURPOSE ARE DISCLAIMED.
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//
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// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY
|
||||
// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
|
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// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
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// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// ***************************************************************************
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// This IP allows the decimation by 8 of the data from the input channels
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// 0 and 1. The decimation filter is implemented using a fir_compiler IP from
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// Xilinx.
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// ***************************************************************************
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`timescale 1ns/100ps
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module util_fir_dec (
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input aclk,
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input s_axis_data_tvalid,
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output s_axis_data_tready,
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input [15:0] channel_0,
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input [15:0] channel_1,
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input decimate,
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output m_axis_data_tvalid,
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output [31:0] m_axis_data_tdata);
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wire [31:0] s_axis_data_tdata;
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wire m_axis_data_tvalid_s;
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wire [31:0] m_axis_data_tdata_s;
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assign s_axis_data_tdata = {channel_1, channel_0};
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assign m_axis_data_tvalid = (decimate == 1'b1) ? m_axis_data_tvalid_s : s_axis_data_tvalid;
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assign m_axis_data_tdata = (decimate == 1'b1) ? m_axis_data_tdata_s : {channel_1, channel_0};
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fir_decim decimator (
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.aclk(aclk),
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.s_axis_data_tvalid(s_axis_data_tvalid),
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.s_axis_data_tready(s_axis_data_tready),
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.s_axis_data_tdata(s_axis_data_tdata),
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.m_axis_data_tvalid(m_axis_data_tvalid_s),
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.m_axis_data_tdata(m_axis_data_tdata_s)
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);
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endmodule // util_fir_dec
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@ -0,0 +1,39 @@
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source ../scripts/adi_env.tcl
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source $ad_hdl_dir/library/scripts/adi_ip.tcl
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adi_ip_create util_fir_dec
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set fir_decim [create_ip -name fir_compiler -vendor xilinx.com -library ip -version 7.2 -module_name fir_decim]
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set_property -dict [ list \
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CONFIG.Clock_Frequency {128.8} \
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CONFIG.CoefficientSource {COE_File} \
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CONFIG.Coefficient_File {../../../../coefile_dec.coe} \
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CONFIG.Coefficient_Fractional_Bits {0} \
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CONFIG.Coefficient_Sets {1} \
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CONFIG.Coefficient_Sign {Signed} \
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CONFIG.Coefficient_Structure {Inferred} \
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CONFIG.Coefficient_Width {16} \
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CONFIG.ColumnConfig {5} \
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CONFIG.Decimation_Rate {8} \
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CONFIG.Filter_Architecture {Systolic_Multiply_Accumulate} \
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CONFIG.Filter_Type {Decimation} \
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CONFIG.Interpolation_Rate {1} \
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CONFIG.Number_Channels {1} \
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CONFIG.Number_Paths {2} \
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CONFIG.Output_Rounding_Mode {Truncate_LSBs} \
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CONFIG.Output_Width {16} \
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CONFIG.Quantization {Integer_Coefficients} \
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CONFIG.RateSpecification {Frequency_Specification} \
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CONFIG.Sample_Frequency {64.4} \
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CONFIG.Zero_Pack_Factor {1} \
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] [get_ips fir_decim]
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generate_target {all} [get_files util_fir_dec.srcs/sources_1/ip/fir_decim/fir_decim.xci]
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adi_ip_files util_fir_dec [list \
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"util_fir_dec.v" ]
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adi_ip_properties_lite util_fir_dec
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ipx::save_core [ipx::current_core]
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@ -0,0 +1,46 @@
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####################################################################################
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####################################################################################
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## Copyright 2011(c) Analog Devices, Inc.
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## Auto-generated, do not modify!
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####################################################################################
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####################################################################################
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M_DEPS := util_fir_int_ip.tcl
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M_DEPS += ../scripts/adi_env.tcl
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M_DEPS += ../scripts/adi_ip.tcl
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M_DEPS += util_fir_int.v
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M_VIVADO := vivado -mode batch -source
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M_FLIST := *.cache
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M_FLIST += *.data
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M_FLIST += *.xpr
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M_FLIST += *.log
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M_FLIST += component.xml
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M_FLIST += *.jou
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M_FLIST += xgui
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M_FLIST += *.ip_user_files
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M_FLIST += *.srcs
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M_FLIST += *.hw
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M_FLIST += *.sim
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M_FLIST += .Xil
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.PHONY: all clean clean-all
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all: util_fir_int.xpr
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clean:clean-all
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clean-all:
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rm -rf $(M_FLIST)
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util_fir_int.xpr: $(M_DEPS)
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-rm -rf $(M_FLIST)
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$(M_VIVADO) util_fir_int_ip.tcl >> util_fir_int_ip.log 2>&1
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####################################################################################
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####################################################################################
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@ -0,0 +1,134 @@
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; XILINX CORE Generator(tm)Distributed Arithmetic FIR filter coefficient (.COE) File
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; Generated by MATLAB(R) 9.0 and the DSP System Toolbox 9.2.
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; Generated on: 21-Oct-2016 22:25:08
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Radix = 10;
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Coefficient_Width = 16;
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CoefData = 0,
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-1,
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-2,
|
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-4,
|
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-6,
|
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-8,
|
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-8,
|
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-5,
|
||||
0,
|
||||
8,
|
||||
18,
|
||||
29,
|
||||
37,
|
||||
41,
|
||||
37,
|
||||
23,
|
||||
0,
|
||||
-31,
|
||||
-67,
|
||||
-100,
|
||||
-124,
|
||||
-130,
|
||||
-113,
|
||||
-69,
|
||||
0,
|
||||
87,
|
||||
181,
|
||||
263,
|
||||
318,
|
||||
326,
|
||||
277,
|
||||
166,
|
||||
0,
|
||||
-202,
|
||||
-410,
|
||||
-589,
|
||||
-700,
|
||||
-709,
|
||||
-594,
|
||||
-352,
|
||||
0,
|
||||
420,
|
||||
848,
|
||||
1211,
|
||||
1432,
|
||||
1446,
|
||||
1210,
|
||||
717,
|
||||
0,
|
||||
-863,
|
||||
-1756,
|
||||
-2535,
|
||||
-3043,
|
||||
-3133,
|
||||
-2690,
|
||||
-1646,
|
||||
0,
|
||||
2180,
|
||||
4757,
|
||||
7534,
|
||||
10278,
|
||||
12743,
|
||||
14697,
|
||||
15951,
|
||||
16384,
|
||||
15951,
|
||||
14697,
|
||||
12743,
|
||||
10278,
|
||||
7534,
|
||||
4757,
|
||||
2180,
|
||||
0,
|
||||
-1646,
|
||||
-2690,
|
||||
-3133,
|
||||
-3043,
|
||||
-2535,
|
||||
-1756,
|
||||
-863,
|
||||
0,
|
||||
717,
|
||||
1210,
|
||||
1446,
|
||||
1432,
|
||||
1211,
|
||||
848,
|
||||
420,
|
||||
0,
|
||||
-352,
|
||||
-594,
|
||||
-709,
|
||||
-700,
|
||||
-589,
|
||||
-410,
|
||||
-202,
|
||||
0,
|
||||
166,
|
||||
277,
|
||||
326,
|
||||
318,
|
||||
263,
|
||||
181,
|
||||
87,
|
||||
0,
|
||||
-69,
|
||||
-113,
|
||||
-130,
|
||||
-124,
|
||||
-100,
|
||||
-67,
|
||||
-31,
|
||||
0,
|
||||
23,
|
||||
37,
|
||||
41,
|
||||
37,
|
||||
29,
|
||||
18,
|
||||
8,
|
||||
0,
|
||||
-5,
|
||||
-8,
|
||||
-8,
|
||||
-6,
|
||||
-4,
|
||||
-2,
|
||||
-1,
|
||||
0;
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||||
|
|
@ -0,0 +1,70 @@
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// ***************************************************************************
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||||
// ***************************************************************************
|
||||
// Copyright 2014(c) Analog Devices, Inc.
|
||||
//
|
||||
// All rights reserved.
|
||||
//
|
||||
// Redistribution and use in source and binary forms, with or without modification,
|
||||
// are permitted provided that the following conditions are met:
|
||||
// - Redistributions of source code must retain the above copyright
|
||||
// notice, this list of conditions and the following disclaimer.
|
||||
// - Redistributions in binary form must reproduce the above copyright
|
||||
// notice, this list of conditions and the following disclaimer in
|
||||
// the documentation and/or other materials provided with the
|
||||
// distribution.
|
||||
// - Neither the name of Analog Devices, Inc. nor the names of its
|
||||
// contributors may be used to endorse or promote products derived
|
||||
// from this software without specific prior written permission.
|
||||
// - The use of this software may or may not infringe the patent rights
|
||||
// of one or more patent holders. This license does not release you
|
||||
// from the requirement that you obtain separate licenses from these
|
||||
// patent holders to use this software.
|
||||
// - Use of the software either in source or binary form, must be run
|
||||
// on or directly connected to an Analog Devices Inc. component.
|
||||
//
|
||||
// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
|
||||
// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A
|
||||
// PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
//
|
||||
// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY
|
||||
// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
|
||||
// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
|
||||
// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
// ***************************************************************************
|
||||
// This IP allows the interpolation by 8 of the data from the input
|
||||
// The interpolation filter is implemented using a fir_compiler IP from
|
||||
// Xilinx.
|
||||
// ***************************************************************************
|
||||
|
||||
`timescale 1ns/100ps
|
||||
|
||||
module util_fir_int (
|
||||
input aclk,
|
||||
input s_axis_data_tvalid,
|
||||
output s_axis_data_tready,
|
||||
input [31:0] s_axis_data_tdata,
|
||||
output [15:0] channel_0,
|
||||
output [15:0] channel_1,
|
||||
output m_axis_data_tvalid,
|
||||
input interpolate,
|
||||
input dac_read);
|
||||
|
||||
wire [31:0] m_axis_data_tdata_s;
|
||||
wire s_axis_data_tready_s;
|
||||
|
||||
assign {channel_1, channel_0} = (interpolate == 1'b1) ? m_axis_data_tdata_s : s_axis_data_tdata;
|
||||
assign s_axis_data_tready = (interpolate == 1'b1) ? s_axis_data_tready_s : dac_read;
|
||||
|
||||
fir_interp interpolator (
|
||||
.aclk(aclk),
|
||||
.s_axis_data_tvalid(s_axis_data_tvalid),
|
||||
.s_axis_data_tready(s_axis_data_tready_s),
|
||||
.s_axis_data_tdata(s_axis_data_tdata),
|
||||
.m_axis_data_tvalid(m_axis_data_tvalid),
|
||||
.m_axis_data_tdata(m_axis_data_tdata_s)
|
||||
);
|
||||
|
||||
endmodule // util_fir_int
|
||||
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
source ../scripts/adi_env.tcl
|
||||
source $ad_hdl_dir/library/scripts/adi_ip.tcl
|
||||
|
||||
adi_ip_create util_fir_int
|
||||
|
||||
set fir_interp [create_ip -name fir_compiler -vendor xilinx.com -library ip -version 7.2 -module_name fir_interp]
|
||||
set_property -dict [ list \
|
||||
CONFIG.Clock_Frequency {128.8} \
|
||||
CONFIG.CoefficientSource {COE_File} \
|
||||
CONFIG.Coefficient_File {../../../../coefile_int.coe} \
|
||||
CONFIG.Coefficient_Fractional_Bits {0} \
|
||||
CONFIG.Coefficient_Sets {1} \
|
||||
CONFIG.Coefficient_Sign {Signed} \
|
||||
CONFIG.Coefficient_Structure {Inferred} \
|
||||
CONFIG.Coefficient_Width {16} \
|
||||
CONFIG.ColumnConfig {5} \
|
||||
CONFIG.Decimation_Rate {1} \
|
||||
CONFIG.Filter_Architecture {Systolic_Multiply_Accumulate} \
|
||||
CONFIG.Filter_Type {Interpolation} \
|
||||
CONFIG.Interpolation_Rate {8} \
|
||||
CONFIG.M_DATA_Has_TREADY {false} \
|
||||
CONFIG.Number_Channels {1} \
|
||||
CONFIG.Number_Paths {2} \
|
||||
CONFIG.Output_Rounding_Mode {Truncate_LSBs} \
|
||||
CONFIG.Output_Width {16} \
|
||||
CONFIG.Quantization {Integer_Coefficients} \
|
||||
CONFIG.RateSpecification {Frequency_Specification} \
|
||||
CONFIG.Sample_Frequency {8} \
|
||||
CONFIG.Zero_Pack_Factor {1} \
|
||||
] [get_ips fir_interp]
|
||||
|
||||
generate_target {all} [get_files util_fir_int.srcs/sources_1/ip/fir_interp/fir_interp.xci]
|
||||
|
||||
|
||||
adi_ip_files util_fir_int [list \
|
||||
"util_fir_int.v" ]
|
||||
|
||||
adi_ip_properties_lite util_fir_int
|
||||
|
||||
ipx::save_core [ipx::current_core]
|
||||
Loading…
Reference in New Issue