From 318dcbb5d9ebd7c5fbdff7c73f98e5d0040c6121 Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Thu, 22 Mar 2018 13:17:24 +0000 Subject: [PATCH] adrv9371x: Set up the defualt clock output control The TX side runs on QPLL, and the RX and RX_OS runs on CPLL by default. The OUTCLK frequency is the same as the REFCLK. The main reason of this modification is that the links should come up without any DPR access, after power up, using the default reference clock configuration (122.88 MHz). --- projects/adrv9371x/common/adrv9371x_bd.tcl | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/projects/adrv9371x/common/adrv9371x_bd.tcl b/projects/adrv9371x/common/adrv9371x_bd.tcl index 34f49c86a..96071c25f 100644 --- a/projects/adrv9371x/common/adrv9371x_bd.tcl +++ b/projects/adrv9371x/common/adrv9371x_bd.tcl @@ -18,6 +18,9 @@ ad_ip_instance axi_adxcvr axi_ad9371_tx_xcvr ad_ip_parameter axi_ad9371_tx_xcvr CONFIG.NUM_OF_LANES 4 ad_ip_parameter axi_ad9371_tx_xcvr CONFIG.QPLL_ENABLE 1 ad_ip_parameter axi_ad9371_tx_xcvr CONFIG.TX_OR_RX_N 1 +ad_ip_parameter axi_ad9371_tx_xcvr CONFIG.SYS_CLK_SEL 3 +ad_ip_parameter axi_ad9371_tx_xcvr CONFIG.OUT_CLK_SEL 3 +ad_ip_parameter axi_ad9371_tx_xcvr CONFIG.LPM_OR_DFE_N 0 adi_axi_jesd204_tx_create axi_ad9371_tx_jesd 4 @@ -50,6 +53,9 @@ ad_ip_instance axi_adxcvr axi_ad9371_rx_xcvr ad_ip_parameter axi_ad9371_rx_xcvr CONFIG.NUM_OF_LANES 2 ad_ip_parameter axi_ad9371_rx_xcvr CONFIG.QPLL_ENABLE 0 ad_ip_parameter axi_ad9371_rx_xcvr CONFIG.TX_OR_RX_N 0 +ad_ip_parameter axi_ad9371_rx_xcvr CONFIG.SYS_CLK_SEL 0 +ad_ip_parameter axi_ad9371_rx_xcvr CONFIG.OUT_CLK_SEL 3 +ad_ip_parameter axi_ad9371_rx_xcvr CONFIG.LPM_OR_DFE_N 1 adi_axi_jesd204_rx_create axi_ad9371_rx_jesd 2 @@ -83,6 +89,9 @@ ad_ip_instance axi_adxcvr axi_ad9371_rx_os_xcvr ad_ip_parameter axi_ad9371_rx_os_xcvr CONFIG.NUM_OF_LANES 2 ad_ip_parameter axi_ad9371_rx_os_xcvr CONFIG.QPLL_ENABLE 0 ad_ip_parameter axi_ad9371_rx_os_xcvr CONFIG.TX_OR_RX_N 0 +ad_ip_parameter axi_ad9371_rx_os_xcvr CONFIG.SYS_CLK_SEL 0 +ad_ip_parameter axi_ad9371_rx_os_xcvr CONFIG.OUT_CLK_SEL 3 +ad_ip_parameter axi_ad9371_rx_os_xcvr CONFIG.LPM_OR_DFE_N 1 adi_axi_jesd204_rx_create axi_ad9371_rx_os_jesd 2