From 334aaeb59a58bc53147cc9722f5586b771193a3d Mon Sep 17 00:00:00 2001
From: Adrian Costina <adrian.costina@analog.com>
Date: Wed, 8 Jun 2016 14:13:53 +0300
Subject: [PATCH] daq3: Added a10gx project

---
 projects/daq3/a10gx/Makefile           |  139 ++
 projects/daq3/a10gx/system_bd.qsys     |  680 +++++++
 projects/daq3/a10gx/system_constr.sdc  |   43 +
 projects/daq3/a10gx/system_project.tcl |   92 +
 projects/daq3/a10gx/system_top.v       |  285 +++
 projects/daq3/common/daq3_bd.qsys      | 2413 ++++++++++++++++++++++++
 6 files changed, 3652 insertions(+)
 create mode 100755 projects/daq3/a10gx/Makefile
 create mode 100755 projects/daq3/a10gx/system_bd.qsys
 create mode 100755 projects/daq3/a10gx/system_constr.sdc
 create mode 100755 projects/daq3/a10gx/system_project.tcl
 create mode 100755 projects/daq3/a10gx/system_top.v
 create mode 100755 projects/daq3/common/daq3_bd.qsys

diff --git a/projects/daq3/a10gx/Makefile b/projects/daq3/a10gx/Makefile
new file mode 100755
index 000000000..080656f82
--- /dev/null
+++ b/projects/daq3/a10gx/Makefile
@@ -0,0 +1,139 @@
+####################################################################################
+####################################################################################
+## Copyright 2011(c) Analog Devices, Inc.
+## Auto-generated, do not modify!
+####################################################################################
+####################################################################################
+
+M_DEPS += system_top.v
+M_DEPS += system_project.tcl
+M_DEPS += system_constr.sdc
+M_DEPS += system_bd.qsys
+M_DEPS += ../common/daq3_spi.v
+M_DEPS += ../common/daq3_bd.qsys
+M_DEPS += ../../scripts/adi_env.tcl
+M_DEPS += ../../common/a10gx/a10gx_system_bd.qsys
+M_DEPS += ../../common/a10gx/a10gx_system_assign.tcl
+M_DEPS += ../../../library/common/ad_iobuf.v
+M_DEPS += ../../../library/axi_ad9152/axi_ad9152.v
+M_DEPS += ../../../library/axi_ad9152/axi_ad9152_channel.v
+M_DEPS += ../../../library/axi_ad9152/axi_ad9152_core.v
+M_DEPS += ../../../library/axi_ad9152/axi_ad9152_hw.tcl
+M_DEPS += ../../../library/axi_ad9152/axi_ad9152_if.v
+M_DEPS += ../../../library/axi_ad9680/axi_ad9680.v
+M_DEPS += ../../../library/axi_ad9680/axi_ad9680_channel.v
+M_DEPS += ../../../library/axi_ad9680/axi_ad9680_hw.tcl
+M_DEPS += ../../../library/axi_ad9680/axi_ad9680_if.v
+M_DEPS += ../../../library/axi_ad9680/axi_ad9680_pnmon.v
+M_DEPS += ../../../library/axi_dmac/2d_transfer.v
+M_DEPS += ../../../library/axi_dmac/address_generator.v
+M_DEPS += ../../../library/axi_dmac/axi_dmac.v
+M_DEPS += ../../../library/axi_dmac/axi_dmac_hw.tcl
+M_DEPS += ../../../library/axi_dmac/axi_register_slice.v
+M_DEPS += ../../../library/axi_dmac/data_mover.v
+M_DEPS += ../../../library/axi_dmac/dest_axi_mm.v
+M_DEPS += ../../../library/axi_dmac/dest_axi_stream.v
+M_DEPS += ../../../library/axi_dmac/dest_fifo_inf.v
+M_DEPS += ../../../library/axi_dmac/inc_id.h
+M_DEPS += ../../../library/axi_dmac/request_arb.v
+M_DEPS += ../../../library/axi_dmac/request_generator.v
+M_DEPS += ../../../library/axi_dmac/resp.h
+M_DEPS += ../../../library/axi_dmac/response_generator.v
+M_DEPS += ../../../library/axi_dmac/response_handler.v
+M_DEPS += ../../../library/axi_dmac/splitter.v
+M_DEPS += ../../../library/axi_dmac/src_axi_mm.v
+M_DEPS += ../../../library/axi_dmac/src_axi_stream.v
+M_DEPS += ../../../library/axi_dmac/src_fifo_inf.v
+M_DEPS += ../../../library/axi_jesd_xcvr/axi_jesd_xcvr.v
+M_DEPS += ../../../library/axi_jesd_xcvr/axi_jesd_xcvr_hw.tcl
+M_DEPS += ../../../library/common/ad_datafmt.v
+M_DEPS += ../../../library/common/ad_dds.v
+M_DEPS += ../../../library/common/ad_dds_1.v
+M_DEPS += ../../../library/common/ad_dds_sine.v
+M_DEPS += ../../../library/common/ad_jesd_align.v
+M_DEPS += ../../../library/common/ad_mul.v
+M_DEPS += ../../../library/common/ad_pnmon.v
+M_DEPS += ../../../library/common/ad_rst.v
+M_DEPS += ../../../library/common/altera/MULT_MACRO.v
+M_DEPS += ../../../library/common/sync_bits.v
+M_DEPS += ../../../library/common/sync_gray.v
+M_DEPS += ../../../library/common/up_adc_channel.v
+M_DEPS += ../../../library/common/up_adc_common.v
+M_DEPS += ../../../library/common/up_axi.v
+M_DEPS += ../../../library/common/up_clock_mon.v
+M_DEPS += ../../../library/common/up_dac_channel.v
+M_DEPS += ../../../library/common/up_dac_common.v
+M_DEPS += ../../../library/common/up_delay_cntrl.v
+M_DEPS += ../../../library/common/up_xcvr.v
+M_DEPS += ../../../library/common/up_xfer_cntrl.v
+M_DEPS += ../../../library/common/up_xfer_status.v
+M_DEPS += ../../../library/util_adcfifo/../common/ad_axis_inf_rx.v
+M_DEPS += ../../../library/util_adcfifo/../common/ad_mem_asym.v
+M_DEPS += ../../../library/util_adcfifo/util_adcfifo.v
+M_DEPS += ../../../library/util_adcfifo/util_adcfifo_hw.tcl
+M_DEPS += ../../../library/util_axis_fifo/address_gray.v
+M_DEPS += ../../../library/util_axis_fifo/address_gray_pipelined.v
+M_DEPS += ../../../library/util_axis_fifo/address_sync.v
+M_DEPS += ../../../library/util_axis_fifo/util_axis_fifo.v
+M_DEPS += ../../../library/util_axis_resize/util_axis_resize.v
+M_DEPS += ../../../library/util_cpack/util_cpack.v
+M_DEPS += ../../../library/util_cpack/util_cpack_dsf.v
+M_DEPS += ../../../library/util_cpack/util_cpack_hw.tcl
+M_DEPS += ../../../library/util_cpack/util_cpack_mux.v
+M_DEPS += ../../../library/util_upack/util_upack.v
+M_DEPS += ../../../library/util_upack/util_upack_dmx.v
+M_DEPS += ../../../library/util_upack/util_upack_dsf.v
+M_DEPS += ../../../library/util_upack/util_upack_hw.tcl
+
+
+M_ALTERA := quartus_sh --64bit -t 
+
+
+M_FLIST += *.log
+M_FLIST += *_INFO.txt
+M_FLIST += *_dump.txt
+M_FLIST += db
+M_FLIST += *.asm.rpt
+M_FLIST += *.done
+M_FLIST += *.eda.rpt
+M_FLIST += *.fit.*
+M_FLIST += *.map.*
+M_FLIST += *.sta.*
+M_FLIST += *.qsf
+M_FLIST += *.qpf
+M_FLIST += *.qws
+M_FLIST += *.sof
+M_FLIST += *.cdf
+M_FLIST += *.sld
+M_FLIST += *.qdf
+M_FLIST += hc_output
+M_FLIST += system_bd
+M_FLIST += hps_isw_handoff
+M_FLIST += hps_sdram_*.csv
+M_FLIST += *ddr3_*.csv
+M_FLIST += incremental_db
+M_FLIST += reconfig_mif
+M_FLIST += *.sopcinfo
+M_FLIST +=  *.jdi
+M_FLIST += *.pin
+
+
+
+.PHONY: all clean clean-all
+all: daq3_a10gx.sof
+
+
+
+clean:clean-all
+
+
+clean-all:
+	rm -rf $(M_FLIST)
+
+
+daq3_a10gx.sof: $(M_DEPS)
+	rm -rf $(M_FLIST)
+	$(M_ALTERA) system_project.tcl  >> daq3_a10gx_quartus.log 2>&1
+
+####################################################################################
+####################################################################################
diff --git a/projects/daq3/a10gx/system_bd.qsys b/projects/daq3/a10gx/system_bd.qsys
new file mode 100755
index 000000000..ec6989ffe
--- /dev/null
+++ b/projects/daq3/a10gx/system_bd.qsys
@@ -0,0 +1,680 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<system name="$${FILENAME}">
+ <component
+   name="$${FILENAME}"
+   displayName="$${FILENAME}"
+   version="1.0"
+   description=""
+   tags=""
+   categories="System" />
+ <parameter name="bonusData"><![CDATA[bonusData 
+{
+   element a10gx_base
+   {
+      datum _sortIndex
+      {
+         value = "1";
+         type = "int";
+      }
+   }
+   element a10gx_base.sys_mem_s_avl
+   {
+      datum _lockedAddress
+      {
+         value = "1";
+         type = "boolean";
+      }
+      datum baseAddress
+      {
+         value = "0";
+         type = "String";
+      }
+   }
+   element daq3
+   {
+      datum _sortIndex
+      {
+         value = "2";
+         type = "int";
+      }
+   }
+   element daq3.axi_ad9152_core_s_axi
+   {
+      datum baseAddress
+      {
+         value = "131072";
+         type = "String";
+      }
+   }
+   element daq3.axi_ad9152_dma_s_axi
+   {
+      datum baseAddress
+      {
+         value = "229376";
+         type = "String";
+      }
+   }
+   element daq3.axi_ad9680_core_s_axi
+   {
+      datum baseAddress
+      {
+         value = "65536";
+         type = "String";
+      }
+   }
+   element daq3.axi_ad9680_dma_s_axi
+   {
+      datum baseAddress
+      {
+         value = "212992";
+         type = "String";
+      }
+   }
+   element daq3.axi_jesd_xcvr_s_axi
+   {
+      datum baseAddress
+      {
+         value = "0";
+         type = "String";
+      }
+   }
+   element daq3.xcvr_core_jesd204_rx_s_avl
+   {
+      datum baseAddress
+      {
+         value = "254976";
+         type = "String";
+      }
+   }
+   element daq3.xcvr_core_jesd204_tx_s_avl
+   {
+      datum baseAddress
+      {
+         value = "253952";
+         type = "String";
+      }
+   }
+   element daq3.xcvr_core_reconfig_s_avl
+   {
+      datum baseAddress
+      {
+         value = "196608";
+         type = "String";
+      }
+   }
+   element daq3.xcvr_rx_pll_reconfig_s_avl
+   {
+      datum baseAddress
+      {
+         value = "251904";
+         type = "String";
+      }
+   }
+   element daq3.xcvr_tx_lane_pll_s_avl
+   {
+      datum baseAddress
+      {
+         value = "245760";
+         type = "String";
+      }
+   }
+   element daq3.xcvr_tx_pll_reconfig_s_avl
+   {
+      datum baseAddress
+      {
+         value = "249856";
+         type = "String";
+      }
+   }
+   element sys_clk
+   {
+      datum _sortIndex
+      {
+         value = "0";
+         type = "int";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+}
+]]></parameter>
+ <parameter name="clockCrossingAdapter" value="FIFO" />
+ <parameter name="device" value="10AX115S3F45E2SGE3" />
+ <parameter name="deviceFamily" value="Arria 10" />
+ <parameter name="deviceSpeedGrade" value="2" />
+ <parameter name="fabricMode" value="QSYS" />
+ <parameter name="generateLegacySim" value="false" />
+ <parameter name="generationId" value="0" />
+ <parameter name="globalResetBus" value="false" />
+ <parameter name="hdlLanguage" value="VERILOG" />
+ <parameter name="hideFromIPCatalog" value="false" />
+ <parameter name="lockedInterfaceDefinition" value="" />
+ <parameter name="maxAdditionalLatency" value="2" />
+ <parameter name="projectName" value="daq3_a10gx.qpf" />
+ <parameter name="sopcBorderPoints" value="false" />
+ <parameter name="systemHash" value="0" />
+ <parameter name="testBenchDutName" value="" />
+ <parameter name="timeStamp" value="0" />
+ <parameter name="useTestBenchNamingPattern" value="false" />
+ <instanceScript></instanceScript>
+ <interface
+   name="a10gx_base_sys_ddr3_cntrl_mem"
+   internal="a10gx_base.sys_ddr3_cntrl_mem"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="a10gx_base_sys_ddr3_cntrl_oct"
+   internal="a10gx_base.sys_ddr3_cntrl_oct"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="a10gx_base_sys_ddr3_cntrl_pll_ref_clk"
+   internal="a10gx_base.sys_ddr3_cntrl_pll_ref_clk"
+   type="clock"
+   dir="end" />
+ <interface
+   name="a10gx_base_sys_ethernet_mdio"
+   internal="a10gx_base.sys_ethernet_mdio"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="a10gx_base_sys_ethernet_ref_clk"
+   internal="a10gx_base.sys_ethernet_ref_clk"
+   type="clock"
+   dir="end" />
+ <interface
+   name="a10gx_base_sys_ethernet_reset"
+   internal="a10gx_base.sys_ethernet_reset"
+   type="reset"
+   dir="start" />
+ <interface
+   name="a10gx_base_sys_ethernet_sgmii"
+   internal="a10gx_base.sys_ethernet_sgmii"
+   type="conduit"
+   dir="end" />
+ <interface name="a10gx_base_sys_gpio" internal="a10gx_base.sys_gpio" />
+ <interface
+   name="a10gx_base_sys_gpio_bd"
+   internal="a10gx_base.sys_gpio_bd"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="a10gx_base_sys_gpio_in"
+   internal="a10gx_base.sys_gpio_in"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="a10gx_base_sys_gpio_out"
+   internal="a10gx_base.sys_gpio_out"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="a10gx_base_sys_spi"
+   internal="a10gx_base.sys_spi"
+   type="conduit"
+   dir="end" />
+ <interface name="daq3_rx_data" internal="daq3.rx_data" type="conduit" dir="end" />
+ <interface
+   name="daq3_rx_ref_clk"
+   internal="daq3.rx_ref_clk"
+   type="clock"
+   dir="end" />
+ <interface name="daq3_rx_sync" internal="daq3.rx_sync" type="conduit" dir="end" />
+ <interface
+   name="daq3_rx_sysref"
+   internal="daq3.rx_sysref"
+   type="conduit"
+   dir="end" />
+ <interface name="daq3_tx_data" internal="daq3.tx_data" type="conduit" dir="end" />
+ <interface
+   name="daq3_tx_ref_clk"
+   internal="daq3.tx_ref_clk"
+   type="clock"
+   dir="end" />
+ <interface name="daq3_tx_sync" internal="daq3.tx_sync" type="conduit" dir="end" />
+ <interface
+   name="daq3_tx_sysref"
+   internal="daq3.tx_sysref"
+   type="conduit"
+   dir="end" />
+ <interface name="sys_clk" internal="sys_clk.clk_in" type="clock" dir="end" />
+ <interface
+   name="sys_reset"
+   internal="sys_clk.clk_in_reset"
+   type="reset"
+   dir="end" />
+ <module name="a10gx_base" kind="a10gx_system_bd" version="1.0" enabled="1">
+  <parameter name="AUTO_DEVICE" value="10AX115S3F45E2SGE3" />
+  <parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
+  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="2" />
+  <parameter name="AUTO_GENERATION_ID" value="0" />
+  <parameter name="AUTO_SYS_CLK_CLOCK_DOMAIN" value="6" />
+  <parameter name="AUTO_SYS_CLK_CLOCK_RATE" value="100000000" />
+  <parameter name="AUTO_SYS_CLK_RESET_DOMAIN" value="6" />
+  <parameter name="AUTO_SYS_CPU_M_AVL_ADDRESS_MAP"><![CDATA[<address-map><slave name='daq3_axi_jesd_xcvr.s_axi' start='0x0' end='0x10000' /><slave name='daq3_axi_ad9680_core.s_axi' start='0x10000' end='0x20000' /><slave name='daq3_axi_ad9152_core.s_axi' start='0x20000' end='0x30000' /><slave name='daq3_xcvr_core.reconfig_avmm' start='0x30000' end='0x34000' /><slave name='daq3_axi_ad9680_dma.s_axi' start='0x34000' end='0x38000' /><slave name='daq3_axi_ad9152_dma.s_axi' start='0x38000' end='0x3C000' /><slave name='daq3_xcvr_tx_lane_pll.reconfig_avmm0' start='0x3C000' end='0x3D000' /><slave name='daq3_xcvr_tx_pll_reconfig.mgmt_avalon_slave' start='0x3D000' end='0x3D800' /><slave name='daq3_xcvr_rx_pll_reconfig.mgmt_avalon_slave' start='0x3D800' end='0x3E000' /><slave name='daq3_xcvr_core.jesd204_tx_avs' start='0x3E000' end='0x3E400' /><slave name='daq3_xcvr_core.jesd204_rx_avs' start='0x3E400' end='0x3E800' /></address-map>]]></parameter>
+  <parameter name="AUTO_SYS_CPU_M_AVL_ADDRESS_WIDTH" value="AddressWidth = 18" />
+  <parameter name="AUTO_SYS_DDR3_CNTRL_PLL_REF_CLK_CLOCK_DOMAIN" value="1" />
+  <parameter name="AUTO_SYS_DDR3_CNTRL_PLL_REF_CLK_CLOCK_RATE" value="0" />
+  <parameter name="AUTO_SYS_DDR3_CNTRL_PLL_REF_CLK_RESET_DOMAIN" value="1" />
+  <parameter name="AUTO_SYS_ETHERNET_REF_CLK_CLOCK_DOMAIN" value="2" />
+  <parameter name="AUTO_SYS_ETHERNET_REF_CLK_CLOCK_RATE" value="0" />
+  <parameter name="AUTO_SYS_ETHERNET_REF_CLK_RESET_DOMAIN" value="2" />
+  <parameter name="AUTO_SYS_INTR_INTERRUPTS_USED" value="3" />
+  <parameter name="AUTO_UNIQUE_ID">$${FILENAME}_a10gx_base</parameter>
+ </module>
+ <module name="daq3" kind="daq3_bd" version="1.0" enabled="1">
+  <parameter name="AUTO_AXI_AD9152_DMA_M_AXI_ADDRESS_MAP"><![CDATA[<address-map><slave name='a10gx_base_sys_ddr3_cntrl_arch.ctrl_amm_0' start='0x0' end='0x10000000' /></address-map>]]></parameter>
+  <parameter
+     name="AUTO_AXI_AD9152_DMA_M_AXI_ADDRESS_WIDTH"
+     value="AddressWidth = 29" />
+  <parameter name="AUTO_AXI_AD9680_DMA_M_AXI_ADDRESS_MAP"><![CDATA[<address-map><slave name='a10gx_base_sys_ddr3_cntrl_arch.ctrl_amm_0' start='0x0' end='0x10000000' /></address-map>]]></parameter>
+  <parameter
+     name="AUTO_AXI_AD9680_DMA_M_AXI_ADDRESS_WIDTH"
+     value="AddressWidth = 29" />
+  <parameter name="AUTO_DEVICE" value="10AX115S3F45E2SGE3" />
+  <parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
+  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="2" />
+  <parameter name="AUTO_GENERATION_ID" value="0" />
+  <parameter name="AUTO_MEM_CLK_CLOCK_DOMAIN" value="8" />
+  <parameter name="AUTO_MEM_CLK_CLOCK_RATE" value="133333250" />
+  <parameter name="AUTO_MEM_CLK_RESET_DOMAIN" value="8" />
+  <parameter name="AUTO_RX_REF_CLK_CLOCK_DOMAIN" value="4" />
+  <parameter name="AUTO_RX_REF_CLK_CLOCK_RATE" value="0" />
+  <parameter name="AUTO_RX_REF_CLK_RESET_DOMAIN" value="4" />
+  <parameter name="AUTO_SYS_CLK_CLOCK_DOMAIN" value="6" />
+  <parameter name="AUTO_SYS_CLK_CLOCK_RATE" value="100000000" />
+  <parameter name="AUTO_SYS_CLK_RESET_DOMAIN" value="6" />
+  <parameter name="AUTO_TX_REF_CLK_CLOCK_DOMAIN" value="5" />
+  <parameter name="AUTO_TX_REF_CLK_CLOCK_RATE" value="0" />
+  <parameter name="AUTO_TX_REF_CLK_RESET_DOMAIN" value="5" />
+  <parameter name="AUTO_UNIQUE_ID" value="$${FILENAME}_daq3" />
+ </module>
+ <module name="sys_clk" kind="clock_source" version="15.1" enabled="1">
+  <parameter name="clockFrequency" value="100000000" />
+  <parameter name="clockFrequencyKnown" value="true" />
+  <parameter name="inputClockFrequency" value="0" />
+  <parameter name="resetSynchronousEdges" value="NONE" />
+ </module>
+ <connection
+   kind="avalon"
+   version="15.1"
+   start="daq3.axi_ad9152_dma_m_axi"
+   end="a10gx_base.sys_mem_s_avl">
+  <parameter name="arbitrationPriority" value="1" />
+  <parameter name="baseAddress" value="0x0000" />
+  <parameter name="defaultConnection" value="false" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="15.1"
+   start="daq3.axi_ad9680_dma_m_axi"
+   end="a10gx_base.sys_mem_s_avl">
+  <parameter name="arbitrationPriority" value="1" />
+  <parameter name="baseAddress" value="0x0000" />
+  <parameter name="defaultConnection" value="false" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="15.1"
+   start="a10gx_base.sys_cpu_m_avl"
+   end="daq3.axi_ad9152_core_s_axi">
+  <parameter name="arbitrationPriority" value="1" />
+  <parameter name="baseAddress" value="0x00020000" />
+  <parameter name="defaultConnection" value="false" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="15.1"
+   start="a10gx_base.sys_cpu_m_avl"
+   end="daq3.axi_ad9152_dma_s_axi">
+  <parameter name="arbitrationPriority" value="1" />
+  <parameter name="baseAddress" value="0x00038000" />
+  <parameter name="defaultConnection" value="false" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="15.1"
+   start="a10gx_base.sys_cpu_m_avl"
+   end="daq3.axi_ad9680_core_s_axi">
+  <parameter name="arbitrationPriority" value="1" />
+  <parameter name="baseAddress" value="0x00010000" />
+  <parameter name="defaultConnection" value="false" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="15.1"
+   start="a10gx_base.sys_cpu_m_avl"
+   end="daq3.axi_ad9680_dma_s_axi">
+  <parameter name="arbitrationPriority" value="1" />
+  <parameter name="baseAddress" value="0x00034000" />
+  <parameter name="defaultConnection" value="false" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="15.1"
+   start="a10gx_base.sys_cpu_m_avl"
+   end="daq3.axi_jesd_xcvr_s_axi">
+  <parameter name="arbitrationPriority" value="1" />
+  <parameter name="baseAddress" value="0x0000" />
+  <parameter name="defaultConnection" value="false" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="15.1"
+   start="a10gx_base.sys_cpu_m_avl"
+   end="daq3.xcvr_core_jesd204_rx_s_avl">
+  <parameter name="arbitrationPriority" value="1" />
+  <parameter name="baseAddress" value="0x0003e400" />
+  <parameter name="defaultConnection" value="false" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="15.1"
+   start="a10gx_base.sys_cpu_m_avl"
+   end="daq3.xcvr_core_jesd204_tx_s_avl">
+  <parameter name="arbitrationPriority" value="1" />
+  <parameter name="baseAddress" value="0x0003e000" />
+  <parameter name="defaultConnection" value="false" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="15.1"
+   start="a10gx_base.sys_cpu_m_avl"
+   end="daq3.xcvr_core_reconfig_s_avl">
+  <parameter name="arbitrationPriority" value="1" />
+  <parameter name="baseAddress" value="0x00030000" />
+  <parameter name="defaultConnection" value="false" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="15.1"
+   start="a10gx_base.sys_cpu_m_avl"
+   end="daq3.xcvr_rx_pll_reconfig_s_avl">
+  <parameter name="arbitrationPriority" value="1" />
+  <parameter name="baseAddress" value="0x0003d800" />
+  <parameter name="defaultConnection" value="false" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="15.1"
+   start="a10gx_base.sys_cpu_m_avl"
+   end="daq3.xcvr_tx_lane_pll_s_avl">
+  <parameter name="arbitrationPriority" value="1" />
+  <parameter name="baseAddress" value="0x0003c000" />
+  <parameter name="defaultConnection" value="false" />
+ </connection>
+ <connection
+   kind="avalon"
+   version="15.1"
+   start="a10gx_base.sys_cpu_m_avl"
+   end="daq3.xcvr_tx_pll_reconfig_s_avl">
+  <parameter name="arbitrationPriority" value="1" />
+  <parameter name="baseAddress" value="0x0003d000" />
+  <parameter name="defaultConnection" value="false" />
+ </connection>
+ <connection
+   kind="clock"
+   version="15.1"
+   start="sys_clk.clk"
+   end="a10gx_base.sys_clk" />
+ <connection kind="clock" version="15.1" start="sys_clk.clk" end="daq3.sys_clk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="a10gx_base.mem_clk"
+   end="daq3.mem_clk" />
+ <connection
+   kind="interrupt"
+   version="15.1"
+   start="a10gx_base.sys_intr"
+   end="daq3.axi_ad9152_dma_intr">
+  <parameter name="irqNumber" value="1" />
+ </connection>
+ <connection
+   kind="interrupt"
+   version="15.1"
+   start="a10gx_base.sys_intr"
+   end="daq3.axi_ad9680_dma_intr">
+  <parameter name="irqNumber" value="0" />
+ </connection>
+ <connection
+   kind="reset"
+   version="15.1"
+   start="sys_clk.clk_reset"
+   end="a10gx_base.sys_rst" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="sys_clk.clk_reset"
+   end="daq3.sys_rst" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="a10gx_base.mem_rst"
+   end="daq3.mem_rst" />
+ <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="FIFO" />
+ <interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="false" />
+ <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="2" />
+</system>
diff --git a/projects/daq3/a10gx/system_constr.sdc b/projects/daq3/a10gx/system_constr.sdc
new file mode 100755
index 000000000..542f5e9d8
--- /dev/null
+++ b/projects/daq3/a10gx/system_constr.sdc
@@ -0,0 +1,43 @@
+
+create_clock -period "10.000 ns"  -name sys_clk_100mhz      [get_ports {sys_clk}]
+create_clock -period "2.000 ns"   -name rx_ref_clk_500mhz   [get_ports {rx_ref_clk}]
+create_clock -period "2.000 ns"   -name tx_ref_clk_500mhz   [get_ports {tx_ref_clk}]
+
+derive_pll_clocks
+derive_clock_uncertainty
+
+set_false_path -from [get_clocks {sys_clk_100mhz}] -to [get_clocks {\
+  i_system_bd|a10gx_base|sys_ddr3_cntrl_phy_clk_0 \
+  i_system_bd|a10gx_base|sys_ddr3_cntrl_phy_clk_1 \
+  i_system_bd|a10gx_base|sys_ddr3_cntrl_phy_clk_2 \
+  i_system_bd|a10gx_base|sys_ddr3_cntrl_phy_clk_l_0 \
+  i_system_bd|a10gx_base|sys_ddr3_cntrl_phy_clk_l_1 \
+  i_system_bd|a10gx_base|sys_ddr3_cntrl_phy_clk_l_2}]
+
+set_false_path -from [get_clocks {sys_clk_100mhz}] -to [get_clocks {\
+  i_system_bd|a10gx_base|sys_ddr3_cntrl_core_nios_clk}]
+
+set_false_path -from [get_clocks {sys_clk_100mhz}]\
+  -through [get_nets *altera_jesd204_tx_csr_inst*]\
+  -to [get_clocks {i_system_bd|daq3|xcvr_tx_pll|outclk0}]
+
+set_false_path -from [get_clocks {sys_clk_100mhz}]\
+  -through [get_nets *altera_jesd204_tx_ctl_inst*]\
+  -to [get_clocks {i_system_bd|daq3|xcvr_tx_pll|outclk0}]
+
+set_false_path -from [get_clocks {sys_clk_100mhz}]\
+  -through [get_nets *altera_jesd204_rx_csr_inst*]\
+  -to [get_clocks {i_system_bd|daq3|xcvr_rx_pll|outclk0}]
+
+set_false_path -from [get_clocks {i_system_bd|daq3|xcvr_tx_pll|outclk0}]\
+  -through [get_nets *altera_jesd204_tx_csr_inst*]\
+  -to [get_clocks {sys_clk_100mhz}]
+
+set_false_path -from [get_clocks {i_system_bd|daq3|xcvr_tx_pll|outclk0}]\
+  -through [get_nets *altera_jesd204_tx_ctl_inst*]\
+  -to [get_clocks {sys_clk_100mhz}]
+
+set_false_path -from [get_clocks {i_system_bd|daq3|xcvr_rx_pll|outclk0}]\
+  -through [get_nets *altera_jesd204_rx_csr_inst*]\
+  -to [get_clocks {sys_clk_100mhz}]
+
diff --git a/projects/daq3/a10gx/system_project.tcl b/projects/daq3/a10gx/system_project.tcl
new file mode 100755
index 000000000..a28b59e65
--- /dev/null
+++ b/projects/daq3/a10gx/system_project.tcl
@@ -0,0 +1,92 @@
+
+load_package flow
+
+source ../../scripts/adi_env.tcl
+project_new daq3_a10gx -overwrite
+
+source "../../common/a10gx/a10gx_system_assign.tcl"
+set_user_option -name USER_IP_SEARCH_PATHS "../common/;../../common/a10gx/;../../../library/**/*"
+set_global_assignment -name IP_SEARCH_PATHS "../common/;../../common/a10gx;../../../library/**/*"
+set_global_assignment -name QSYS_FILE system_bd.qsys
+
+set_global_assignment -name VERILOG_FILE ../common/daq3_spi.v
+set_global_assignment -name VERILOG_FILE system_top.v
+
+set_global_assignment -name SDC_FILE system_constr.sdc
+set_global_assignment -name TOP_LEVEL_ENTITY system_top
+
+# lane interface
+
+set_location_assignment PIN_AJ8   -to rx_ref_clk            ; ## B20  FMCA_GBTCLK1_M2C_P
+set_location_assignment PIN_AJ7   -to "rx_ref_clk(n)"       ; ## B21  FMCA_GBTCLK1_M2C_N
+set_location_assignment PIN_AV5   -to rx_data[0]            ; ## A10  FMCA_DP3_M2C_P
+set_location_assignment PIN_AV6   -to "rx_data[0](n)"       ; ## A11  FMCA_DP3_M2C_N
+set_location_assignment PIN_AW7   -to rx_data[1]            ; ## C06  FMCA_DP0_M2C_P
+set_location_assignment PIN_AW8   -to "rx_data[1](n)"       ; ## C07  FMCA_DP0_M2C_N
+set_location_assignment PIN_AY5   -to rx_data[2]            ; ## A06  FMCA_DP2_M2C_P
+set_location_assignment PIN_AY6   -to "rx_data[2](n)"       ; ## A07  FMCA_DP2_M2C_N
+set_location_assignment PIN_BA7   -to rx_data[3]            ; ## A02  FMCA_DP1_M2C_P
+set_location_assignment PIN_BA8   -to "rx_data[3](n)"       ; ## A03  FMCA_DP1_M2C_N
+set_location_assignment PIN_AT10  -to rx_sync               ; ## D08  FMCA_LA01_CC_P
+set_location_assignment PIN_AR11  -to "rx_sync(n)"          ; ## D09  FMCA_LA01_CC_N
+set_location_assignment PIN_AR20  -to rx_sysref             ; ## G09  FMCA_LA03_P
+set_location_assignment PIN_AR19  -to "rx_sysref(n)"        ; ## G10  FMCA_LA03_N
+set_location_assignment PIN_AL8   -to tx_ref_clk            ; ## D04  FMCA_GBTCLK0_M2C_P
+set_location_assignment PIN_AL7   -to "tx_ref_clk(n)"       ; ## D05  FMCA_GBTCLK0_M2C_N
+set_location_assignment PIN_BC3   -to tx_data[0]            ; ## A30  FMCA_DP3_C2M_P (tx_data_p[0])
+set_location_assignment PIN_BC4   -to "tx_data[0](n)"       ; ## A31  FMCA_DP3_C2M_N (tx_data_n[0])
+set_location_assignment PIN_BC7   -to tx_data[1]            ; ## C02  FMCA_DP0_C2M_P (tx_data_p[3])
+set_location_assignment PIN_BC8   -to "tx_data[1](n)"       ; ## C03  FMCA_DP0_C2M_N (tx_data_n[3])
+set_location_assignment PIN_BB5   -to tx_data[2]            ; ## A26  FMCA_DP2_C2M_P (tx_data_p[1])
+set_location_assignment PIN_BB6   -to "tx_data[2](n)"       ; ## A27  FMCA_DP2_C2M_N (tx_data_n[1])
+set_location_assignment PIN_BD5   -to tx_data[3]            ; ## A22  FMCA_DP1_C2M_P (tx_data_p[2])
+set_location_assignment PIN_BD6   -to "tx_data[3](n)"       ; ## A23  FMCA_DP1_C2M_N (tx_data_n[2])
+set_location_assignment PIN_AR22  -to tx_sync               ; ## H07  FMCA_LA02_P
+set_location_assignment PIN_AT22  -to "tx_sync(n)"          ; ## H08  FMCA_LA02_N
+set_location_assignment PIN_AN20  -to tx_sysref             ; ## H10  FMCA_LA04_P
+set_location_assignment PIN_AP19  -to "tx_sysref(n)"        ; ## H11  FMCA_LA04_N
+
+set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[0]
+set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[1]
+set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[2]
+set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[3]
+set_instance_assignment -name IO_STANDARD LVDS -to rx_sync
+set_instance_assignment -name IO_STANDARD LVDS -to rx_sysref
+set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to rx_sysref
+set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_data[0]
+set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_data[1]
+set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_data[2]
+set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_data[3]
+set_instance_assignment -name IO_STANDARD LVDS -to tx_sync
+set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to tx_sync
+set_instance_assignment -name IO_STANDARD LVDS -to tx_sysref
+set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to tx_sysref
+
+# gpio
+
+set_location_assignment PIN_AT17  -to trig                  ; ## H13  FMCA_LA07_P
+set_location_assignment PIN_AU17  -to "trig(n)"             ; ## H14  FMCA_LA07_N
+set_location_assignment PIN_AR14  -to adc_fdb               ; ## H17  FMCA_LA11_N
+set_location_assignment PIN_AT14  -to adc_fda               ; ## H16  FMCA_LA11_P
+set_location_assignment PIN_AR16  -to dac_irq               ; ## G15  FMCA_LA12_P
+set_location_assignment PIN_AN19  -to clkd_status[1]        ; ## G13  FMCA_LA08_N
+set_location_assignment PIN_AP18  -to clkd_status[0]        ; ## G12  FMCA_LA08_P
+set_location_assignment PIN_AV14  -to adc_pd                ; ## C10  FMCA_LA06_P
+set_location_assignment PIN_AP16  -to dac_txen              ; ## G16  FMCA_LA12_N
+set_location_assignment PIN_AR17  -to sysref                ; ## D17  FMCA_LA13_P
+set_location_assignment PIN_AP17  -to "sysref(n)"           ; ## D18  FMCA_LA13_N
+
+set_instance_assignment -name IO_STANDARD LVDS -to trig
+set_instance_assignment -name IO_STANDARD LVDS -to sysref
+
+# spi
+
+set_location_assignment PIN_AV11  -to spi_csn_clk           ; ## D11  FMCA_LA05_P
+set_location_assignment PIN_AR15  -to spi_csn_dac           ; ## C14  FMCA_LA10_P
+set_location_assignment PIN_AV13  -to spi_csn_adc           ; ## D15  FMCA_LA09_N
+set_location_assignment PIN_AW11  -to spi_clk               ; ## D12  FMCA_LA05_N
+set_location_assignment PIN_AW13  -to spi_sdio              ; ## D14  FMCA_LA09_P
+set_location_assignment PIN_AW14  -to spi_dir               ; ## C11  FMCA_LA06_N
+
+execute_flow -compile
+
diff --git a/projects/daq3/a10gx/system_top.v b/projects/daq3/a10gx/system_top.v
new file mode 100755
index 000000000..8524d6ead
--- /dev/null
+++ b/projects/daq3/a10gx/system_top.v
@@ -0,0 +1,285 @@
+// ***************************************************************************
+// ***************************************************************************
+// Copyright 2011(c) Analog Devices, Inc.
+//
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without modification,
+// are permitted provided that the following conditions are met:
+//     - Redistributions of source code must retain the above copyright
+//       notice, this list of conditions and the following disclaimer.
+//     - Redistributions in binary form must reproduce the above copyright
+//       notice, this list of conditions and the following disclaimer in
+//       the documentation and/or other materials provided with the
+//       distribution.
+//     - Neither the name of Analog Devices, Inc. nor the names of its
+//       contributors may be used to endorse or promote products derived
+//       from this software without specific prior written permission.
+//     - The use of this software may or may not infringe the patent rights
+//       of one or more patent holders.  This license does not release you
+//       from the requirement that you obtain separate licenses from these
+//       patent holders to use this software.
+//     - Use of the software either in source or binary form, must be run
+//       on or directly connected to an Analog Devices Inc. component.
+//
+// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A
+// PARTICULAR PURPOSE ARE DISCLAIMED.
+//
+// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY
+// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
+// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+// ***************************************************************************
+// ***************************************************************************
+
+`timescale 1ns/100ps
+
+module system_top (
+
+  // clock and resets
+
+  sys_clk,
+  sys_resetn,
+
+  // ddr3
+
+  ddr3_clk_p,
+  ddr3_clk_n,
+  ddr3_a,
+  ddr3_ba,
+  ddr3_cke,
+  ddr3_cs_n,
+  ddr3_odt,
+  ddr3_reset_n,
+  ddr3_we_n,
+  ddr3_ras_n,
+  ddr3_cas_n,
+  ddr3_dqs_p,
+  ddr3_dqs_n,
+  ddr3_dq,
+  ddr3_dm,
+  ddr3_rzq,
+  ddr3_ref_clk,
+
+  // ethernet
+
+  eth_ref_clk,
+  eth_rxd,
+  eth_txd,
+  eth_mdc,
+  eth_mdio,
+  eth_resetn,
+  eth_intn,
+
+  // board gpio
+
+  gpio_bd_i,
+  gpio_bd_o,
+
+  // lane interface
+
+  rx_ref_clk,
+  rx_sysref,
+  rx_sync,
+  rx_data,
+  tx_ref_clk,
+  tx_sysref,
+  tx_sync,
+  tx_data,
+
+  // gpio
+
+  trig,
+  adc_fdb,
+  adc_fda,
+  dac_irq,
+  clkd_status,
+  adc_pd,
+  dac_txen,
+  sysref,
+
+  // spi
+
+  spi_csn_clk,
+  spi_csn_dac,
+  spi_csn_adc,
+  spi_clk,
+  spi_sdio,
+  spi_dir);
+
+  // clock and resets
+
+  input             sys_clk;
+  input             sys_resetn;
+
+  // ddr3
+
+  output            ddr3_clk_p;
+  output            ddr3_clk_n;
+  output  [ 14:0]   ddr3_a;
+  output  [  2:0]   ddr3_ba;
+  output            ddr3_cke;
+  output            ddr3_cs_n;
+  output            ddr3_odt;
+  output            ddr3_reset_n;
+  output            ddr3_we_n;
+  output            ddr3_ras_n;
+  output            ddr3_cas_n;
+  inout   [  7:0]   ddr3_dqs_p;
+  inout   [  7:0]   ddr3_dqs_n;
+  inout   [ 63:0]   ddr3_dq;
+  output  [  7:0]   ddr3_dm;
+  input             ddr3_rzq;
+  input             ddr3_ref_clk;
+
+  // ethernet
+
+  input             eth_ref_clk;
+  input             eth_rxd;
+  output            eth_txd;
+  output            eth_mdc;
+  inout             eth_mdio;
+  output            eth_resetn;
+  input             eth_intn;
+
+  // board gpio
+
+  inout   [ 10:0]   gpio_bd_i;
+  inout   [ 15:0]   gpio_bd_o;
+
+  // lane interface
+
+  input             rx_ref_clk;
+  input             rx_sysref;
+  output            rx_sync;
+  input   [  3:0]   rx_data;
+  input             tx_ref_clk;
+  input             tx_sysref;
+  input             tx_sync;
+  output  [  3:0]   tx_data;
+
+  // gpio
+
+  input             trig;
+  input             adc_fdb;
+  input             adc_fda;
+  input             dac_irq;
+  input   [  1:0]   clkd_status;
+  output            adc_pd;
+  output            dac_txen;
+  output            sysref;
+
+  // spi
+
+  output            spi_csn_clk;
+  output            spi_csn_dac;
+  output            spi_csn_adc;
+  output            spi_clk;
+  inout             spi_sdio;
+  output            spi_dir;
+
+  // internal signals
+
+  wire              eth_reset;
+  wire              eth_mdio_i;
+  wire              eth_mdio_o;
+  wire              eth_mdio_t;
+  wire    [ 63:0]   gpio_i;
+  wire    [ 63:0]   gpio_o;
+  wire              spi_miso_s;
+  wire              spi_mosi_s;
+  wire    [  7:0]   spi_csn_s;
+
+  // daq3
+
+  assign spi_csn_adc = spi_csn_s[2];
+  assign spi_csn_dac = spi_csn_s[1];
+  assign spi_csn_clk = spi_csn_s[0];
+
+  daq3_spi i_daq3_spi (
+    .spi_csn (spi_csn_s[2:0]),
+    .spi_clk (spi_clk),
+    .spi_mosi (spi_mosi_s),
+    .spi_miso (spi_miso_s),
+    .spi_sdio (spi_sdio),
+    .spi_dir (spi_dir));
+
+  // gpio in & out are separate cores
+
+  assign sysref = gpio_o[36];
+  assign adc_pd = gpio_o[35];
+  assign dac_txen = gpio_o[34];
+
+  assign gpio_i[63:38] = 26'd0;
+  assign gpio_i[37:37] = trig;
+  assign gpio_i[36:36] = adc_fdb;
+  assign gpio_i[35:35] = adc_fda;
+  assign gpio_i[34:34] = dac_irq;
+  assign gpio_i[33:32] = clkd_status;
+
+  // board stuff
+
+  assign eth_resetn = ~eth_reset;
+  assign eth_mdio_i = eth_mdio;
+  assign eth_mdio = (eth_mdio_t == 1'b1) ? 1'bz : eth_mdio_o;
+
+  assign ddr3_a[14:12] = 3'd0;
+
+  assign gpio_i[31:27] = gpio_o[31:27];
+  assign gpio_i[26:16] = gpio_bd_i;
+  assign gpio_i[15: 0] = gpio_o[15:0];
+
+  assign gpio_bd_o = gpio_o[15:0];
+
+  system_bd i_system_bd (
+    .a10gx_base_sys_ddr3_cntrl_mem_mem_ck (ddr3_clk_p),
+    .a10gx_base_sys_ddr3_cntrl_mem_mem_ck_n (ddr3_clk_n),
+    .a10gx_base_sys_ddr3_cntrl_mem_mem_a (ddr3_a[11:0]),
+    .a10gx_base_sys_ddr3_cntrl_mem_mem_ba (ddr3_ba),
+    .a10gx_base_sys_ddr3_cntrl_mem_mem_cke (ddr3_cke),
+    .a10gx_base_sys_ddr3_cntrl_mem_mem_cs_n (ddr3_cs_n),
+    .a10gx_base_sys_ddr3_cntrl_mem_mem_odt (ddr3_odt),
+    .a10gx_base_sys_ddr3_cntrl_mem_mem_reset_n (ddr3_reset_n),
+    .a10gx_base_sys_ddr3_cntrl_mem_mem_we_n (ddr3_we_n),
+    .a10gx_base_sys_ddr3_cntrl_mem_mem_ras_n (ddr3_ras_n),
+    .a10gx_base_sys_ddr3_cntrl_mem_mem_cas_n (ddr3_cas_n),
+    .a10gx_base_sys_ddr3_cntrl_mem_mem_dqs (ddr3_dqs_p[7:0]),
+    .a10gx_base_sys_ddr3_cntrl_mem_mem_dqs_n (ddr3_dqs_n[7:0]),
+    .a10gx_base_sys_ddr3_cntrl_mem_mem_dq (ddr3_dq[63:0]),
+    .a10gx_base_sys_ddr3_cntrl_mem_mem_dm (ddr3_dm[7:0]),
+    .a10gx_base_sys_ddr3_cntrl_oct_oct_rzqin (ddr3_rzq),
+    .a10gx_base_sys_ddr3_cntrl_pll_ref_clk_clk (ddr3_ref_clk),
+    .a10gx_base_sys_ethernet_mdio_mdc (eth_mdc),
+    .a10gx_base_sys_ethernet_mdio_mdio_in (eth_mdio_i),
+    .a10gx_base_sys_ethernet_mdio_mdio_out (eth_mdio_o),
+    .a10gx_base_sys_ethernet_mdio_mdio_oen (eth_mdio_t),
+    .a10gx_base_sys_ethernet_ref_clk_clk (eth_ref_clk),
+    .a10gx_base_sys_ethernet_reset_reset (eth_reset),
+    .a10gx_base_sys_ethernet_sgmii_rxp_0 (eth_rxd),
+    .a10gx_base_sys_ethernet_sgmii_txp_0 (eth_txd),
+    .a10gx_base_sys_gpio_in_export (gpio_i[63:32]),
+    .a10gx_base_sys_gpio_out_export (gpio_o[63:32]),
+    .a10gx_base_sys_gpio_bd_in_port (gpio_i[31:0]),
+    .a10gx_base_sys_gpio_bd_out_port (gpio_o[31:0]),
+    .a10gx_base_sys_spi_MISO (spi_miso_s),
+    .a10gx_base_sys_spi_MOSI (spi_mosi_s),
+    .a10gx_base_sys_spi_SCLK (spi_clk),
+    .a10gx_base_sys_spi_SS_n (spi_csn_s),
+    .daq3_rx_data_rx_serial_data (rx_data),
+    .daq3_rx_ref_clk_clk (rx_ref_clk),
+    .daq3_rx_sync_rx_sync (rx_sync),
+    .daq3_rx_sysref_rx_ext_sysref_in (rx_sysref),
+    .daq3_tx_data_tx_serial_data (tx_data),
+    .daq3_tx_ref_clk_clk (tx_ref_clk),
+    .daq3_tx_sync_tx_sync (tx_sync),
+    .daq3_tx_sysref_tx_ext_sysref_in (tx_sysref),
+    .sys_clk_clk (sys_clk),
+    .sys_reset_reset_n (sys_resetn));
+
+endmodule
+
+// ***************************************************************************
+// ***************************************************************************
diff --git a/projects/daq3/common/daq3_bd.qsys b/projects/daq3/common/daq3_bd.qsys
new file mode 100755
index 000000000..912f0c087
--- /dev/null
+++ b/projects/daq3/common/daq3_bd.qsys
@@ -0,0 +1,2413 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<system name="$${FILENAME}">
+ <component
+   name="$${FILENAME}"
+   displayName="$${FILENAME}"
+   version="1.0"
+   description=""
+   tags=""
+   categories="System" />
+ <parameter name="bonusData"><![CDATA[bonusData 
+{
+   element ad9680_adcfifo
+   {
+      datum _sortIndex
+      {
+         value = "11";
+         type = "int";
+      }
+   }
+   element axi_ad9152_core
+   {
+      datum _sortIndex
+      {
+         value = "16";
+         type = "int";
+      }
+   }
+   element axi_ad9152_core.s_axi
+   {
+      datum baseAddress
+      {
+         value = "269025280";
+         type = "String";
+      }
+   }
+   element axi_ad9152_dma
+   {
+      datum _sortIndex
+      {
+         value = "14";
+         type = "int";
+      }
+   }
+   element axi_ad9152_dma.s_axi
+   {
+      datum baseAddress
+      {
+         value = "269156352";
+         type = "String";
+      }
+   }
+   element axi_ad9680_core
+   {
+      datum _sortIndex
+      {
+         value = "13";
+         type = "int";
+      }
+   }
+   element axi_ad9680_core.s_axi
+   {
+      datum baseAddress
+      {
+         value = "269090816";
+         type = "String";
+      }
+   }
+   element axi_ad9680_dma
+   {
+      datum _sortIndex
+      {
+         value = "10";
+         type = "int";
+      }
+      datum sopceditor_expanded
+      {
+         value = "1";
+         type = "boolean";
+      }
+   }
+   element axi_ad9680_dma.s_axi
+   {
+      datum baseAddress
+      {
+         value = "269172736";
+         type = "String";
+      }
+   }
+   element axi_jesd_xcvr
+   {
+      datum _sortIndex
+      {
+         value = "17";
+         type = "int";
+      }
+   }
+   element axi_jesd_xcvr.s_axi
+   {
+      datum baseAddress
+      {
+         value = "268959744";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element daq3_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element mem_clk
+   {
+      datum _sortIndex
+      {
+         value = "2";
+         type = "int";
+      }
+   }
+   element mem_rst
+   {
+      datum _sortIndex
+      {
+         value = "3";
+         type = "int";
+      }
+   }
+   element sys_clk
+   {
+      datum _sortIndex
+      {
+         value = "0";
+         type = "int";
+      }
+   }
+   element sys_rst
+   {
+      datum _sortIndex
+      {
+         value = "1";
+         type = "int";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element system_bd
+   {
+      datum _originalDeviceFamily
+      {
+         value = "Arria 10";
+         type = "String";
+      }
+   }
+   element util_cpack_0
+   {
+      datum _sortIndex
+      {
+         value = "12";
+         type = "int";
+      }
+   }
+   element util_upack_0
+   {
+      datum _sortIndex
+      {
+         value = "15";
+         type = "int";
+      }
+   }
+   element xcvr_core
+   {
+      datum _sortIndex
+      {
+         value = "20";
+         type = "int";
+      }
+   }
+   element xcvr_rst_cntrl
+   {
+      datum _sortIndex
+      {
+         value = "18";
+         type = "int";
+      }
+   }
+   element xcvr_rx_pll
+   {
+      datum _sortIndex
+      {
+         value = "8";
+         type = "int";
+      }
+   }
+   element xcvr_rx_pll_reconfig
+   {
+      datum _sortIndex
+      {
+         value = "9";
+         type = "int";
+      }
+   }
+   element xcvr_rx_ref_clk
+   {
+      datum _sortIndex
+      {
+         value = "7";
+         type = "int";
+      }
+   }
+   element xcvr_tx_lane_pll
+   {
+      datum _sortIndex
+      {
+         value = "19";
+         type = "int";
+      }
+   }
+   element xcvr_tx_pll
+   {
+      datum _sortIndex
+      {
+         value = "5";
+         type = "int";
+      }
+   }
+   element xcvr_tx_pll_reconfig
+   {
+      datum _sortIndex
+      {
+         value = "6";
+         type = "int";
+      }
+   }
+   element xcvr_tx_ref_clk
+   {
+      datum _sortIndex
+      {
+         value = "4";
+         type = "int";
+      }
+   }
+}
+]]></parameter>
+ <parameter name="clockCrossingAdapter" value="FIFO" />
+ <parameter name="device" value="10AX115S3F45E2SGE3" />
+ <parameter name="deviceFamily" value="Arria 10" />
+ <parameter name="deviceSpeedGrade" value="2" />
+ <parameter name="fabricMode" value="QSYS" />
+ <parameter name="generateLegacySim" value="false" />
+ <parameter name="generationId" value="0" />
+ <parameter name="globalResetBus" value="false" />
+ <parameter name="hdlLanguage" value="VERILOG" />
+ <parameter name="hideFromIPCatalog" value="false" />
+ <parameter name="lockedInterfaceDefinition" value="" />
+ <parameter name="maxAdditionalLatency" value="2" />
+ <parameter name="projectName" value="" />
+ <parameter name="sopcBorderPoints" value="false" />
+ <parameter name="systemHash" value="0" />
+ <parameter name="testBenchDutName" value="" />
+ <parameter name="timeStamp" value="0" />
+ <parameter name="useTestBenchNamingPattern" value="false" />
+ <instanceScript></instanceScript>
+ <interface
+   name="axi_ad9152_core_s_axi"
+   internal="axi_ad9152_core.s_axi"
+   type="axi4lite"
+   dir="end" />
+ <interface
+   name="axi_ad9152_dma_intr"
+   internal="axi_ad9152_dma.interrupt_sender"
+   type="interrupt"
+   dir="end" />
+ <interface
+   name="axi_ad9152_dma_m_axi"
+   internal="axi_ad9152_dma.m_src_axi"
+   type="axi4"
+   dir="start" />
+ <interface
+   name="axi_ad9152_dma_s_axi"
+   internal="axi_ad9152_dma.s_axi"
+   type="axi4lite"
+   dir="end" />
+ <interface
+   name="axi_ad9680_core_s_axi"
+   internal="axi_ad9680_core.s_axi"
+   type="axi4lite"
+   dir="end" />
+ <interface
+   name="axi_ad9680_dma_intr"
+   internal="axi_ad9680_dma.interrupt_sender"
+   type="interrupt"
+   dir="end" />
+ <interface
+   name="axi_ad9680_dma_m_axi"
+   internal="axi_ad9680_dma.m_dest_axi"
+   type="axi4"
+   dir="start" />
+ <interface
+   name="axi_ad9680_dma_s_axi"
+   internal="axi_ad9680_dma.s_axi"
+   type="axi4lite"
+   dir="end" />
+ <interface
+   name="axi_jesd_xcvr_s_axi"
+   internal="axi_jesd_xcvr.s_axi"
+   type="axi4lite"
+   dir="end" />
+ <interface name="mem_clk" internal="mem_clk.in_clk" type="clock" dir="end" />
+ <interface name="mem_rst" internal="mem_rst.in_reset" type="reset" dir="end" />
+ <interface
+   name="rx_data"
+   internal="xcvr_core.rx_serial_data"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="rx_ref_clk"
+   internal="xcvr_rx_ref_clk.in_clk"
+   type="clock"
+   dir="end" />
+ <interface
+   name="rx_sync"
+   internal="axi_jesd_xcvr.if_rx_sync"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="rx_sysref"
+   internal="axi_jesd_xcvr.if_rx_ext_sysref_in"
+   type="conduit"
+   dir="end" />
+ <interface name="stp_trigger" internal="axi_jesd_xcvr.if_stp_trigger" />
+ <interface name="sys_clk" internal="sys_clk.in_clk" type="clock" dir="end" />
+ <interface name="sys_rst" internal="sys_rst.in_reset" type="reset" dir="end" />
+ <interface
+   name="tx_data"
+   internal="xcvr_core.tx_serial_data"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="tx_ref_clk"
+   internal="xcvr_tx_ref_clk.in_clk"
+   type="clock"
+   dir="end" />
+ <interface
+   name="tx_sync"
+   internal="axi_jesd_xcvr.if_tx_sync"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="tx_sysref"
+   internal="axi_jesd_xcvr.if_tx_ext_sysref_in"
+   type="conduit"
+   dir="end" />
+ <interface
+   name="xcvr_core_jesd204_rx_s_avl"
+   internal="xcvr_core.jesd204_rx_avs"
+   type="avalon"
+   dir="end" />
+ <interface
+   name="xcvr_core_jesd204_tx_s_avl"
+   internal="xcvr_core.jesd204_tx_avs"
+   type="avalon"
+   dir="end" />
+ <interface
+   name="xcvr_core_reconfig_s_avl"
+   internal="xcvr_core.reconfig_avmm"
+   type="avalon"
+   dir="end" />
+ <interface
+   name="xcvr_rx_pll_reconfig_s_avl"
+   internal="xcvr_rx_pll_reconfig.mgmt_avalon_slave"
+   type="avalon"
+   dir="end" />
+ <interface
+   name="xcvr_tx_lane_pll_s_avl"
+   internal="xcvr_tx_lane_pll.reconfig_avmm0"
+   type="avalon"
+   dir="end" />
+ <interface
+   name="xcvr_tx_pll_reconfig_s_avl"
+   internal="xcvr_tx_pll_reconfig.mgmt_avalon_slave"
+   type="avalon"
+   dir="end" />
+ <module name="ad9680_adcfifo" kind="util_adcfifo" version="1.0" enabled="1">
+  <parameter name="ADC_DATA_WIDTH" value="128" />
+  <parameter name="DMA_ADDRESS_WIDTH" value="15" />
+  <parameter name="DMA_DATA_WIDTH" value="128" />
+  <parameter name="DMA_READY_ENABLE" value="1" />
+ </module>
+ <module name="axi_ad9152_core" kind="axi_ad9152" version="1.0" enabled="1">
+  <parameter name="ID" value="0" />
+ </module>
+ <module name="axi_ad9152_dma" kind="axi_dmac" version="1.0" enabled="1">
+  <parameter name="ASYNC_CLK_DEST_REQ" value="1" />
+  <parameter name="ASYNC_CLK_REQ_SRC" value="1" />
+  <parameter name="ASYNC_CLK_SRC_DEST" value="1" />
+  <parameter name="AXI_SLICE_DEST" value="0" />
+  <parameter name="AXI_SLICE_SRC" value="0" />
+  <parameter name="CYCLIC" value="1" />
+  <parameter name="DMA_2D_TRANSFER" value="0" />
+  <parameter name="DMA_DATA_WIDTH_DEST" value="128" />
+  <parameter name="DMA_DATA_WIDTH_SRC" value="128" />
+  <parameter name="DMA_LENGTH_WIDTH" value="14" />
+  <parameter name="DMA_TYPE_DEST" value="2" />
+  <parameter name="DMA_TYPE_SRC" value="0" />
+  <parameter name="FIFO_SIZE" value="4" />
+  <parameter name="ID" value="0" />
+  <parameter name="SYNC_TRANSFER_START" value="0" />
+ </module>
+ <module name="axi_ad9680_core" kind="axi_ad9680" version="1.0" enabled="1">
+  <parameter name="ID" value="0" />
+ </module>
+ <module name="axi_ad9680_dma" kind="axi_dmac" version="1.0" enabled="1">
+  <parameter name="ASYNC_CLK_DEST_REQ" value="1" />
+  <parameter name="ASYNC_CLK_REQ_SRC" value="1" />
+  <parameter name="ASYNC_CLK_SRC_DEST" value="1" />
+  <parameter name="AXI_SLICE_DEST" value="0" />
+  <parameter name="AXI_SLICE_SRC" value="0" />
+  <parameter name="CYCLIC" value="0" />
+  <parameter name="DMA_2D_TRANSFER" value="0" />
+  <parameter name="DMA_DATA_WIDTH_DEST" value="128" />
+  <parameter name="DMA_DATA_WIDTH_SRC" value="128" />
+  <parameter name="DMA_LENGTH_WIDTH" value="24" />
+  <parameter name="DMA_TYPE_DEST" value="0" />
+  <parameter name="DMA_TYPE_SRC" value="1" />
+  <parameter name="FIFO_SIZE" value="4" />
+  <parameter name="ID" value="0" />
+  <parameter name="SYNC_TRANSFER_START" value="1" />
+ </module>
+ <module name="axi_jesd_xcvr" kind="axi_jesd_xcvr" version="1.0" enabled="1">
+  <parameter name="DEVICE_TYPE" value="0" />
+  <parameter name="ID" value="0" />
+  <parameter name="RX_NUM_OF_LANES" value="4" />
+  <parameter name="TX_NUM_OF_LANES" value="4" />
+ </module>
+ <module name="mem_clk" kind="altera_clock_bridge" version="15.1" enabled="1">
+  <parameter name="DERIVED_CLOCK_RATE" value="0" />
+  <parameter name="EXPLICIT_CLOCK_RATE" value="125000000" />
+  <parameter name="NUM_CLOCK_OUTPUTS" value="1" />
+ </module>
+ <module name="mem_rst" kind="altera_reset_bridge" version="15.1" enabled="1">
+  <parameter name="ACTIVE_LOW_RESET" value="0" />
+  <parameter name="AUTO_CLK_CLOCK_RATE" value="-1" />
+  <parameter name="NUM_RESET_OUTPUTS" value="1" />
+  <parameter name="SYNCHRONOUS_EDGES" value="none" />
+  <parameter name="USE_RESET_REQUEST" value="0" />
+ </module>
+ <module name="sys_clk" kind="altera_clock_bridge" version="15.1" enabled="1">
+  <parameter name="DERIVED_CLOCK_RATE" value="0" />
+  <parameter name="EXPLICIT_CLOCK_RATE" value="100000000" />
+  <parameter name="NUM_CLOCK_OUTPUTS" value="1" />
+ </module>
+ <module name="sys_rst" kind="altera_reset_bridge" version="15.1" enabled="1">
+  <parameter name="ACTIVE_LOW_RESET" value="0" />
+  <parameter name="AUTO_CLK_CLOCK_RATE" value="-1" />
+  <parameter name="NUM_RESET_OUTPUTS" value="1" />
+  <parameter name="SYNCHRONOUS_EDGES" value="none" />
+  <parameter name="USE_RESET_REQUEST" value="0" />
+ </module>
+ <module name="util_cpack_0" kind="util_cpack" version="1.0" enabled="1">
+  <parameter name="CHANNEL_DATA_WIDTH" value="64" />
+  <parameter name="NUM_OF_CHANNELS" value="2" />
+ </module>
+ <module name="util_upack_0" kind="util_upack" version="1.0" enabled="1">
+  <parameter name="CHANNEL_DATA_WIDTH" value="64" />
+  <parameter name="NUM_OF_CHANNELS" value="2" />
+ </module>
+ <module name="xcvr_core" kind="altera_jesd204" version="15.1" enabled="1">
+  <parameter name="ADJCNT" value="0" />
+  <parameter name="ADJDIR" value="0" />
+  <parameter name="AUTO_DEVICE" value="10AX115S3F45E2SGE3" />
+  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="2" />
+  <parameter name="BID" value="0" />
+  <parameter name="CF" value="0" />
+  <parameter name="CS" value="0" />
+  <parameter name="DATA_PATH" value="RX_TX" />
+  <parameter name="DEVICE_FAMILY" value="Arria 10" />
+  <parameter name="DID" value="0" />
+  <parameter name="DLB_TEST" value="0" />
+  <parameter name="ECC_EN" value="0" />
+  <parameter name="ED_DEV_KIT" value="NONE" />
+  <parameter name="ED_FILESET_SIM" value="false" />
+  <parameter name="ED_FILESET_SYNTH" value="false" />
+  <parameter name="ED_GENERIC_5SERIES" value="No" />
+  <parameter name="ED_GENERIC_A10" value="No" />
+  <parameter name="ED_HDL_FORMAT_SIM" value="VERILOG" />
+  <parameter name="ED_HDL_FORMAT_SYNTH" value="VERILOG" />
+  <parameter name="GUI_CFG_F" value="1" />
+  <parameter name="GUI_EN_CFG_F" value="true" />
+  <parameter name="HD" value="1" />
+  <parameter name="JESDV" value="1" />
+  <parameter name="K" value="32" />
+  <parameter name="L" value="4" />
+  <parameter name="LID0" value="0" />
+  <parameter name="LID1" value="1" />
+  <parameter name="LID2" value="2" />
+  <parameter name="LID3" value="3" />
+  <parameter name="LID4" value="4" />
+  <parameter name="LID5" value="5" />
+  <parameter name="LID6" value="6" />
+  <parameter name="LID7" value="7" />
+  <parameter name="M" value="2" />
+  <parameter name="N" value="16" />
+  <parameter name="N_PRIME" value="16" />
+  <parameter name="OPTIMIZE" value="0" />
+  <parameter name="PCS_CONFIG" value="JESD_PCS_CFG2" />
+  <parameter name="PHADJ" value="0" />
+  <parameter name="REFCLK_FREQ" value="500.0" />
+  <parameter name="RES1" value="0" />
+  <parameter name="RES2" value="0" />
+  <parameter name="S" value="1" />
+  <parameter name="SCR" value="1" />
+  <parameter name="SUBCLASSV" value="1" />
+  <parameter name="TERMINATE_RECONFIG_EN" value="false" />
+  <parameter name="TEST_COMPONENTS_EN" value="false" />
+  <parameter name="bitrev_en" value="false" />
+  <parameter name="bonded_mode" value="non_bonded" />
+  <parameter name="lane_rate" value="10000.0" />
+  <parameter name="part_trait_bd" value="NIGHTFURY5" />
+  <parameter name="part_trait_dp" value="10AX115S3F45E2SGE3" />
+  <parameter name="pll_reconfig_enable" value="true" />
+  <parameter name="pll_type" value="CMU" />
+  <parameter name="rcfg_jtag_enable" value="false" />
+  <parameter name="sdc_constraint" value="1.0" />
+  <parameter name="set_capability_reg_enable" value="true" />
+  <parameter name="set_csr_soft_logic_enable" value="true" />
+  <parameter name="set_prbs_soft_logic_enable" value="false" />
+  <parameter name="set_user_identifier" value="0" />
+  <parameter name="wrapper_opt" value="base_phy" />
+ </module>
+ <module
+   name="xcvr_rst_cntrl"
+   kind="altera_xcvr_reset_control"
+   version="15.1"
+   enabled="1">
+  <parameter name="CHANNELS" value="4" />
+  <parameter name="PLLS" value="1" />
+  <parameter name="REDUCED_SIM_TIME" value="1" />
+  <parameter name="RX_ENABLE" value="1" />
+  <parameter name="RX_PER_CHANNEL" value="0" />
+  <parameter name="SYNCHRONIZE_PLL_RESET" value="0" />
+  <parameter name="SYNCHRONIZE_RESET" value="1" />
+  <parameter name="SYS_CLK_IN_MHZ" value="100" />
+  <parameter name="TX_ENABLE" value="1" />
+  <parameter name="TX_PER_CHANNEL" value="0" />
+  <parameter name="TX_PLL_ENABLE" value="1" />
+  <parameter name="T_PLL_LOCK_HYST" value="100" />
+  <parameter name="T_PLL_POWERDOWN" value="1000" />
+  <parameter name="T_RX_ANALOGRESET" value="70000" />
+  <parameter name="T_RX_DIGITALRESET" value="4000" />
+  <parameter name="T_TX_ANALOGRESET" value="700000" />
+  <parameter name="T_TX_DIGITALRESET" value="700000" />
+  <parameter name="device_family" value="Arria 10" />
+  <parameter name="gui_pll_cal_busy" value="1" />
+  <parameter name="gui_rx_auto_reset" value="0" />
+  <parameter name="gui_split_interfaces" value="0" />
+  <parameter name="gui_tx_auto_reset" value="0" />
+ </module>
+ <module name="xcvr_rx_pll" kind="altera_iopll" version="15.1" enabled="1">
+  <parameter name="gui_active_clk" value="false" />
+  <parameter name="gui_actual_duty_cycle0" value="50.0" />
+  <parameter name="gui_actual_duty_cycle1" value="50.0" />
+  <parameter name="gui_actual_duty_cycle10" value="50.0" />
+  <parameter name="gui_actual_duty_cycle11" value="50.0" />
+  <parameter name="gui_actual_duty_cycle12" value="50.0" />
+  <parameter name="gui_actual_duty_cycle13" value="50.0" />
+  <parameter name="gui_actual_duty_cycle14" value="50.0" />
+  <parameter name="gui_actual_duty_cycle15" value="50.0" />
+  <parameter name="gui_actual_duty_cycle16" value="50.0" />
+  <parameter name="gui_actual_duty_cycle17" value="50.0" />
+  <parameter name="gui_actual_duty_cycle2" value="50.0" />
+  <parameter name="gui_actual_duty_cycle3" value="50.0" />
+  <parameter name="gui_actual_duty_cycle4" value="50.0" />
+  <parameter name="gui_actual_duty_cycle5" value="50.0" />
+  <parameter name="gui_actual_duty_cycle6" value="50.0" />
+  <parameter name="gui_actual_duty_cycle7" value="50.0" />
+  <parameter name="gui_actual_duty_cycle8" value="50.0" />
+  <parameter name="gui_actual_duty_cycle9" value="50.0" />
+  <parameter name="gui_actual_output_clock_frequency0" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency1" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency10" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency11" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency12" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency13" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency14" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency15" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency16" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency17" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency2" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency3" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency4" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency5" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency6" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency7" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency8" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency9" value="100.0" />
+  <parameter name="gui_actual_phase_shift0" value="0.0" />
+  <parameter name="gui_actual_phase_shift1" value="0.0" />
+  <parameter name="gui_actual_phase_shift10" value="0.0" />
+  <parameter name="gui_actual_phase_shift11" value="0.0" />
+  <parameter name="gui_actual_phase_shift12" value="0.0" />
+  <parameter name="gui_actual_phase_shift13" value="0.0" />
+  <parameter name="gui_actual_phase_shift14" value="0.0" />
+  <parameter name="gui_actual_phase_shift15" value="0.0" />
+  <parameter name="gui_actual_phase_shift16" value="0.0" />
+  <parameter name="gui_actual_phase_shift17" value="0.0" />
+  <parameter name="gui_actual_phase_shift2" value="0.0" />
+  <parameter name="gui_actual_phase_shift3" value="0.0" />
+  <parameter name="gui_actual_phase_shift4" value="0.0" />
+  <parameter name="gui_actual_phase_shift5" value="0.0" />
+  <parameter name="gui_actual_phase_shift6" value="0.0" />
+  <parameter name="gui_actual_phase_shift7" value="0.0" />
+  <parameter name="gui_actual_phase_shift8" value="0.0" />
+  <parameter name="gui_actual_phase_shift9" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg0" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg1" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg10" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg11" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg12" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg13" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg14" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg15" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg16" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg17" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg2" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg3" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg4" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg5" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg6" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg7" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg8" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg9" value="0.0" />
+  <parameter name="gui_cascade_counter0" value="false" />
+  <parameter name="gui_cascade_counter1" value="false" />
+  <parameter name="gui_cascade_counter10" value="false" />
+  <parameter name="gui_cascade_counter11" value="false" />
+  <parameter name="gui_cascade_counter12" value="false" />
+  <parameter name="gui_cascade_counter13" value="false" />
+  <parameter name="gui_cascade_counter14" value="false" />
+  <parameter name="gui_cascade_counter15" value="false" />
+  <parameter name="gui_cascade_counter16" value="false" />
+  <parameter name="gui_cascade_counter17" value="false" />
+  <parameter name="gui_cascade_counter2" value="false" />
+  <parameter name="gui_cascade_counter3" value="false" />
+  <parameter name="gui_cascade_counter4" value="false" />
+  <parameter name="gui_cascade_counter5" value="false" />
+  <parameter name="gui_cascade_counter6" value="false" />
+  <parameter name="gui_cascade_counter7" value="false" />
+  <parameter name="gui_cascade_counter8" value="false" />
+  <parameter name="gui_cascade_counter9" value="false" />
+  <parameter name="gui_cascade_outclk_index" value="0" />
+  <parameter name="gui_clk_bad" value="false" />
+  <parameter name="gui_clock_name_global0" value="false" />
+  <parameter name="gui_clock_name_global1" value="false" />
+  <parameter name="gui_clock_name_global10" value="false" />
+  <parameter name="gui_clock_name_global11" value="false" />
+  <parameter name="gui_clock_name_global12" value="false" />
+  <parameter name="gui_clock_name_global13" value="false" />
+  <parameter name="gui_clock_name_global14" value="false" />
+  <parameter name="gui_clock_name_global15" value="false" />
+  <parameter name="gui_clock_name_global16" value="false" />
+  <parameter name="gui_clock_name_global17" value="false" />
+  <parameter name="gui_clock_name_global2" value="false" />
+  <parameter name="gui_clock_name_global3" value="false" />
+  <parameter name="gui_clock_name_global4" value="false" />
+  <parameter name="gui_clock_name_global5" value="false" />
+  <parameter name="gui_clock_name_global6" value="false" />
+  <parameter name="gui_clock_name_global7" value="false" />
+  <parameter name="gui_clock_name_global8" value="false" />
+  <parameter name="gui_clock_name_global9" value="false" />
+  <parameter name="gui_clock_name_string0" value="outclk0" />
+  <parameter name="gui_clock_name_string1" value="outclk1" />
+  <parameter name="gui_clock_name_string10" value="outclk10" />
+  <parameter name="gui_clock_name_string11" value="outclk11" />
+  <parameter name="gui_clock_name_string12" value="outclk12" />
+  <parameter name="gui_clock_name_string13" value="outclk13" />
+  <parameter name="gui_clock_name_string14" value="outclk14" />
+  <parameter name="gui_clock_name_string15" value="outclk15" />
+  <parameter name="gui_clock_name_string16" value="outclk16" />
+  <parameter name="gui_clock_name_string17" value="outclk17" />
+  <parameter name="gui_clock_name_string2" value="outclk2" />
+  <parameter name="gui_clock_name_string3" value="outclk3" />
+  <parameter name="gui_clock_name_string4" value="outclk4" />
+  <parameter name="gui_clock_name_string5" value="outclk5" />
+  <parameter name="gui_clock_name_string6" value="outclk6" />
+  <parameter name="gui_clock_name_string7" value="outclk7" />
+  <parameter name="gui_clock_name_string8" value="outclk8" />
+  <parameter name="gui_clock_name_string9" value="outclk9" />
+  <parameter name="gui_device_speed_grade" value="1" />
+  <parameter name="gui_divide_factor_c0" value="6" />
+  <parameter name="gui_divide_factor_c1" value="6" />
+  <parameter name="gui_divide_factor_c10" value="6" />
+  <parameter name="gui_divide_factor_c11" value="6" />
+  <parameter name="gui_divide_factor_c12" value="6" />
+  <parameter name="gui_divide_factor_c13" value="6" />
+  <parameter name="gui_divide_factor_c14" value="6" />
+  <parameter name="gui_divide_factor_c15" value="6" />
+  <parameter name="gui_divide_factor_c16" value="6" />
+  <parameter name="gui_divide_factor_c17" value="6" />
+  <parameter name="gui_divide_factor_c2" value="6" />
+  <parameter name="gui_divide_factor_c3" value="6" />
+  <parameter name="gui_divide_factor_c4" value="6" />
+  <parameter name="gui_divide_factor_c5" value="6" />
+  <parameter name="gui_divide_factor_c6" value="6" />
+  <parameter name="gui_divide_factor_c7" value="6" />
+  <parameter name="gui_divide_factor_c8" value="6" />
+  <parameter name="gui_divide_factor_c9" value="6" />
+  <parameter name="gui_divide_factor_n" value="1" />
+  <parameter name="gui_dps_cntr" value="C0" />
+  <parameter name="gui_dps_dir" value="Positive" />
+  <parameter name="gui_dps_num" value="1" />
+  <parameter name="gui_dsm_out_sel" value="1st_order" />
+  <parameter name="gui_duty_cycle0" value="50.0" />
+  <parameter name="gui_duty_cycle1" value="50.0" />
+  <parameter name="gui_duty_cycle10" value="50.0" />
+  <parameter name="gui_duty_cycle11" value="50.0" />
+  <parameter name="gui_duty_cycle12" value="50.0" />
+  <parameter name="gui_duty_cycle13" value="50.0" />
+  <parameter name="gui_duty_cycle14" value="50.0" />
+  <parameter name="gui_duty_cycle15" value="50.0" />
+  <parameter name="gui_duty_cycle16" value="50.0" />
+  <parameter name="gui_duty_cycle17" value="50.0" />
+  <parameter name="gui_duty_cycle2" value="50.0" />
+  <parameter name="gui_duty_cycle3" value="50.0" />
+  <parameter name="gui_duty_cycle4" value="50.0" />
+  <parameter name="gui_duty_cycle5" value="50.0" />
+  <parameter name="gui_duty_cycle6" value="50.0" />
+  <parameter name="gui_duty_cycle7" value="50.0" />
+  <parameter name="gui_duty_cycle8" value="50.0" />
+  <parameter name="gui_duty_cycle9" value="50.0" />
+  <parameter name="gui_en_adv_params" value="false" />
+  <parameter name="gui_en_dps_ports" value="false" />
+  <parameter name="gui_en_extclkout_ports" value="false" />
+  <parameter name="gui_en_lvds_ports" value="Disabled" />
+  <parameter name="gui_en_phout_ports" value="false" />
+  <parameter name="gui_en_reconf" value="true" />
+  <parameter name="gui_enable_cascade_in" value="false" />
+  <parameter name="gui_enable_cascade_out" value="false" />
+  <parameter name="gui_enable_mif_dps" value="false" />
+  <parameter name="gui_enable_output_counter_cascading" value="false" />
+  <parameter name="gui_extclkout_0_source" value="C0" />
+  <parameter name="gui_extclkout_1_source" value="C0" />
+  <parameter name="gui_feedback_clock" value="Global Clock" />
+  <parameter name="gui_fix_vco_frequency" value="false" />
+  <parameter name="gui_fixed_vco_frequency" value="600.0" />
+  <parameter name="gui_frac_multiply_factor" value="1" />
+  <parameter name="gui_fractional_cout" value="32" />
+  <parameter name="gui_mif_generate" value="false" />
+  <parameter name="gui_multiply_factor" value="6" />
+  <parameter name="gui_number_of_clocks" value="1" />
+  <parameter name="gui_operation_mode" value="direct" />
+  <parameter name="gui_output_clock_frequency0" value="250.0" />
+  <parameter name="gui_output_clock_frequency1" value="100.0" />
+  <parameter name="gui_output_clock_frequency10" value="100.0" />
+  <parameter name="gui_output_clock_frequency11" value="100.0" />
+  <parameter name="gui_output_clock_frequency12" value="100.0" />
+  <parameter name="gui_output_clock_frequency13" value="100.0" />
+  <parameter name="gui_output_clock_frequency14" value="100.0" />
+  <parameter name="gui_output_clock_frequency15" value="100.0" />
+  <parameter name="gui_output_clock_frequency16" value="100.0" />
+  <parameter name="gui_output_clock_frequency17" value="100.0" />
+  <parameter name="gui_output_clock_frequency2" value="100.0" />
+  <parameter name="gui_output_clock_frequency3" value="100.0" />
+  <parameter name="gui_output_clock_frequency4" value="100.0" />
+  <parameter name="gui_output_clock_frequency5" value="100.0" />
+  <parameter name="gui_output_clock_frequency6" value="100.0" />
+  <parameter name="gui_output_clock_frequency7" value="100.0" />
+  <parameter name="gui_output_clock_frequency8" value="100.0" />
+  <parameter name="gui_output_clock_frequency9" value="100.0" />
+  <parameter name="gui_phase_shift0" value="0.0" />
+  <parameter name="gui_phase_shift1" value="0.0" />
+  <parameter name="gui_phase_shift10" value="0.0" />
+  <parameter name="gui_phase_shift11" value="0.0" />
+  <parameter name="gui_phase_shift12" value="0.0" />
+  <parameter name="gui_phase_shift13" value="0.0" />
+  <parameter name="gui_phase_shift14" value="0.0" />
+  <parameter name="gui_phase_shift15" value="0.0" />
+  <parameter name="gui_phase_shift16" value="0.0" />
+  <parameter name="gui_phase_shift17" value="0.0" />
+  <parameter name="gui_phase_shift2" value="0.0" />
+  <parameter name="gui_phase_shift3" value="0.0" />
+  <parameter name="gui_phase_shift4" value="0.0" />
+  <parameter name="gui_phase_shift5" value="0.0" />
+  <parameter name="gui_phase_shift6" value="0.0" />
+  <parameter name="gui_phase_shift7" value="0.0" />
+  <parameter name="gui_phase_shift8" value="0.0" />
+  <parameter name="gui_phase_shift9" value="0.0" />
+  <parameter name="gui_phase_shift_deg0" value="0.0" />
+  <parameter name="gui_phase_shift_deg1" value="0.0" />
+  <parameter name="gui_phase_shift_deg10" value="0.0" />
+  <parameter name="gui_phase_shift_deg11" value="0.0" />
+  <parameter name="gui_phase_shift_deg12" value="0.0" />
+  <parameter name="gui_phase_shift_deg13" value="0.0" />
+  <parameter name="gui_phase_shift_deg14" value="0.0" />
+  <parameter name="gui_phase_shift_deg15" value="0.0" />
+  <parameter name="gui_phase_shift_deg16" value="0.0" />
+  <parameter name="gui_phase_shift_deg17" value="0.0" />
+  <parameter name="gui_phase_shift_deg2" value="0.0" />
+  <parameter name="gui_phase_shift_deg3" value="0.0" />
+  <parameter name="gui_phase_shift_deg4" value="0.0" />
+  <parameter name="gui_phase_shift_deg5" value="0.0" />
+  <parameter name="gui_phase_shift_deg6" value="0.0" />
+  <parameter name="gui_phase_shift_deg7" value="0.0" />
+  <parameter name="gui_phase_shift_deg8" value="0.0" />
+  <parameter name="gui_phase_shift_deg9" value="0.0" />
+  <parameter name="gui_phout_division" value="1" />
+  <parameter name="gui_pll_auto_reset" value="false" />
+  <parameter name="gui_pll_bandwidth_preset" value="Low" />
+  <parameter name="gui_pll_cascading_mode" value="adjpllin" />
+  <parameter name="gui_pll_mode" value="Integer-N PLL" />
+  <parameter name="gui_ps_units0" value="ps" />
+  <parameter name="gui_ps_units1" value="ps" />
+  <parameter name="gui_ps_units10" value="ps" />
+  <parameter name="gui_ps_units11" value="ps" />
+  <parameter name="gui_ps_units12" value="ps" />
+  <parameter name="gui_ps_units13" value="ps" />
+  <parameter name="gui_ps_units14" value="ps" />
+  <parameter name="gui_ps_units15" value="ps" />
+  <parameter name="gui_ps_units16" value="ps" />
+  <parameter name="gui_ps_units17" value="ps" />
+  <parameter name="gui_ps_units2" value="ps" />
+  <parameter name="gui_ps_units3" value="ps" />
+  <parameter name="gui_ps_units4" value="ps" />
+  <parameter name="gui_ps_units5" value="ps" />
+  <parameter name="gui_ps_units6" value="ps" />
+  <parameter name="gui_ps_units7" value="ps" />
+  <parameter name="gui_ps_units8" value="ps" />
+  <parameter name="gui_ps_units9" value="ps" />
+  <parameter name="gui_refclk1_frequency" value="100.0" />
+  <parameter name="gui_refclk_switch" value="false" />
+  <parameter name="gui_reference_clock_frequency" value="500.0" />
+  <parameter name="gui_switchover_delay" value="0" />
+  <parameter name="gui_switchover_mode">Automatic Switchover</parameter>
+  <parameter name="gui_use_NDFB_modes" value="false" />
+  <parameter name="gui_use_locked" value="false" />
+  <parameter name="gui_vco_frequency" value="600.0" />
+  <parameter name="system_info_device_component" value="10AX115S3F45E2SGE3" />
+  <parameter name="system_info_device_family" value="Arria 10" />
+  <parameter name="system_info_device_speed_grade" value="2" />
+  <parameter name="system_part_trait_speed_grade" value="2" />
+ </module>
+ <module
+   name="xcvr_rx_pll_reconfig"
+   kind="altera_pll_reconfig"
+   version="15.1"
+   enabled="1">
+  <parameter name="ENABLE_BYTEENABLE" value="false" />
+  <parameter name="ENABLE_MIF" value="false" />
+  <parameter name="MIF_FILE_NAME" value="" />
+  <parameter name="device_family" value="Arria 10" />
+ </module>
+ <module
+   name="xcvr_rx_ref_clk"
+   kind="altera_clock_bridge"
+   version="15.1"
+   enabled="1">
+  <parameter name="DERIVED_CLOCK_RATE" value="0" />
+  <parameter name="EXPLICIT_CLOCK_RATE" value="500000000" />
+  <parameter name="NUM_CLOCK_OUTPUTS" value="1" />
+ </module>
+ <module
+   name="xcvr_tx_lane_pll"
+   kind="altera_xcvr_atx_pll_a10"
+   version="15.1"
+   enabled="1">
+  <parameter name="base_device" value="NIGHTFURY5" />
+  <parameter name="bw_sel" value="medium" />
+  <parameter name="device" value="10AX115S3F45E2SGE3" />
+  <parameter name="device_family" value="Arria 10" />
+  <parameter name="enable_16G_path" value="0" />
+  <parameter name="enable_8G_path" value="1" />
+  <parameter name="enable_analog_resets" value="0" />
+  <parameter name="enable_atx_to_fpll_cascade_out" value="0" />
+  <parameter name="enable_bonding_clks" value="0" />
+  <parameter name="enable_cascade_out" value="0" />
+  <parameter name="enable_debug_ports_parameters" value="0" />
+  <parameter name="enable_fb_comp_bonding" value="0" />
+  <parameter name="enable_fractional" value="0" />
+  <parameter name="enable_hfreq_clk" value="0" />
+  <parameter name="enable_hip_cal_done_port" value="0" />
+  <parameter name="enable_manual_configuration" value="1" />
+  <parameter name="enable_mcgb" value="0" />
+  <parameter name="enable_mcgb_pcie_clksw" value="0" />
+  <parameter name="enable_pcie_clk" value="0" />
+  <parameter name="enable_pld_atx_cal_busy_port" value="1" />
+  <parameter name="enable_pld_mcgb_cal_busy_port" value="0" />
+  <parameter name="enable_pll_reconfig" value="1" />
+  <parameter name="generate_add_hdl_instance_example" value="0" />
+  <parameter name="generate_docs" value="1" />
+  <parameter name="mcgb_aux_clkin_cnt" value="0" />
+  <parameter name="mcgb_div" value="1" />
+  <parameter name="message_level" value="error" />
+  <parameter name="pma_width" value="64" />
+  <parameter name="primary_pll_buffer">GX clock output buffer</parameter>
+  <parameter name="prot_mode" value="Basic" />
+  <parameter name="rcfg_debug" value="0" />
+  <parameter name="rcfg_enable_avmm_busy_port" value="0" />
+  <parameter name="rcfg_file_prefix">altera_xcvr_atx_pll_a10</parameter>
+  <parameter name="rcfg_h_file_enable" value="0" />
+  <parameter name="rcfg_jtag_enable" value="0" />
+  <parameter name="rcfg_mif_file_enable" value="0" />
+  <parameter name="rcfg_multi_enable" value="0" />
+  <parameter name="rcfg_param_vals1" value="" />
+  <parameter name="rcfg_param_vals2" value="" />
+  <parameter name="rcfg_profile_cnt" value="2" />
+  <parameter name="rcfg_profile_select" value="1" />
+  <parameter name="rcfg_separate_avmm_busy" value="1" />
+  <parameter name="rcfg_sv_file_enable" value="0" />
+  <parameter name="rcfg_txt_file_enable" value="0" />
+  <parameter name="refclk_cnt" value="1" />
+  <parameter name="refclk_index" value="0" />
+  <parameter name="select_manual_config" value="false" />
+  <parameter name="set_altera_xcvr_atx_pll_a10_calibration_en" value="1" />
+  <parameter name="set_auto_reference_clock_frequency" value="500.0" />
+  <parameter name="set_capability_reg_enable" value="1" />
+  <parameter name="set_csr_soft_logic_enable" value="1" />
+  <parameter name="set_fref_clock_frequency" value="156.25" />
+  <parameter name="set_hip_cal_en" value="0" />
+  <parameter name="set_k_counter" value="2000000000" />
+  <parameter name="set_l_cascade_counter" value="15" />
+  <parameter name="set_l_cascade_predivider" value="1" />
+  <parameter name="set_l_counter" value="16" />
+  <parameter name="set_m_counter" value="24" />
+  <parameter name="set_manual_reference_clock_frequency" value="200.0" />
+  <parameter name="set_output_clock_frequency" value="5000.0" />
+  <parameter name="set_ref_clk_div" value="1" />
+  <parameter name="set_user_identifier" value="0" />
+  <parameter name="silicon_rev" value="false" />
+  <parameter name="support_mode" value="user_mode" />
+  <parameter name="test_mode" value="0" />
+ </module>
+ <module name="xcvr_tx_pll" kind="altera_iopll" version="15.1" enabled="1">
+  <parameter name="gui_active_clk" value="false" />
+  <parameter name="gui_actual_duty_cycle0" value="50.0" />
+  <parameter name="gui_actual_duty_cycle1" value="50.0" />
+  <parameter name="gui_actual_duty_cycle10" value="50.0" />
+  <parameter name="gui_actual_duty_cycle11" value="50.0" />
+  <parameter name="gui_actual_duty_cycle12" value="50.0" />
+  <parameter name="gui_actual_duty_cycle13" value="50.0" />
+  <parameter name="gui_actual_duty_cycle14" value="50.0" />
+  <parameter name="gui_actual_duty_cycle15" value="50.0" />
+  <parameter name="gui_actual_duty_cycle16" value="50.0" />
+  <parameter name="gui_actual_duty_cycle17" value="50.0" />
+  <parameter name="gui_actual_duty_cycle2" value="50.0" />
+  <parameter name="gui_actual_duty_cycle3" value="50.0" />
+  <parameter name="gui_actual_duty_cycle4" value="50.0" />
+  <parameter name="gui_actual_duty_cycle5" value="50.0" />
+  <parameter name="gui_actual_duty_cycle6" value="50.0" />
+  <parameter name="gui_actual_duty_cycle7" value="50.0" />
+  <parameter name="gui_actual_duty_cycle8" value="50.0" />
+  <parameter name="gui_actual_duty_cycle9" value="50.0" />
+  <parameter name="gui_actual_output_clock_frequency0" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency1" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency10" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency11" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency12" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency13" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency14" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency15" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency16" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency17" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency2" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency3" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency4" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency5" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency6" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency7" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency8" value="100.0" />
+  <parameter name="gui_actual_output_clock_frequency9" value="100.0" />
+  <parameter name="gui_actual_phase_shift0" value="0.0" />
+  <parameter name="gui_actual_phase_shift1" value="0.0" />
+  <parameter name="gui_actual_phase_shift10" value="0.0" />
+  <parameter name="gui_actual_phase_shift11" value="0.0" />
+  <parameter name="gui_actual_phase_shift12" value="0.0" />
+  <parameter name="gui_actual_phase_shift13" value="0.0" />
+  <parameter name="gui_actual_phase_shift14" value="0.0" />
+  <parameter name="gui_actual_phase_shift15" value="0.0" />
+  <parameter name="gui_actual_phase_shift16" value="0.0" />
+  <parameter name="gui_actual_phase_shift17" value="0.0" />
+  <parameter name="gui_actual_phase_shift2" value="0.0" />
+  <parameter name="gui_actual_phase_shift3" value="0.0" />
+  <parameter name="gui_actual_phase_shift4" value="0.0" />
+  <parameter name="gui_actual_phase_shift5" value="0.0" />
+  <parameter name="gui_actual_phase_shift6" value="0.0" />
+  <parameter name="gui_actual_phase_shift7" value="0.0" />
+  <parameter name="gui_actual_phase_shift8" value="0.0" />
+  <parameter name="gui_actual_phase_shift9" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg0" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg1" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg10" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg11" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg12" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg13" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg14" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg15" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg16" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg17" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg2" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg3" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg4" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg5" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg6" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg7" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg8" value="0.0" />
+  <parameter name="gui_actual_phase_shift_deg9" value="0.0" />
+  <parameter name="gui_cascade_counter0" value="false" />
+  <parameter name="gui_cascade_counter1" value="false" />
+  <parameter name="gui_cascade_counter10" value="false" />
+  <parameter name="gui_cascade_counter11" value="false" />
+  <parameter name="gui_cascade_counter12" value="false" />
+  <parameter name="gui_cascade_counter13" value="false" />
+  <parameter name="gui_cascade_counter14" value="false" />
+  <parameter name="gui_cascade_counter15" value="false" />
+  <parameter name="gui_cascade_counter16" value="false" />
+  <parameter name="gui_cascade_counter17" value="false" />
+  <parameter name="gui_cascade_counter2" value="false" />
+  <parameter name="gui_cascade_counter3" value="false" />
+  <parameter name="gui_cascade_counter4" value="false" />
+  <parameter name="gui_cascade_counter5" value="false" />
+  <parameter name="gui_cascade_counter6" value="false" />
+  <parameter name="gui_cascade_counter7" value="false" />
+  <parameter name="gui_cascade_counter8" value="false" />
+  <parameter name="gui_cascade_counter9" value="false" />
+  <parameter name="gui_cascade_outclk_index" value="0" />
+  <parameter name="gui_clk_bad" value="false" />
+  <parameter name="gui_clock_name_global0" value="false" />
+  <parameter name="gui_clock_name_global1" value="false" />
+  <parameter name="gui_clock_name_global10" value="false" />
+  <parameter name="gui_clock_name_global11" value="false" />
+  <parameter name="gui_clock_name_global12" value="false" />
+  <parameter name="gui_clock_name_global13" value="false" />
+  <parameter name="gui_clock_name_global14" value="false" />
+  <parameter name="gui_clock_name_global15" value="false" />
+  <parameter name="gui_clock_name_global16" value="false" />
+  <parameter name="gui_clock_name_global17" value="false" />
+  <parameter name="gui_clock_name_global2" value="false" />
+  <parameter name="gui_clock_name_global3" value="false" />
+  <parameter name="gui_clock_name_global4" value="false" />
+  <parameter name="gui_clock_name_global5" value="false" />
+  <parameter name="gui_clock_name_global6" value="false" />
+  <parameter name="gui_clock_name_global7" value="false" />
+  <parameter name="gui_clock_name_global8" value="false" />
+  <parameter name="gui_clock_name_global9" value="false" />
+  <parameter name="gui_clock_name_string0" value="outclk0" />
+  <parameter name="gui_clock_name_string1" value="outclk1" />
+  <parameter name="gui_clock_name_string10" value="outclk10" />
+  <parameter name="gui_clock_name_string11" value="outclk11" />
+  <parameter name="gui_clock_name_string12" value="outclk12" />
+  <parameter name="gui_clock_name_string13" value="outclk13" />
+  <parameter name="gui_clock_name_string14" value="outclk14" />
+  <parameter name="gui_clock_name_string15" value="outclk15" />
+  <parameter name="gui_clock_name_string16" value="outclk16" />
+  <parameter name="gui_clock_name_string17" value="outclk17" />
+  <parameter name="gui_clock_name_string2" value="outclk2" />
+  <parameter name="gui_clock_name_string3" value="outclk3" />
+  <parameter name="gui_clock_name_string4" value="outclk4" />
+  <parameter name="gui_clock_name_string5" value="outclk5" />
+  <parameter name="gui_clock_name_string6" value="outclk6" />
+  <parameter name="gui_clock_name_string7" value="outclk7" />
+  <parameter name="gui_clock_name_string8" value="outclk8" />
+  <parameter name="gui_clock_name_string9" value="outclk9" />
+  <parameter name="gui_device_speed_grade" value="1" />
+  <parameter name="gui_divide_factor_c0" value="6" />
+  <parameter name="gui_divide_factor_c1" value="6" />
+  <parameter name="gui_divide_factor_c10" value="6" />
+  <parameter name="gui_divide_factor_c11" value="6" />
+  <parameter name="gui_divide_factor_c12" value="6" />
+  <parameter name="gui_divide_factor_c13" value="6" />
+  <parameter name="gui_divide_factor_c14" value="6" />
+  <parameter name="gui_divide_factor_c15" value="6" />
+  <parameter name="gui_divide_factor_c16" value="6" />
+  <parameter name="gui_divide_factor_c17" value="6" />
+  <parameter name="gui_divide_factor_c2" value="6" />
+  <parameter name="gui_divide_factor_c3" value="6" />
+  <parameter name="gui_divide_factor_c4" value="6" />
+  <parameter name="gui_divide_factor_c5" value="6" />
+  <parameter name="gui_divide_factor_c6" value="6" />
+  <parameter name="gui_divide_factor_c7" value="6" />
+  <parameter name="gui_divide_factor_c8" value="6" />
+  <parameter name="gui_divide_factor_c9" value="6" />
+  <parameter name="gui_divide_factor_n" value="1" />
+  <parameter name="gui_dps_cntr" value="C0" />
+  <parameter name="gui_dps_dir" value="Positive" />
+  <parameter name="gui_dps_num" value="1" />
+  <parameter name="gui_dsm_out_sel" value="1st_order" />
+  <parameter name="gui_duty_cycle0" value="50.0" />
+  <parameter name="gui_duty_cycle1" value="50.0" />
+  <parameter name="gui_duty_cycle10" value="50.0" />
+  <parameter name="gui_duty_cycle11" value="50.0" />
+  <parameter name="gui_duty_cycle12" value="50.0" />
+  <parameter name="gui_duty_cycle13" value="50.0" />
+  <parameter name="gui_duty_cycle14" value="50.0" />
+  <parameter name="gui_duty_cycle15" value="50.0" />
+  <parameter name="gui_duty_cycle16" value="50.0" />
+  <parameter name="gui_duty_cycle17" value="50.0" />
+  <parameter name="gui_duty_cycle2" value="50.0" />
+  <parameter name="gui_duty_cycle3" value="50.0" />
+  <parameter name="gui_duty_cycle4" value="50.0" />
+  <parameter name="gui_duty_cycle5" value="50.0" />
+  <parameter name="gui_duty_cycle6" value="50.0" />
+  <parameter name="gui_duty_cycle7" value="50.0" />
+  <parameter name="gui_duty_cycle8" value="50.0" />
+  <parameter name="gui_duty_cycle9" value="50.0" />
+  <parameter name="gui_en_adv_params" value="false" />
+  <parameter name="gui_en_dps_ports" value="false" />
+  <parameter name="gui_en_extclkout_ports" value="false" />
+  <parameter name="gui_en_lvds_ports" value="Disabled" />
+  <parameter name="gui_en_phout_ports" value="false" />
+  <parameter name="gui_en_reconf" value="true" />
+  <parameter name="gui_enable_cascade_in" value="false" />
+  <parameter name="gui_enable_cascade_out" value="false" />
+  <parameter name="gui_enable_mif_dps" value="false" />
+  <parameter name="gui_enable_output_counter_cascading" value="false" />
+  <parameter name="gui_extclkout_0_source" value="C0" />
+  <parameter name="gui_extclkout_1_source" value="C0" />
+  <parameter name="gui_feedback_clock" value="Global Clock" />
+  <parameter name="gui_fix_vco_frequency" value="false" />
+  <parameter name="gui_fixed_vco_frequency" value="600.0" />
+  <parameter name="gui_frac_multiply_factor" value="1" />
+  <parameter name="gui_fractional_cout" value="32" />
+  <parameter name="gui_mif_generate" value="false" />
+  <parameter name="gui_multiply_factor" value="6" />
+  <parameter name="gui_number_of_clocks" value="1" />
+  <parameter name="gui_operation_mode" value="direct" />
+  <parameter name="gui_output_clock_frequency0" value="250.0" />
+  <parameter name="gui_output_clock_frequency1" value="100.0" />
+  <parameter name="gui_output_clock_frequency10" value="100.0" />
+  <parameter name="gui_output_clock_frequency11" value="100.0" />
+  <parameter name="gui_output_clock_frequency12" value="100.0" />
+  <parameter name="gui_output_clock_frequency13" value="100.0" />
+  <parameter name="gui_output_clock_frequency14" value="100.0" />
+  <parameter name="gui_output_clock_frequency15" value="100.0" />
+  <parameter name="gui_output_clock_frequency16" value="100.0" />
+  <parameter name="gui_output_clock_frequency17" value="100.0" />
+  <parameter name="gui_output_clock_frequency2" value="100.0" />
+  <parameter name="gui_output_clock_frequency3" value="100.0" />
+  <parameter name="gui_output_clock_frequency4" value="100.0" />
+  <parameter name="gui_output_clock_frequency5" value="100.0" />
+  <parameter name="gui_output_clock_frequency6" value="100.0" />
+  <parameter name="gui_output_clock_frequency7" value="100.0" />
+  <parameter name="gui_output_clock_frequency8" value="100.0" />
+  <parameter name="gui_output_clock_frequency9" value="100.0" />
+  <parameter name="gui_phase_shift0" value="0.0" />
+  <parameter name="gui_phase_shift1" value="0.0" />
+  <parameter name="gui_phase_shift10" value="0.0" />
+  <parameter name="gui_phase_shift11" value="0.0" />
+  <parameter name="gui_phase_shift12" value="0.0" />
+  <parameter name="gui_phase_shift13" value="0.0" />
+  <parameter name="gui_phase_shift14" value="0.0" />
+  <parameter name="gui_phase_shift15" value="0.0" />
+  <parameter name="gui_phase_shift16" value="0.0" />
+  <parameter name="gui_phase_shift17" value="0.0" />
+  <parameter name="gui_phase_shift2" value="0.0" />
+  <parameter name="gui_phase_shift3" value="0.0" />
+  <parameter name="gui_phase_shift4" value="0.0" />
+  <parameter name="gui_phase_shift5" value="0.0" />
+  <parameter name="gui_phase_shift6" value="0.0" />
+  <parameter name="gui_phase_shift7" value="0.0" />
+  <parameter name="gui_phase_shift8" value="0.0" />
+  <parameter name="gui_phase_shift9" value="0.0" />
+  <parameter name="gui_phase_shift_deg0" value="0.0" />
+  <parameter name="gui_phase_shift_deg1" value="0.0" />
+  <parameter name="gui_phase_shift_deg10" value="0.0" />
+  <parameter name="gui_phase_shift_deg11" value="0.0" />
+  <parameter name="gui_phase_shift_deg12" value="0.0" />
+  <parameter name="gui_phase_shift_deg13" value="0.0" />
+  <parameter name="gui_phase_shift_deg14" value="0.0" />
+  <parameter name="gui_phase_shift_deg15" value="0.0" />
+  <parameter name="gui_phase_shift_deg16" value="0.0" />
+  <parameter name="gui_phase_shift_deg17" value="0.0" />
+  <parameter name="gui_phase_shift_deg2" value="0.0" />
+  <parameter name="gui_phase_shift_deg3" value="0.0" />
+  <parameter name="gui_phase_shift_deg4" value="0.0" />
+  <parameter name="gui_phase_shift_deg5" value="0.0" />
+  <parameter name="gui_phase_shift_deg6" value="0.0" />
+  <parameter name="gui_phase_shift_deg7" value="0.0" />
+  <parameter name="gui_phase_shift_deg8" value="0.0" />
+  <parameter name="gui_phase_shift_deg9" value="0.0" />
+  <parameter name="gui_phout_division" value="1" />
+  <parameter name="gui_pll_auto_reset" value="false" />
+  <parameter name="gui_pll_bandwidth_preset" value="Low" />
+  <parameter name="gui_pll_cascading_mode" value="adjpllin" />
+  <parameter name="gui_pll_mode" value="Integer-N PLL" />
+  <parameter name="gui_ps_units0" value="ps" />
+  <parameter name="gui_ps_units1" value="ps" />
+  <parameter name="gui_ps_units10" value="ps" />
+  <parameter name="gui_ps_units11" value="ps" />
+  <parameter name="gui_ps_units12" value="ps" />
+  <parameter name="gui_ps_units13" value="ps" />
+  <parameter name="gui_ps_units14" value="ps" />
+  <parameter name="gui_ps_units15" value="ps" />
+  <parameter name="gui_ps_units16" value="ps" />
+  <parameter name="gui_ps_units17" value="ps" />
+  <parameter name="gui_ps_units2" value="ps" />
+  <parameter name="gui_ps_units3" value="ps" />
+  <parameter name="gui_ps_units4" value="ps" />
+  <parameter name="gui_ps_units5" value="ps" />
+  <parameter name="gui_ps_units6" value="ps" />
+  <parameter name="gui_ps_units7" value="ps" />
+  <parameter name="gui_ps_units8" value="ps" />
+  <parameter name="gui_ps_units9" value="ps" />
+  <parameter name="gui_refclk1_frequency" value="100.0" />
+  <parameter name="gui_refclk_switch" value="false" />
+  <parameter name="gui_reference_clock_frequency" value="500.0" />
+  <parameter name="gui_switchover_delay" value="0" />
+  <parameter name="gui_switchover_mode">Automatic Switchover</parameter>
+  <parameter name="gui_use_NDFB_modes" value="false" />
+  <parameter name="gui_use_locked" value="false" />
+  <parameter name="gui_vco_frequency" value="600.0" />
+  <parameter name="system_info_device_component" value="10AX115S3F45E2SGE3" />
+  <parameter name="system_info_device_family" value="Arria 10" />
+  <parameter name="system_info_device_speed_grade" value="2" />
+  <parameter name="system_part_trait_speed_grade" value="2" />
+ </module>
+ <module
+   name="xcvr_tx_pll_reconfig"
+   kind="altera_pll_reconfig"
+   version="15.1"
+   enabled="1">
+  <parameter name="ENABLE_BYTEENABLE" value="false" />
+  <parameter name="ENABLE_MIF" value="false" />
+  <parameter name="MIF_FILE_NAME" value="" />
+  <parameter name="device_family" value="Arria 10" />
+ </module>
+ <module
+   name="xcvr_tx_ref_clk"
+   kind="altera_clock_bridge"
+   version="15.1"
+   enabled="1">
+  <parameter name="DERIVED_CLOCK_RATE" value="0" />
+  <parameter name="EXPLICIT_CLOCK_RATE" value="500000000" />
+  <parameter name="NUM_CLOCK_OUTPUTS" value="1" />
+ </module>
+ <connection
+   kind="avalon_streaming"
+   version="15.1"
+   start="axi_jesd_xcvr.if_tx_ip_avl"
+   end="xcvr_core.jesd204_tx_link" />
+ <connection
+   kind="avalon_streaming"
+   version="15.1"
+   start="xcvr_core.jesd204_rx_link"
+   end="axi_jesd_xcvr.if_rx_ip_avl" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="sys_clk.out_clk"
+   end="xcvr_rst_cntrl.clock" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="mem_clk.out_clk"
+   end="ad9680_adcfifo.if_dma_clk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="mem_clk.out_clk"
+   end="axi_ad9680_dma.if_s_axis_aclk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="sys_clk.out_clk"
+   end="xcvr_core.jesd204_rx_avs_clk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="sys_clk.out_clk"
+   end="xcvr_core.jesd204_tx_avs_clk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="mem_clk.out_clk"
+   end="axi_ad9680_dma.m_dest_axi_clock" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="mem_clk.out_clk"
+   end="axi_ad9152_dma.m_src_axi_clock" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="sys_clk.out_clk"
+   end="xcvr_tx_pll_reconfig.mgmt_clk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="sys_clk.out_clk"
+   end="xcvr_rx_pll_reconfig.mgmt_clk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="xcvr_tx_ref_clk.out_clk"
+   end="xcvr_tx_lane_pll.pll_refclk0" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="sys_clk.out_clk"
+   end="xcvr_core.reconfig_clk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="sys_clk.out_clk"
+   end="xcvr_tx_lane_pll.reconfig_clk0" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="xcvr_tx_ref_clk.out_clk"
+   end="xcvr_tx_pll.refclk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="xcvr_rx_ref_clk.out_clk"
+   end="xcvr_rx_pll.refclk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="xcvr_rx_ref_clk.out_clk"
+   end="xcvr_core.rx_pll_ref_clk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="sys_clk.out_clk"
+   end="axi_ad9680_dma.s_axi_clock" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="sys_clk.out_clk"
+   end="axi_ad9680_core.s_axi_clock" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="sys_clk.out_clk"
+   end="axi_ad9152_core.s_axi_clock" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="sys_clk.out_clk"
+   end="axi_jesd_xcvr.s_axi_clock" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="sys_clk.out_clk"
+   end="axi_ad9152_dma.s_axi_clock" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="xcvr_rx_pll.outclk0"
+   end="util_cpack_0.if_adc_clk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="xcvr_rx_pll.outclk0"
+   end="ad9680_adcfifo.if_adc_clk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="xcvr_tx_pll.outclk0"
+   end="util_upack_0.if_dac_clk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="xcvr_tx_pll.outclk0"
+   end="axi_ad9152_dma.if_fifo_rd_clk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="xcvr_rx_pll.outclk0"
+   end="axi_ad9680_core.if_rx_clk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="xcvr_rx_pll.outclk0"
+   end="axi_jesd_xcvr.if_rx_clk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="xcvr_tx_pll.outclk0"
+   end="axi_ad9152_core.if_tx_clk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="xcvr_tx_pll.outclk0"
+   end="axi_jesd_xcvr.if_tx_clk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="xcvr_rx_pll.outclk0"
+   end="xcvr_core.rxlink_clk" />
+ <connection
+   kind="clock"
+   version="15.1"
+   start="xcvr_tx_pll.outclk0"
+   end="xcvr_core.txlink_clk" />
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="xcvr_core.alldev_lane_aligned"
+   end="xcvr_core.dev_lane_aligned">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="axi_ad9680_core.fifo_ch_0"
+   end="util_cpack_0.fifo_ch_0">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="util_cpack_0.fifo_ch_1"
+   end="axi_ad9680_core.fifo_ch_1">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="util_cpack_0.if_adc_data"
+   end="ad9680_adcfifo.if_adc_wdata">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="util_cpack_0.if_adc_valid"
+   end="ad9680_adcfifo.if_adc_wr">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="util_upack_0.if_dac_valid"
+   end="axi_ad9152_dma.if_fifo_rd_en">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="ad9680_adcfifo.if_dma_wdata"
+   end="axi_ad9680_dma.if_s_axis_data">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="ad9680_adcfifo.if_dma_wr"
+   end="axi_ad9680_dma.if_s_axis_valid">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="ad9680_adcfifo.if_dma_wready"
+   end="axi_ad9680_dma.if_s_axis_ready">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="ad9680_adcfifo.if_dma_xfer_req"
+   end="axi_ad9680_dma.if_s_axis_xfer_req">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="axi_ad9152_dma.if_fifo_rd_xfer_req"
+   end="util_upack_0.if_dma_xfer_in">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="axi_ad9680_core.if_rx_data"
+   end="axi_jesd_xcvr.if_rx_data">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="axi_jesd_xcvr.if_rx_ip_sof"
+   end="xcvr_core.rx_sof">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="axi_jesd_xcvr.if_rx_ip_sync"
+   end="xcvr_core.rx_dev_sync_n">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="axi_jesd_xcvr.if_rx_ip_sysref"
+   end="xcvr_core.rx_sysref">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="axi_jesd_xcvr.if_rx_ready"
+   end="xcvr_rst_cntrl.rx_ready">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="axi_jesd_xcvr.if_tx_data"
+   end="axi_ad9152_core.if_tx_data">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="axi_jesd_xcvr.if_tx_ip_sysref"
+   end="xcvr_core.tx_sysref">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="xcvr_tx_lane_pll.pll_cal_busy"
+   end="xcvr_rst_cntrl.pll_cal_busy">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="xcvr_tx_lane_pll.pll_locked"
+   end="xcvr_rst_cntrl.pll_locked">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="xcvr_rst_cntrl.pll_powerdown"
+   end="xcvr_tx_lane_pll.pll_powerdown">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="xcvr_tx_pll_reconfig.reconfig_from_pll"
+   end="xcvr_tx_pll.reconfig_from_pll">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="xcvr_rx_pll.reconfig_from_pll"
+   end="xcvr_rx_pll_reconfig.reconfig_from_pll">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="xcvr_tx_pll.reconfig_to_pll"
+   end="xcvr_tx_pll_reconfig.reconfig_to_pll">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="xcvr_rx_pll_reconfig.reconfig_to_pll"
+   end="xcvr_rx_pll.reconfig_to_pll">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="xcvr_rst_cntrl.rx_analogreset"
+   end="xcvr_core.rx_analogreset">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="xcvr_core.rx_cal_busy"
+   end="xcvr_rst_cntrl.rx_cal_busy">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="xcvr_core.rx_digitalreset"
+   end="xcvr_rst_cntrl.rx_digitalreset">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="xcvr_rst_cntrl.rx_is_lockedtodata"
+   end="xcvr_core.rx_islockedtodata">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="xcvr_core.sync_n"
+   end="axi_jesd_xcvr.if_tx_ip_sync">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="xcvr_rst_cntrl.tx_analogreset"
+   end="xcvr_core.tx_analogreset">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="xcvr_rst_cntrl.tx_cal_busy"
+   end="xcvr_core.tx_cal_busy">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="xcvr_core.tx_dev_sync_n"
+   end="xcvr_core.mdev_sync_n">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="xcvr_core.tx_digitalreset"
+   end="xcvr_rst_cntrl.tx_digitalreset">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="conduit"
+   version="15.1"
+   start="xcvr_rst_cntrl.tx_ready"
+   end="axi_jesd_xcvr.if_tx_ready">
+  <parameter name="endPort" value="" />
+  <parameter name="endPortLSB" value="0" />
+  <parameter name="startPort" value="" />
+  <parameter name="startPortLSB" value="0" />
+  <parameter name="width" value="0" />
+ </connection>
+ <connection
+   kind="hssi_serial_clock"
+   version="15.1"
+   start="xcvr_tx_lane_pll.tx_serial_clk"
+   end="xcvr_core.tx_serial_clk0_ch0" />
+ <connection
+   kind="hssi_serial_clock"
+   version="15.1"
+   start="xcvr_tx_lane_pll.tx_serial_clk"
+   end="xcvr_core.tx_serial_clk0_ch1" />
+ <connection
+   kind="hssi_serial_clock"
+   version="15.1"
+   start="xcvr_tx_lane_pll.tx_serial_clk"
+   end="xcvr_core.tx_serial_clk0_ch2" />
+ <connection
+   kind="hssi_serial_clock"
+   version="15.1"
+   start="xcvr_tx_lane_pll.tx_serial_clk"
+   end="xcvr_core.tx_serial_clk0_ch3" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="axi_jesd_xcvr.if_rst"
+   end="xcvr_tx_pll.reset" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="axi_jesd_xcvr.if_rst"
+   end="xcvr_rx_pll.reset" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="axi_jesd_xcvr.if_rst"
+   end="xcvr_rst_cntrl.reset" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="axi_jesd_xcvr.if_rx_rstn"
+   end="xcvr_core.rxlink_rst_n" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="axi_jesd_xcvr.if_tx_rstn"
+   end="xcvr_core.txlink_rst_n" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="sys_rst.out_reset"
+   end="util_cpack_0.if_adc_rst" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="mem_rst.out_reset"
+   end="util_cpack_0.if_adc_rst" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="sys_rst.out_reset"
+   end="ad9680_adcfifo.if_adc_rst" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="mem_rst.out_reset"
+   end="ad9680_adcfifo.if_adc_rst" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="sys_rst.out_reset"
+   end="xcvr_core.jesd204_rx_avs_rst_n" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="sys_rst.out_reset"
+   end="xcvr_core.jesd204_tx_avs_rst_n" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="mem_rst.out_reset"
+   end="axi_ad9680_dma.m_dest_axi_reset" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="mem_rst.out_reset"
+   end="axi_ad9152_dma.m_src_axi_reset" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="sys_rst.out_reset"
+   end="xcvr_tx_pll_reconfig.mgmt_reset" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="sys_rst.out_reset"
+   end="xcvr_rx_pll_reconfig.mgmt_reset" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="sys_rst.out_reset"
+   end="xcvr_core.reconfig_reset" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="sys_rst.out_reset"
+   end="xcvr_tx_lane_pll.reconfig_reset0" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="sys_rst.out_reset"
+   end="xcvr_tx_pll.reset" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="sys_rst.out_reset"
+   end="xcvr_rx_pll.reset" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="sys_rst.out_reset"
+   end="xcvr_rst_cntrl.reset" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="sys_rst.out_reset"
+   end="axi_jesd_xcvr.s_axi_reset" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="sys_rst.out_reset"
+   end="axi_ad9152_core.s_axi_reset" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="sys_rst.out_reset"
+   end="axi_ad9680_core.s_axi_reset" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="sys_rst.out_reset"
+   end="axi_ad9680_dma.s_axi_reset" />
+ <connection
+   kind="reset"
+   version="15.1"
+   start="sys_rst.out_reset"
+   end="axi_ad9152_dma.s_axi_reset" />
+ <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="FIFO" />
+ <interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="false" />
+ <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="2" />
+</system>