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plddr3: sys-rst from board pushbutton

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Rejeesh Kutty 2014-12-15 12:59:25 -05:00 committed by Istvan Csomortani
parent 0cc29fe03b
commit 33a8c8a155
1 changed files with 3 additions and 0 deletions
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3
projects/fmcadc4/zc706/system_bd.tcl
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@ -4,8 +4,11 @@ source $ad_hdl_dir/projects/common/zc706/zc706_system_plddr3.tcl
p_plddr3_fifo [current_bd_instance .] axi_ad9234_fifo 256
create_bd_port -dir I -type rst sys_rst
set_property CONFIG.POLARITY {ACTIVE_HIGH} [get_bd_ports sys_rst]
create_bd_intf_port -mode Master -vlnv xilinx.com:interface:ddrx_rtl:1.0 DDR3
create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 sys_clk
connect_bd_net -net sys_rst [get_bd_ports sys_rst] [get_bd_pins axi_ad9234_fifo/sys_rst]
connect_bd_intf_net -intf_net DDR3 [get_bd_intf_ports DDR3] [get_bd_intf_pins axi_ad9234_fifo/DDR3]
connect_bd_intf_net -intf_net sys_clk [get_bd_intf_ports sys_clk] [get_bd_intf_pins axi_ad9234_fifo/sys_clk]
create_bd_addr_seg -range 0x40000000 -offset 0x80000000 [get_bd_addr_spaces axi_ad9234_fifo/axi_fifo2s/axi] \