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axi_jesd204_tx: Remove IRQ events for now 

Which events will be exposed as IRQs and at what level of granularity will
need some additional through. Remove the two existing IRQ events for now
again. This will be added back later.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
main
Lars-Peter Clausen 2017-08-04 13:41:59 +02:00
parent 533b27bb13
commit 350fbacf94
2 changed files with 1 additions and 26 deletions
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14
library/jesd204/axi_jesd204_tx/axi_jesd204_tx.v
View File

@ -130,19 +130,7 @@ wire up_cfg_is_writeable;
wire [4:0] up_irq_trigger;
sync_event #(
.NUM_OF_EVENTS(2)
) i_sync_events (
.in_clk(core_clk),
.in_event({
core_event_sysref_alignment_error,
core_event_sysref_edge
}),
.out_clk(s_axi_aclk),
.out_event(up_irq_trigger[1:0])
);
assign up_irq_trigger[4:2] = 3'b000;
assign up_irq_trigger[4:0] = 5'b00000;
up_axi #(
.AXI_ADDRESS_WIDTH (14),

13
library/jesd204/axi_jesd204_tx/axi_jesd204_tx_constr.xdc
View File

@ -81,19 +81,6 @@ set_max_delay -datapath_only \
-to [get_pins {i_up_tx/i_sync_state/out_data_reg[*]/D}] \
[get_property -min PERIOD $axi_clk]
set_false_path \
-from [get_pins {i_sync_events/out_toggle_d1_reg/C}] \
-to [get_pins {i_sync_events/i_sync_in/cdc_sync_stage1_reg[0]/D}]
set_false_path \
-from [get_pins {i_sync_events/in_toggle_d1_reg/C}] \
-to [get_pins {i_sync_events/i_sync_out/cdc_sync_stage1_reg[0]/D}]
set_max_delay -datapath_only \
-from [get_pins {i_sync_events/cdc_hold_reg[*]/C}] \
-to [get_pins {i_sync_events/out_event_reg[*]/D}] \
[get_property -min PERIOD $axi_clk]
set_false_path \
-from $core_clk \
-to [get_pins {i_up_tx/i_sync_sync/cdc_sync_stage1_reg[0]/D}]