axi_adc_decimate: Fix assignment width
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86c279c238
commit
358aa48c76
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@ -191,7 +191,7 @@ module axi_adc_decimate(
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16'h3: decim_rate_cic = 16'd500;
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16'h3: decim_rate_cic = 16'd500;
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16'h6: decim_rate_cic = 16'd5000;
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16'h6: decim_rate_cic = 16'd5000;
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16'h7: decim_rate_cic = 16'd50000;
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16'h7: decim_rate_cic = 16'd50000;
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default: decim_rate_cic = 9'd1;
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default: decim_rate_cic = 16'd1;
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endcase
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endcase
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end
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end
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