makefile: Regenerate make files

main
Istvan Csomortani 2020-10-14 11:32:43 +03:00 committed by István Csomortáni
parent b44df7a1e9
commit 37254358dd
34 changed files with 137 additions and 61 deletions

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@ -5,12 +5,30 @@
LIBRARY_NAME := axi_adrv9001
GENERIC_DEPS += adrv9001_rx.v
GENERIC_DEPS += adrv9001_rx_link.v
GENERIC_DEPS += adrv9001_tx.v
GENERIC_DEPS += adrv9001_tx_link.v
GENERIC_DEPS += ../common/ad_datafmt.v
GENERIC_DEPS += ../common/ad_dds.v
GENERIC_DEPS += ../common/ad_dds_1.v
GENERIC_DEPS += ../common/ad_dds_2.v
GENERIC_DEPS += ../common/ad_dds_cordic_pipe.v
GENERIC_DEPS += ../common/ad_dds_sine.v
GENERIC_DEPS += ../common/ad_dds_sine_cordic.v
GENERIC_DEPS += ../common/ad_pngen.v
GENERIC_DEPS += ../common/ad_pnmon.v
GENERIC_DEPS += ../common/ad_rst.v
GENERIC_DEPS += ../common/up_adc_channel.v
GENERIC_DEPS += ../common/up_adc_common.v
GENERIC_DEPS += ../common/up_axi.v
GENERIC_DEPS += ../common/up_clock_mon.v
GENERIC_DEPS += ../common/up_dac_channel.v
GENERIC_DEPS += ../common/up_dac_common.v
GENERIC_DEPS += ../common/up_delay_cntrl.v
GENERIC_DEPS += ../common/up_xfer_cntrl.v
GENERIC_DEPS += ../common/up_xfer_status.v
GENERIC_DEPS += adrv9001_aligner4.v
GENERIC_DEPS += adrv9001_aligner8.v
GENERIC_DEPS += adrv9001_pack.v
GENERIC_DEPS += adrv9001_rx_link.v
GENERIC_DEPS += adrv9001_tx_link.v
GENERIC_DEPS += axi_adrv9001.v
GENERIC_DEPS += axi_adrv9001_core.v
GENERIC_DEPS += axi_adrv9001_if.v
@ -18,27 +36,7 @@ GENERIC_DEPS += axi_adrv9001_rx.v
GENERIC_DEPS += axi_adrv9001_rx_channel.v
GENERIC_DEPS += axi_adrv9001_tx.v
GENERIC_DEPS += axi_adrv9001_tx_channel.v
GENERIC_DEPS += adrv9001_pack.v
XILINX_DEPS += ../common/ad_datafmt.v
XILINX_DEPS += ../common/ad_dds.v
XILINX_DEPS += ../common/ad_dds_1.v
XILINX_DEPS += ../common/ad_dds_2.v
XILINX_DEPS += ../common/ad_dds_cordic_pipe.v
XILINX_DEPS += ../common/ad_dds_sine.v
XILINX_DEPS += ../common/ad_dds_sine_cordic.v
XILINX_DEPS += ../common/ad_pngen.v
XILINX_DEPS += ../common/ad_pnmon.v
XILINX_DEPS += ../common/ad_rst.v
XILINX_DEPS += ../common/up_adc_channel.v
XILINX_DEPS += ../common/up_adc_common.v
XILINX_DEPS += ../common/up_axi.v
XILINX_DEPS += ../common/up_clock_mon.v
XILINX_DEPS += ../common/up_dac_channel.v
XILINX_DEPS += ../common/up_dac_common.v
XILINX_DEPS += ../common/up_delay_cntrl.v
XILINX_DEPS += ../common/up_xfer_cntrl.v
XILINX_DEPS += ../common/up_xfer_status.v
XILINX_DEPS += ../xilinx/common/ad_mmcm_drp.v
XILINX_DEPS += ../xilinx/common/ad_mul.v
XILINX_DEPS += ../xilinx/common/ad_rst_constr.xdc
@ -48,6 +46,8 @@ XILINX_DEPS += ../xilinx/common/ad_serdes_out.v
XILINX_DEPS += ../xilinx/common/up_clock_mon_constr.xdc
XILINX_DEPS += ../xilinx/common/up_xfer_cntrl_constr.xdc
XILINX_DEPS += ../xilinx/common/up_xfer_status_constr.xdc
XILINX_DEPS += adrv9001_rx.v
XILINX_DEPS += adrv9001_tx.v
XILINX_DEPS += axi_adrv9001_constr.xdc
XILINX_DEPS += axi_adrv9001_ip.tcl
@ -58,9 +58,9 @@ INTEL_DEPS += ../intel/common/up_clock_mon_constr.sdc
INTEL_DEPS += ../intel/common/up_rst_constr.sdc
INTEL_DEPS += ../intel/common/up_xfer_cntrl_constr.sdc
INTEL_DEPS += ../intel/common/up_xfer_status_constr.sdc
INTEL_DEPS += intel/adrv9001_rx.v
INTEL_DEPS += intel/adrv9001_tx.v
INTEL_DEPS += axi_adrv9001_constr.sdc
INTEL_DEPS += axi_adrv9001_hw.tcl
INTEL_DEPS += intel/adrv9001_rx.v
INTEL_DEPS += intel/adrv9001_tx.v
include ../scripts/library.mk

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@ -13,7 +13,7 @@ GENERIC_DEPS += axi_gpreg_clock_mon.v
GENERIC_DEPS += axi_gpreg_io.v
XILINX_DEPS += ../xilinx/common/ad_rst_constr.xdc
XILINX_DEPS += axi_gpreg_ip.tcl
XILINX_DEPS += axi_gpreg_constr.ttcl
XILINX_DEPS += axi_gpreg_ip.tcl
include ../scripts/library.mk

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@ -28,6 +28,7 @@ XILINX_DEPS += ../xilinx/common/up_xfer_status_constr.xdc
XILINX_DEPS += axi_hdmi_tx_constr.xdc
XILINX_DEPS += axi_hdmi_tx_ip.tcl
INTEL_DEPS += ../../library/scripts/adi_intel_device_info_enc.tcl
INTEL_DEPS += ../intel/common/ad_mul.v
INTEL_DEPS += ../intel/common/up_clock_mon_constr.sdc
INTEL_DEPS += ../intel/common/up_rst_constr.sdc

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@ -10,4 +10,6 @@ GENERIC_DEPS += axi_sysid.v
XILINX_DEPS += axi_sysid_ip.tcl
INTEL_DEPS += axi_sysid_hw.tcl
include ../scripts/library.mk

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@ -12,6 +12,8 @@ GENERIC_DEPS += jesd204_lane_latency_monitor.v
GENERIC_DEPS += jesd204_rx.v
GENERIC_DEPS += jesd204_rx_cgs.v
GENERIC_DEPS += jesd204_rx_ctrl.v
GENERIC_DEPS += jesd204_rx_frame_align_monitor.v
GENERIC_DEPS += jesd204_rx_frame_mark.v
GENERIC_DEPS += jesd204_rx_lane.v
XILINX_DEPS += error_monitor.v

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@ -5,10 +5,10 @@
LIBRARY_NAME := axi_spi_engine
GENERIC_DEPS += ../../common/ad_rst.v
GENERIC_DEPS += ../../common/up_axi.v
GENERIC_DEPS += axi_spi_engine.v
XILINX_DEPS += ../../common/ad_rst.v
XILINX_DEPS += ../../common/up_axi.v
XILINX_DEPS += ../../xilinx/common/ad_rst_constr.xdc
XILINX_DEPS += axi_spi_engine_constr.ttcl
XILINX_DEPS += axi_spi_engine_ip.tcl
@ -21,4 +21,15 @@ XILINX_DEPS += ../../spi_engine/interfaces/spi_engine_offload_ctrl_rtl.xml
XILINX_LIB_DEPS += util_axis_fifo
XILINX_LIB_DEPS += util_cdc
INTEL_DEPS += ../../common/ad_mem.v
INTEL_DEPS += ../../intel/common/up_rst_constr.sdc
INTEL_DEPS += ../../util_axis_fifo/address_gray.v
INTEL_DEPS += ../../util_axis_fifo/address_gray_pipelined.v
INTEL_DEPS += ../../util_axis_fifo/address_sync.v
INTEL_DEPS += ../../util_axis_fifo/util_axis_fifo.v
INTEL_DEPS += ../../util_cdc/sync_bits.v
INTEL_DEPS += ../../util_cdc/sync_gray.v
INTEL_DEPS += axi_spi_engine_constr.sdc
INTEL_DEPS += axi_spi_engine_hw.tcl
include ../../scripts/library.mk

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@ -14,4 +14,6 @@ XILINX_DEPS += ../../spi_engine/interfaces/spi_engine_ctrl_rtl.xml
XILINX_DEPS += ../../spi_engine/interfaces/spi_master.xml
XILINX_DEPS += ../../spi_engine/interfaces/spi_master_rtl.xml
INTEL_DEPS += spi_engine_execution_hw.tcl
include ../../scripts/library.mk

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@ -12,4 +12,6 @@ XILINX_DEPS += spi_engine_interconnect_ip.tcl
XILINX_DEPS += ../../spi_engine/interfaces/spi_engine_ctrl.xml
XILINX_DEPS += ../../spi_engine/interfaces/spi_engine_ctrl_rtl.xml
INTEL_DEPS += spi_engine_interconnect_hw.tcl
include ../../scripts/library.mk

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@ -7,6 +7,7 @@ LIBRARY_NAME := spi_engine_offload
GENERIC_DEPS += spi_engine_offload.v
XILINX_DEPS += spi_engine_offload_constr.ttcl
XILINX_DEPS += spi_engine_offload_ip.tcl
XILINX_DEPS += ../../spi_engine/interfaces/spi_engine_ctrl.xml
@ -16,4 +17,7 @@ XILINX_DEPS += ../../spi_engine/interfaces/spi_engine_offload_ctrl_rtl.xml
XILINX_LIB_DEPS += util_cdc
INTEL_DEPS += ../../util_cdc/sync_bits.v
INTEL_DEPS += spi_engine_offload_hw.tcl
include ../../scripts/library.mk

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@ -9,4 +9,6 @@ GENERIC_DEPS += sysid_rom.v
XILINX_DEPS += sysid_rom_ip.tcl
INTEL_DEPS += sysid_rom_hw.tcl
include ../scripts/library.mk

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@ -1,5 +1,5 @@
####################################################################################
## Copyright 2020(c) Analog Devices, Inc.
## Copyright 2018(c) Analog Devices, Inc.
## Auto-generated, do not modify!
####################################################################################
@ -9,6 +9,7 @@ M_DEPS += ../common/ad77681evb_bd.tcl
M_DEPS += ../../common/zed/zed_system_constr.xdc
M_DEPS += ../../common/zed/zed_system_bd.tcl
M_DEPS += ../../../library/xilinx/common/ad_iobuf.v
M_DEPS += ../../../library/xilinx/common/ad_data_clk.v
LIB_DEPS += axi_clkgen
LIB_DEPS += axi_dmac

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@ -8,14 +8,17 @@ PROJECT_NAME := ad_fmclidar1_ebz_a10soc
M_DEPS += ../common/util_tia_chsel.v
M_DEPS += ../common/util_axis_syncgen.v
M_DEPS += ../common/ad_fmclidar1_ebz_qsys.tcl
M_DEPS += ../../scripts/adi_pd_intel.tcl
M_DEPS += ../../common/a10soc/a10soc_system_qsys.tcl
M_DEPS += ../../common/a10soc/a10soc_system_assign.tcl
M_DEPS += ../../../library/util_cdc/sync_bits.v
LIB_DEPS += axi_dmac
LIB_DEPS += axi_laser_driver
LIB_DEPS += axi_sysid
LIB_DEPS += intel/adi_jesd204
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc
LIB_DEPS += sysid_rom
LIB_DEPS += util_pack/util_cpack2
include ../../scripts/project-intel.mk

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@ -5,6 +5,7 @@
PROJECT_NAME := adrv9001_zed
M_DEPS += cmos_constr.xdc
M_DEPS += ../common/adrv9001_bd.tcl
M_DEPS += ../../common/zed/zed_system_constr.xdc
M_DEPS += ../../common/zed/zed_system_bd.tcl
@ -21,9 +22,5 @@ LIB_DEPS += sysid_rom
LIB_DEPS += util_i2c_mixer
LIB_DEPS += util_pack/util_cpack2
LIB_DEPS += util_pack/util_upack2
LIB_DEPS += util_rfifo
LIB_DEPS += util_tdd_sync
LIB_DEPS += util_wfifo
LIB_DEPS += xilinx/util_clkdiv
include ../../scripts/project-xilinx.mk

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@ -6,13 +6,17 @@
PROJECT_NAME := adrv9009_a10gx
M_DEPS += ../common/adrv9009_qsys.tcl
M_DEPS += ../../scripts/adi_pd_intel.tcl
M_DEPS += ../../common/intel/dacfifo_qsys.tcl
M_DEPS += ../../common/a10gx/a10gx_system_qsys.tcl
M_DEPS += ../../common/a10gx/a10gx_system_assign.tcl
LIB_DEPS += axi_adrv9009
LIB_DEPS += axi_dmac
LIB_DEPS += axi_sysid
LIB_DEPS += intel/adi_jesd204
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
LIB_DEPS += sysid_rom
LIB_DEPS += util_pack/util_cpack2
LIB_DEPS += util_pack/util_upack2

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@ -6,14 +6,18 @@
PROJECT_NAME := adrv9009_a10soc
M_DEPS += ../common/adrv9009_qsys.tcl
M_DEPS += ../../scripts/adi_pd_intel.tcl
M_DEPS += ../../common/a10soc/a10soc_system_qsys.tcl
M_DEPS += ../../common/a10soc/a10soc_system_assign.tcl
M_DEPS += ../../common/a10soc/a10soc_plddr4_dacfifo_qsys.tcl
M_DEPS += ../../common/a10soc/a10soc_plddr4_assign.tcl
LIB_DEPS += axi_adrv9009
LIB_DEPS += axi_dmac
LIB_DEPS += axi_sysid
LIB_DEPS += intel/adi_jesd204
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
LIB_DEPS += sysid_rom
LIB_DEPS += util_pack/util_cpack2
LIB_DEPS += util_pack/util_upack2

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@ -5,14 +5,15 @@
PROJECT_NAME := adrv9009_s10soc
# M_DEPS += ../common/adrv9009_qsys.tcl
#M_DEPS += ../../common/altera/dacfifo_qsys.tcl
M_DEPS += ../common/adrv9009_qsys.tcl
M_DEPS += ../../common/s10soc/s10soc_system_qsys.tcl
M_DEPS += ../../common/s10soc/s10soc_system_assign.tcl
M_DEPS += ../../common/intel/dacfifo_qsys.tcl
LIB_DEPS += intel/adi_jesd204
LIB_DEPS += axi_adrv9009
LIB_DEPS += axi_dmac
LIB_DEPS += intel/adi_jesd204
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
LIB_DEPS += util_pack/util_cpack2
LIB_DEPS += util_pack/util_upack2

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@ -6,13 +6,17 @@
PROJECT_NAME := adrv9371x_a10gx
M_DEPS += ../common/adrv9371x_qsys.tcl
M_DEPS += ../../scripts/adi_pd_intel.tcl
M_DEPS += ../../common/intel/dacfifo_qsys.tcl
M_DEPS += ../../common/a10gx/a10gx_system_qsys.tcl
M_DEPS += ../../common/a10gx/a10gx_system_assign.tcl
LIB_DEPS += axi_ad9371
LIB_DEPS += axi_dmac
LIB_DEPS += axi_sysid
LIB_DEPS += intel/adi_jesd204
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
LIB_DEPS += sysid_rom
LIB_DEPS += util_pack/util_cpack2
LIB_DEPS += util_pack/util_upack2

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@ -6,14 +6,18 @@
PROJECT_NAME := adrv9371x_a10soc
M_DEPS += ../common/adrv9371x_qsys.tcl
M_DEPS += ../../scripts/adi_pd_intel.tcl
M_DEPS += ../../common/a10soc/a10soc_system_qsys.tcl
M_DEPS += ../../common/a10soc/a10soc_system_assign.tcl
M_DEPS += ../../common/a10soc/a10soc_plddr4_dacfifo_qsys.tcl
M_DEPS += ../../common/a10soc/a10soc_plddr4_assign.tcl
LIB_DEPS += axi_ad9371
LIB_DEPS += axi_dmac
LIB_DEPS += axi_sysid
LIB_DEPS += intel/adi_jesd204
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
LIB_DEPS += sysid_rom
LIB_DEPS += util_pack/util_cpack2
LIB_DEPS += util_pack/util_upack2

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@ -0,0 +1,6 @@
####################################################################################
## Copyright 2018(c) Analog Devices, Inc.
## Auto-generated, do not modify!
####################################################################################
include ../scripts/project-toplevel.mk

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@ -1,12 +1,12 @@
####################################################################################
## Copyright 2019 - 2020(c) Analog Devices, Inc.
## Copyright 2018(c) Analog Devices, Inc.
## Auto-generated, do not modify!
####################################################################################
PROJECT_NAME := adv7513_de10nano
M_DEPS += ../../common/de10nano/de10nano_system_assign.tcl
M_DEPS += ../../common/de10nano/de10nano_system_qsys.tcl
M_DEPS += ../../common/de10nano/de10nano_system_assign.tcl
LIB_DEPS += axi_dmac
LIB_DEPS += axi_hdmi_tx

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@ -6,11 +6,14 @@
PROJECT_NAME := arradio_c5soc
M_DEPS += ../common/arradio_qsys.tcl
M_DEPS += ../../scripts/adi_pd_intel.tcl
M_DEPS += ../../common/c5soc/c5soc_system_qsys.tcl
M_DEPS += ../../common/c5soc/c5soc_system_assign.tcl
LIB_DEPS += axi_ad9361
LIB_DEPS += axi_dmac
LIB_DEPS += axi_sysid
LIB_DEPS += sysid_rom
LIB_DEPS += util_pack/util_cpack2
LIB_DEPS += util_pack/util_upack2
LIB_DEPS += util_rfifo

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@ -6,8 +6,11 @@
PROJECT_NAME := cn0506_mii_a10soc
M_DEPS += ../common/cn0506_qsys.tcl
M_DEPS += ../../scripts/adi_pd_intel.tcl
M_DEPS += ../../common/a10soc/a10soc_system_qsys.tcl
M_DEPS += ../../common/a10soc/a10soc_system_assign.tcl
LIB_DEPS += axi_sysid
LIB_DEPS += sysid_rom
include ../../scripts/project-intel.mk

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@ -6,8 +6,11 @@
PROJECT_NAME := cn0506_rgmii_a10soc
M_DEPS += ../common/cn0506_qsys.tcl
M_DEPS += ../../scripts/adi_pd_intel.tcl
M_DEPS += ../../common/a10soc/a10soc_system_qsys.tcl
M_DEPS += ../../common/a10soc/a10soc_system_assign.tcl
LIB_DEPS += axi_sysid
LIB_DEPS += sysid_rom
include ../../scripts/project-intel.mk

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@ -1,5 +1,5 @@
####################################################################################
## Copyright 2019-2020(c) Analog Devices, Inc.
## Copyright 2018(c) Analog Devices, Inc.
## Auto-generated, do not modify!
####################################################################################

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@ -1,5 +1,5 @@
####################################################################################
## Copyright 2019-2020(c) Analog Devices, Inc.
## Copyright 2018(c) Analog Devices, Inc.
## Auto-generated, do not modify!
####################################################################################
@ -11,8 +11,8 @@ M_DEPS += ../../common/coraz7s/coraz7s_system_constr.xdc
M_DEPS += ../../common/coraz7s/coraz7s_system_bd.tcl
M_DEPS += ../../../library/xilinx/common/ad_iobuf.v
LIB_DEPS += axi_dmac
LIB_DEPS += axi_clkgen
LIB_DEPS += axi_dmac
LIB_DEPS += axi_sysid
LIB_DEPS += spi_engine/axi_spi_engine
LIB_DEPS += spi_engine/spi_engine_execution

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@ -1,14 +1,19 @@
####################################################################################
## Copyright 2019 - 2020(c) Analog Devices, Inc.
## Copyright 2018(c) Analog Devices, Inc.
## Auto-generated, do not modify!
####################################################################################
PROJECT_NAME := cn0540_de10nano
M_DEPS += ../common/cn0540_qsys.tcl
M_DEPS += ../../common/de10nano/de10nano_system_assign.tcl
M_DEPS += ../../common/de10nano/de10nano_system_qsys.tcl
M_DEPS += ../../common/de10nano/de10nano_system_assign.tcl
LIB_DEPS += axi_dmac
LIB_DEPS += axi_hdmi_tx
LIB_DEPS += spi_engine/axi_spi_engine
LIB_DEPS += spi_engine/spi_engine_execution
LIB_DEPS += spi_engine/spi_engine_interconnect
LIB_DEPS += spi_engine/spi_engine_offload
include ../../scripts/project-intel.mk

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@ -7,14 +7,17 @@ PROJECT_NAME := dac_fmc_ebz_a10soc
M_DEPS += ../common/dac_fmc_ebz_qsys.tcl
M_DEPS += ../common/config.tcl
M_DEPS += ../../scripts/adi_pd_intel.tcl
M_DEPS += ../../common/a10soc/a10soc_system_qsys.tcl
M_DEPS += ../../common/a10soc/a10soc_system_assign.tcl
M_DEPS += ../../common/a10soc/a10soc_plddr4_dacfifo_qsys.tcl
M_DEPS += ../../common/a10soc/a10soc_plddr4_assign.tcl
LIB_DEPS += axi_dmac
LIB_DEPS += axi_sysid
LIB_DEPS += intel/adi_jesd204
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
LIB_DEPS += sysid_rom
LIB_DEPS += util_pack/util_upack2
include ../../scripts/project-intel.mk

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@ -7,14 +7,17 @@ PROJECT_NAME := daq2_a10gx
M_DEPS += ../common/daq2_spi.v
M_DEPS += ../common/daq2_qsys.tcl
M_DEPS += ../../scripts/adi_pd_intel.tcl
M_DEPS += ../../common/intel/dacfifo_qsys.tcl
M_DEPS += ../../common/a10gx/a10gx_system_qsys.tcl
M_DEPS += ../../common/a10gx/a10gx_system_assign.tcl
LIB_DEPS += axi_ad9144
LIB_DEPS += axi_ad9680
LIB_DEPS += axi_dmac
LIB_DEPS += axi_sysid
LIB_DEPS += intel/adi_jesd204
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
LIB_DEPS += sysid_rom
LIB_DEPS += util_adcfifo
LIB_DEPS += util_pack/util_cpack2
LIB_DEPS += util_pack/util_upack2

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@ -7,15 +7,18 @@ PROJECT_NAME := daq2_a10soc
M_DEPS += ../common/daq2_spi.v
M_DEPS += ../common/daq2_qsys.tcl
M_DEPS += ../../scripts/adi_pd_intel.tcl
M_DEPS += ../../common/a10soc/a10soc_system_qsys.tcl
M_DEPS += ../../common/a10soc/a10soc_system_assign.tcl
M_DEPS += ../../common/a10soc/a10soc_plddr4_dacfifo_qsys.tcl
M_DEPS += ../../common/a10soc/a10soc_plddr4_assign.tcl
LIB_DEPS += axi_ad9144
LIB_DEPS += axi_ad9680
LIB_DEPS += axi_dmac
LIB_DEPS += axi_sysid
LIB_DEPS += intel/adi_jesd204
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
LIB_DEPS += sysid_rom
LIB_DEPS += util_adcfifo
LIB_DEPS += util_pack/util_cpack2
LIB_DEPS += util_pack/util_upack2

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@ -15,10 +15,10 @@ M_DEPS += ../../common/kc705/kc705_system_bd.tcl
M_DEPS += ../../../library/xilinx/common/ad_iobuf.v
M_DEPS += ../../../library/jesd204/scripts/jesd204.tcl
LIB_DEPS += axi_ad9144
LIB_DEPS += axi_ad9680
LIB_DEPS += axi_dmac
LIB_DEPS += axi_sysid
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
LIB_DEPS += jesd204/axi_jesd204_rx
LIB_DEPS += jesd204/axi_jesd204_tx
LIB_DEPS += jesd204/jesd204_rx

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@ -14,10 +14,10 @@ M_DEPS += ../../common/kcu105/kcu105_system_bd.tcl
M_DEPS += ../../../library/xilinx/common/ad_iobuf.v
M_DEPS += ../../../library/jesd204/scripts/jesd204.tcl
LIB_DEPS += axi_ad9144
LIB_DEPS += axi_ad9680
LIB_DEPS += axi_dmac
LIB_DEPS += axi_sysid
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
LIB_DEPS += jesd204/axi_jesd204_rx
LIB_DEPS += jesd204/axi_jesd204_tx
LIB_DEPS += jesd204/jesd204_rx

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@ -15,13 +15,13 @@ M_DEPS += ../../common/xilinx/dacfifo_bd.tcl
M_DEPS += ../../../library/xilinx/common/ad_iobuf.v
M_DEPS += ../../../library/jesd204/scripts/jesd204.tcl
LIB_DEPS += axi_ad9144
LIB_DEPS += axi_ad9680
LIB_DEPS += axi_clkgen
LIB_DEPS += axi_dmac
LIB_DEPS += axi_hdmi_tx
LIB_DEPS += axi_spdif_tx
LIB_DEPS += axi_sysid
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
LIB_DEPS += jesd204/axi_jesd204_rx
LIB_DEPS += jesd204/axi_jesd204_tx
LIB_DEPS += jesd204/jesd204_rx

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@ -14,10 +14,10 @@ M_DEPS += ../../common/xilinx/adcfifo_bd.tcl
M_DEPS += ../../../library/xilinx/common/ad_iobuf.v
M_DEPS += ../../../library/jesd204/scripts/jesd204.tcl
LIB_DEPS += axi_ad9144
LIB_DEPS += axi_ad9680
LIB_DEPS += axi_dmac
LIB_DEPS += axi_sysid
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
LIB_DEPS += jesd204/axi_jesd204_rx
LIB_DEPS += jesd204/axi_jesd204_tx
LIB_DEPS += jesd204/jesd204_rx

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@ -7,6 +7,7 @@ PROJECT_NAME := daq3_a10gx
M_DEPS += ../common/daq3_spi.v
M_DEPS += ../common/daq3_qsys.tcl
M_DEPS += ../../scripts/adi_pd_intel.tcl
M_DEPS += ../../common/intel/dacfifo_qsys.tcl
M_DEPS += ../../common/a10gx/a10gx_system_qsys.tcl
M_DEPS += ../../common/a10gx/a10gx_system_assign.tcl
@ -14,7 +15,9 @@ M_DEPS += ../../common/a10gx/a10gx_system_assign.tcl
LIB_DEPS += axi_ad9152
LIB_DEPS += axi_ad9680
LIB_DEPS += axi_dmac
LIB_DEPS += axi_sysid
LIB_DEPS += intel/adi_jesd204
LIB_DEPS += sysid_rom
LIB_DEPS += util_adcfifo
LIB_DEPS += util_pack/util_cpack2
LIB_DEPS += util_pack/util_upack2