i3c_controller: Naming convention, corner case fix (#1314)

Rename "idle bus" to "bus available" per specification:
* Tune it to require < 1us.

Rename "IBI auto" to "IBI listen":
* Clarify that the controller is listening for IBI's:
* Explain that this field should be set.
* Fix for known IBI's DA with IBI disabled.

Signed-off-by: Jorge Marques <jorge.marques@analog.com>
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Jorge Marques 2024-04-30 15:14:47 +00:00 committed by GitHub
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8 changed files with 45 additions and 33 deletions

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@ -22,6 +22,10 @@ Files
- Verilog source for the peripheral. - Verilog source for the peripheral.
* - :git-hdl:`master:library/i3c_controller/i3c_controller_core/i3c_controller_core.tcl` * - :git-hdl:`master:library/i3c_controller/i3c_controller_core/i3c_controller_core.tcl`
- TCL script to generate the Vivado IP-integrator project for the peripheral. - TCL script to generate the Vivado IP-integrator project for the peripheral.
* - :git-hdl:`master:library/i3c_controller/i3c_controller_core/i3c_controller_core_ip.tcl`
- TCL script to generate the Vivado IP-integrator project for the peripheral.
* - :git-hdl:`master:library/i3c_controller/i3c_controller_core/i3c_controller_core_hw.tcl`
- TCL script to generate the Quartus IP-integrator project for the peripheral.
Configuration Parameters Configuration Parameters
@ -38,7 +42,3 @@ Signal and Interface Pins
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
.. hdl-interfaces:: .. hdl-interfaces::
Theory of Operation
--------------------------------------------------------------------------------

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@ -25,8 +25,10 @@ Files
- Description - Description
* - :git-hdl:`master:library/i3c_controller/i3c_controller_host_interface/i3c_controller_host_interface.v` * - :git-hdl:`master:library/i3c_controller/i3c_controller_host_interface/i3c_controller_host_interface.v`
- Verilog source for the peripheral. - Verilog source for the peripheral.
* - :git-hdl:`master:library/i3c_controller/i3c_controller_host_interface/i3c_controller_host_interface.tcl` * - :git-hdl:`master:library/i3c_controller/i3c_controller_host_interface/i3c_controller_host_interface_ip.tcl`
- TCL script to generate the Vivado IP-integrator project for the peripheral. - TCL script to generate the Vivado IP-integrator project for the peripheral.
* - :git-hdl:`master:library/i3c_controller/i3c_controller_host_interface/i3c_controller_host_interface_hw.tcl`
- TCL script to generate the Quartus IP-integrator project for the peripheral.
Configuration Parameters Configuration Parameters
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
@ -65,6 +67,8 @@ Signal and Interface Pins
- Interface give the :ref:`i3c_controller core` access to some register map - Interface give the :ref:`i3c_controller core` access to some register map
addresses. addresses.
.. _i3c_controller regmap:
Register Map Register Map
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------

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@ -66,7 +66,7 @@ the following subsections.
.. note:: .. note::
CCC always broadcast header after an idle bus, therefore "Bcast. header" CCC always broadcast header after a bus available, therefore "Bcast. header"
is ignored for CCC\s. is ignored for CCC\s.
.. _i3c_controller ccc: .. _i3c_controller ccc:
@ -231,8 +231,11 @@ On software, check bit:
In-Band Interrupts In-Band Interrupts
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
IBI\s are accepted autonomously during bus idle if the feature is enabled. IBI's are resolved autonomously during bus available per specification,
The accepted IBI\s fill the IBI FIFO and generate an interrupt to the if they are accepted or rejected depends if the feature itself is enabled;
see I3C Controller's :ref:`i3c_controller regmap` register ``IBI_CONFIG`` for
more info.
The accepted IBI's fill the IBI FIFO and generate an interrupt to the
PS. PS.
The structure of the received IBI is: The structure of the received IBI is:

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@ -466,7 +466,7 @@ OPS_STATUS_NOP
RO RO
This bit is set to 1 when the bus is not executing any procedure. This bit is set to 1 when the bus is not executing any procedure.
It is not idle bus condition since it set right after the Stop. It is not idle bus condition since it set right after the Stop.
ENDIELD ENDFIELD
FIELD FIELD
[6:5] 0x0 [6:5] 0x0
@ -505,12 +505,12 @@ ENDREG
FIELD FIELD
[1] 0x0 [1] 0x0
IBI_CONFIG_AUTO IBI_CONFIG_LISTEN
WO WO
Set this bit to listen for IBI requests (when a peripheral pulls SDA Low during quiet times). Set this bit to listen for IBI requests (when a peripheral pulls SDA Low during bus available).
After the IBI request is resolved, the controller returns to idle, since it is was not doing After the IBI request is resolved, the controller returns to idle, since it is was not doing
a cmd transfer. a cmd transfer.
IBI_CONFIG_ENABLE must be set 1. This should be set to 1 during normal operation, even if IBI_CONFIG_ENABLE is disabled.
ENDFIELD ENDFIELD
FIELD FIELD
@ -521,8 +521,10 @@ Set this bit to accept (ACK) IBI requests.
If disabled, the controller will NACK IBI requests. If disabled, the controller will NACK IBI requests.
If enabled, the controller will ACK the IBI request and receive the MDB. If enabled, the controller will ACK the IBI request and receive the MDB.
In both cases, the controller will proceed with the cmd transfer after resolving the IBI In both cases, the controller will proceed with the cmd transfer after resolving the IBI
request. request, if any.
Accepted IBIs fill the IBI_FIFO and generate an interruption in the PS. Accepted IBIs fill the IBI_FIFO and generate an interrupt to the PS.
IBI_CONFIG_LISTEN set to 1 and IBI_CONFIG_ENABLE set to 0 ensures that incoming IBIs are
rejected as they come.
ENDFIELD ENDFIELD
############################################################################################ ############################################################################################
@ -552,9 +554,9 @@ ENDFIELD
FIELD FIELD
[3] 0x0 [3] 0x0
DEV_CHAR_HAS_IBI_MDB DEV_CHAR_HAS_IBI_PAYLOAD
RW RW
Indicates if the device sends an MDB during the IBI. Indicates if the device sends at least MDB during the IBI.
0 does not, 1 does. 0 does not, 1 does.
ENDFIELD ENDFIELD

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@ -62,7 +62,7 @@ module i3c_controller_bit_mod #(
// Mux to alternative logic to support I²C devices. // Mux to alternative logic to support I²C devices.
input i2c_mode, input i2c_mode,
// Indicates that the bus is not transferring, // Indicates that the bus is not transferring,
// is *not* bus idle condition because does not wait 200us after P. // is *not* bus available condition because does not wait 1s after P.
output nop, output nop,
// 0: 1.56MHz // 0: 1.56MHz
// 1: 3.12MHz // 1: 3.12MHz

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@ -110,7 +110,8 @@ module i3c_controller_core #(
wire i2c_mode; wire i2c_mode;
i3c_controller_framing #( i3c_controller_framing #(
.MAX_DEVS(MAX_DEVS) .MAX_DEVS(MAX_DEVS),
.CLK_MOD(CLK_MOD)
) i_i3c_controller_framing ( ) i_i3c_controller_framing (
.reset_n(reset_n), .reset_n(reset_n),
.clk(clk), .clk(clk),

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@ -64,7 +64,8 @@
`include "i3c_controller_word.vh" `include "i3c_controller_word.vh"
module i3c_controller_framing #( module i3c_controller_framing #(
parameter MAX_DEVS = 16 parameter MAX_DEVS = 16,
parameter CLK_MOD = 0
) ( ) (
input clk, input clk,
input reset_n, input reset_n,
@ -114,7 +115,9 @@ module i3c_controller_framing #(
input [3:0] rmap_dev_char_data input [3:0] rmap_dev_char_data
); );
localparam IDLE_BUS_WIDTH = 7; // Defines the bus available condition width (> 1us for target)
// Setting around 0.64us for the controller.
localparam BUS_AVAIL = CLK_MOD ? 4 : 5;
localparam [2:0] SM_SETUP = 0; localparam [2:0] SM_SETUP = 0;
localparam [2:0] SM_VALIDATE = 1; localparam [2:0] SM_VALIDATE = 1;
@ -126,7 +129,7 @@ module i3c_controller_framing #(
localparam [6:0] CCC_ENTDAA = 'h07; localparam [6:0] CCC_ENTDAA = 'h07;
reg [`CMDW_HEADER_WIDTH:0] st; reg [`CMDW_HEADER_WIDTH:0] st;
reg [IDLE_BUS_WIDTH:0] idle_bus_reg; reg [BUS_AVAIL:0] bus_avail_reg;
reg cmdp_ccc_reg; reg cmdp_ccc_reg;
reg cmdp_ccc_bcast_reg; reg cmdp_ccc_bcast_reg;
reg [6:0] cmdp_ccc_id_reg; reg [6:0] cmdp_ccc_id_reg;
@ -147,9 +150,9 @@ module i3c_controller_framing #(
reg error_nack_resp ; reg error_nack_resp ;
reg [2:0] sm; reg [2:0] sm;
wire idle_bus; wire bus_avail;
wire ibi_enable; wire ibi_enable;
wire ibi_auto; wire ibi_listen;
wire cmdp_rnw; wire cmdp_rnw;
wire [6:0] cmdp_da; wire [6:0] cmdp_da;
wire [11:0] cmdp_buffer_len; wire [11:0] cmdp_buffer_len;
@ -202,7 +205,7 @@ module i3c_controller_framing #(
// Direct is CCC_BCAST 1'b1 // Direct is CCC_BCAST 1'b1
sm <= cmdp_ccc & ~cmdp_ccc_bcast ? SM_TRANSFER : SM_VALIDATE; sm <= cmdp_ccc & ~cmdp_ccc_bcast ? SM_TRANSFER : SM_VALIDATE;
ctrl_validate <= 1'b0; ctrl_validate <= 1'b0;
end else if (ibi_auto & ibi_enable & rx === 1'b0 & idle_bus) begin end else if (ibi_listen & rx === 1'b0 & bus_avail) begin
st <= `CMDW_BCAST_7E_W0; st <= `CMDW_BCAST_7E_W0;
sm <= SM_TRANSFER; sm <= SM_TRANSFER;
ibi_requested_auto <= 1'b1; ibi_requested_auto <= 1'b1;
@ -362,7 +365,7 @@ module i3c_controller_framing #(
// At the word module, was ACKed if IBI is enabled and DA is known, if not, NACKed. // At the word module, was ACKed if IBI is enabled and DA is known, if not, NACKed.
if (ibi_requested) begin if (ibi_requested) begin
// Receive MSB if IBI is enabled, dev is known and BCR[2] is 1'b1. // Receive MSB if IBI is enabled, dev is known and BCR[2] is 1'b1.
if (dev_is_attached & ibi_enable & ibi_bcr_2) begin if (ibi_enable & dev_is_attached & ibi_bcr_2) begin
st <= `CMDW_IBI_MDB; st <= `CMDW_IBI_MDB;
end else begin end else begin
st <= cmdp_valid_reg ? `CMDW_START : `CMDW_STOP_OD; st <= cmdp_valid_reg ? `CMDW_START : `CMDW_STOP_OD;
@ -386,16 +389,15 @@ module i3c_controller_framing #(
error_nack_bcast <= cmdw_nack_bcast; error_nack_bcast <= cmdw_nack_bcast;
end end
// Idle bus condition // Bus available condition
always @(posedge clk) begin always @(posedge clk) begin
if (!reset_n || !nop) begin if (!reset_n || !nop) begin
idle_bus_reg <= 0; bus_avail_reg <= 0;
end else if (!idle_bus) begin end else if (!bus_avail) begin
idle_bus_reg <= idle_bus_reg + 1; bus_avail_reg <= bus_avail_reg + 1;
end end
end end
assign idle_bus = &idle_bus_reg; assign bus_avail = &bus_avail_reg;
// Device characteristics look-up. // Device characteristics look-up.
@ -412,7 +414,7 @@ module i3c_controller_framing #(
assign cmdw_valid = sm == SM_TRANSFER; assign cmdw_valid = sm == SM_TRANSFER;
assign ibi_enable = rmap_ibi_config[0]; assign ibi_enable = rmap_ibi_config[0];
assign ibi_auto = rmap_ibi_config[1]; assign ibi_listen = rmap_ibi_config[1];
assign cmdp_rnw = cmdp[0]; assign cmdp_rnw = cmdp[0];
assign cmdp_da = cmdp[7:1]; assign cmdp_da = cmdp[7:1];

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@ -376,7 +376,7 @@ module i3c_controller_word (
ibi_requested <= i < 6 & rx === 1'b0 ? 1'b1 : ibi_requested; ibi_requested <= i < 6 & rx === 1'b0 ? 1'b1 : ibi_requested;
if (i[2:0] == 7) begin if (i[2:0] == 7) begin
arbitration_valid <= 1'b1; arbitration_valid <= 1'b1;
if (ibi_dev_is_attached & ibi_requested & ~ibi_bcr_2) begin if (ibi_enable & ibi_requested & ibi_dev_is_attached & ~ibi_bcr_2) begin
ibi_tick <= 1'b1; ibi_tick <= 1'b1;
end end
end end