i3c_controller: Naming convention, corner case fix (#1314)
Rename "idle bus" to "bus available" per specification: * Tune it to require < 1us. Rename "IBI auto" to "IBI listen": * Clarify that the controller is listening for IBI's: * Explain that this field should be set. * Fix for known IBI's DA with IBI disabled. Signed-off-by: Jorge Marques <jorge.marques@analog.com>main
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@ -22,6 +22,10 @@ Files
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- Verilog source for the peripheral.
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* - :git-hdl:`master:library/i3c_controller/i3c_controller_core/i3c_controller_core.tcl`
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- TCL script to generate the Vivado IP-integrator project for the peripheral.
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* - :git-hdl:`master:library/i3c_controller/i3c_controller_core/i3c_controller_core_ip.tcl`
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- TCL script to generate the Vivado IP-integrator project for the peripheral.
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* - :git-hdl:`master:library/i3c_controller/i3c_controller_core/i3c_controller_core_hw.tcl`
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- TCL script to generate the Quartus IP-integrator project for the peripheral.
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Configuration Parameters
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@ -38,7 +42,3 @@ Signal and Interface Pins
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--------------------------------------------------------------------------------
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.. hdl-interfaces::
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Theory of Operation
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--------------------------------------------------------------------------------
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@ -25,8 +25,10 @@ Files
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- Description
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* - :git-hdl:`master:library/i3c_controller/i3c_controller_host_interface/i3c_controller_host_interface.v`
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- Verilog source for the peripheral.
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* - :git-hdl:`master:library/i3c_controller/i3c_controller_host_interface/i3c_controller_host_interface.tcl`
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* - :git-hdl:`master:library/i3c_controller/i3c_controller_host_interface/i3c_controller_host_interface_ip.tcl`
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- TCL script to generate the Vivado IP-integrator project for the peripheral.
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* - :git-hdl:`master:library/i3c_controller/i3c_controller_host_interface/i3c_controller_host_interface_hw.tcl`
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- TCL script to generate the Quartus IP-integrator project for the peripheral.
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Configuration Parameters
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--------------------------------------------------------------------------------
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@ -65,6 +67,8 @@ Signal and Interface Pins
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- Interface give the :ref:`i3c_controller core` access to some register map
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addresses.
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.. _i3c_controller regmap:
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Register Map
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--------------------------------------------------------------------------------
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@ -66,7 +66,7 @@ the following subsections.
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.. note::
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CCC always broadcast header after an idle bus, therefore "Bcast. header"
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CCC always broadcast header after a bus available, therefore "Bcast. header"
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is ignored for CCC\s.
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.. _i3c_controller ccc:
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@ -231,8 +231,11 @@ On software, check bit:
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In-Band Interrupts
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++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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IBI\s are accepted autonomously during bus idle if the feature is enabled.
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The accepted IBI\s fill the IBI FIFO and generate an interrupt to the
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IBI's are resolved autonomously during bus available per specification,
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if they are accepted or rejected depends if the feature itself is enabled;
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see I3C Controller's :ref:`i3c_controller regmap` register ``IBI_CONFIG`` for
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more info.
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The accepted IBI's fill the IBI FIFO and generate an interrupt to the
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PS.
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The structure of the received IBI is:
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@ -466,7 +466,7 @@ OPS_STATUS_NOP
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RO
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This bit is set to 1 when the bus is not executing any procedure.
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It is not idle bus condition since it set right after the Stop.
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ENDIELD
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ENDFIELD
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FIELD
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[6:5] 0x0
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@ -505,12 +505,12 @@ ENDREG
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FIELD
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[1] 0x0
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IBI_CONFIG_AUTO
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IBI_CONFIG_LISTEN
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WO
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Set this bit to listen for IBI requests (when a peripheral pulls SDA Low during quiet times).
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Set this bit to listen for IBI requests (when a peripheral pulls SDA Low during bus available).
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After the IBI request is resolved, the controller returns to idle, since it is was not doing
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a cmd transfer.
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IBI_CONFIG_ENABLE must be set 1.
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This should be set to 1 during normal operation, even if IBI_CONFIG_ENABLE is disabled.
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ENDFIELD
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FIELD
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@ -521,8 +521,10 @@ Set this bit to accept (ACK) IBI requests.
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If disabled, the controller will NACK IBI requests.
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If enabled, the controller will ACK the IBI request and receive the MDB.
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In both cases, the controller will proceed with the cmd transfer after resolving the IBI
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request.
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Accepted IBIs fill the IBI_FIFO and generate an interruption in the PS.
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request, if any.
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Accepted IBIs fill the IBI_FIFO and generate an interrupt to the PS.
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IBI_CONFIG_LISTEN set to 1 and IBI_CONFIG_ENABLE set to 0 ensures that incoming IBIs are
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rejected as they come.
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ENDFIELD
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############################################################################################
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@ -552,9 +554,9 @@ ENDFIELD
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FIELD
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[3] 0x0
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DEV_CHAR_HAS_IBI_MDB
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DEV_CHAR_HAS_IBI_PAYLOAD
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RW
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Indicates if the device sends an MDB during the IBI.
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Indicates if the device sends at least MDB during the IBI.
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0 does not, 1 does.
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ENDFIELD
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@ -62,7 +62,7 @@ module i3c_controller_bit_mod #(
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// Mux to alternative logic to support I²C devices.
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input i2c_mode,
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// Indicates that the bus is not transferring,
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// is *not* bus idle condition because does not wait 200us after P.
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// is *not* bus available condition because does not wait 1s after P.
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output nop,
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// 0: 1.56MHz
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// 1: 3.12MHz
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@ -110,7 +110,8 @@ module i3c_controller_core #(
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wire i2c_mode;
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i3c_controller_framing #(
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.MAX_DEVS(MAX_DEVS)
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.MAX_DEVS(MAX_DEVS),
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.CLK_MOD(CLK_MOD)
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) i_i3c_controller_framing (
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.reset_n(reset_n),
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.clk(clk),
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@ -64,7 +64,8 @@
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`include "i3c_controller_word.vh"
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module i3c_controller_framing #(
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parameter MAX_DEVS = 16
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parameter MAX_DEVS = 16,
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parameter CLK_MOD = 0
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) (
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input clk,
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input reset_n,
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@ -114,7 +115,9 @@ module i3c_controller_framing #(
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input [3:0] rmap_dev_char_data
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);
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localparam IDLE_BUS_WIDTH = 7;
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// Defines the bus available condition width (> 1us for target)
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// Setting around 0.64us for the controller.
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localparam BUS_AVAIL = CLK_MOD ? 4 : 5;
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localparam [2:0] SM_SETUP = 0;
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localparam [2:0] SM_VALIDATE = 1;
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@ -126,7 +129,7 @@ module i3c_controller_framing #(
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localparam [6:0] CCC_ENTDAA = 'h07;
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reg [`CMDW_HEADER_WIDTH:0] st;
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reg [IDLE_BUS_WIDTH:0] idle_bus_reg;
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reg [BUS_AVAIL:0] bus_avail_reg;
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reg cmdp_ccc_reg;
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reg cmdp_ccc_bcast_reg;
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reg [6:0] cmdp_ccc_id_reg;
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reg error_nack_resp ;
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reg [2:0] sm;
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wire idle_bus;
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wire bus_avail;
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wire ibi_enable;
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wire ibi_auto;
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wire ibi_listen;
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wire cmdp_rnw;
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wire [6:0] cmdp_da;
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wire [11:0] cmdp_buffer_len;
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// Direct is CCC_BCAST 1'b1
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sm <= cmdp_ccc & ~cmdp_ccc_bcast ? SM_TRANSFER : SM_VALIDATE;
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ctrl_validate <= 1'b0;
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end else if (ibi_auto & ibi_enable & rx === 1'b0 & idle_bus) begin
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end else if (ibi_listen & rx === 1'b0 & bus_avail) begin
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st <= `CMDW_BCAST_7E_W0;
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sm <= SM_TRANSFER;
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ibi_requested_auto <= 1'b1;
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// At the word module, was ACKed if IBI is enabled and DA is known, if not, NACKed.
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if (ibi_requested) begin
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// Receive MSB if IBI is enabled, dev is known and BCR[2] is 1'b1.
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if (dev_is_attached & ibi_enable & ibi_bcr_2) begin
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if (ibi_enable & dev_is_attached & ibi_bcr_2) begin
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st <= `CMDW_IBI_MDB;
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end else begin
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st <= cmdp_valid_reg ? `CMDW_START : `CMDW_STOP_OD;
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error_nack_bcast <= cmdw_nack_bcast;
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end
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// Idle bus condition
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// Bus available condition
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always @(posedge clk) begin
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if (!reset_n || !nop) begin
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idle_bus_reg <= 0;
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end else if (!idle_bus) begin
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idle_bus_reg <= idle_bus_reg + 1;
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bus_avail_reg <= 0;
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end else if (!bus_avail) begin
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bus_avail_reg <= bus_avail_reg + 1;
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end
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end
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assign idle_bus = &idle_bus_reg;
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assign bus_avail = &bus_avail_reg;
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// Device characteristics look-up.
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@ -412,7 +414,7 @@ module i3c_controller_framing #(
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assign cmdw_valid = sm == SM_TRANSFER;
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assign ibi_enable = rmap_ibi_config[0];
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assign ibi_auto = rmap_ibi_config[1];
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assign ibi_listen = rmap_ibi_config[1];
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assign cmdp_rnw = cmdp[0];
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assign cmdp_da = cmdp[7:1];
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@ -376,7 +376,7 @@ module i3c_controller_word (
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ibi_requested <= i < 6 & rx === 1'b0 ? 1'b1 : ibi_requested;
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if (i[2:0] == 7) begin
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arbitration_valid <= 1'b1;
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if (ibi_dev_is_attached & ibi_requested & ~ibi_bcr_2) begin
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if (ibi_enable & ibi_requested & ibi_dev_is_attached & ~ibi_bcr_2) begin
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ibi_tick <= 1'b1;
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end
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end
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