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fmcjesdadc1: a10gx/a10soc

main
Rejeesh Kutty 2017-06-14 10:39:38 -04:00
parent 051c1d6644
commit 38c708d4d0
6 changed files with 126 additions and 408 deletions
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92
projects/fmcjesdadc1/a10gx/system_project.tcl
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@ -2,99 +2,39 @@
source ../../scripts/adi_env.tcl source ../../scripts/adi_env.tcl
source ../../scripts/adi_project_alt.tcl source ../../scripts/adi_project_alt.tcl
adi_project_altera daq2_a10gx adi_project_altera fmcjesdadc1_a10gx
source $ad_hdl_dir/projects/common/a10gx/a10gx_system_assign.tcl source $ad_hdl_dir/projects/common/a10gx/a10gx_system_assign.tcl
# files # files
set_global_assignment -name VERILOG_FILE ../common/daq2_spi.v set_global_assignment -name VERILOG_FILE ../common/fmcjesdadc1_spi.v
set_global_assignment -name VERILOG_FILE ../../../library/common/ad_sysref_gen.v
# lane interface # lane interface
set_location_assignment PIN_AJ8 -to rx_ref_clk ; ## B20 FMCA_GBTCLK1_M2C_P set_location_assignment PIN_AL8 -to ref_clk ; ## D04 FMCA_GBTCLK0_M2C_P
set_location_assignment PIN_AJ7 -to "rx_ref_clk(n)" ; ## B21 FMCA_GBTCLK1_M2C_N set_location_assignment PIN_AL7 -to "ref_clk(n)" ; ## D05 FMCA_GBTCLK0_M2C_N
set_location_assignment PIN_AV5 -to rx_data[0] ; ## A10 FMCA_DP3_M2C_P set_location_assignment PIN_AW7 -to rx_data[0] ; ## C06 FMCA_DP0_M2C_P
set_location_assignment PIN_AV6 -to "rx_data[0](n)" ; ## A11 FMCA_DP3_M2C_N set_location_assignment PIN_AW8 -to "rx_data[0](n)" ; ## C07 FMCA_DP0_M2C_N
set_location_assignment PIN_AW7 -to rx_data[1] ; ## C06 FMCA_DP0_M2C_P set_location_assignment PIN_BA7 -to rx_data[1] ; ## A02 FMCA_DP1_M2C_P
set_location_assignment PIN_AW8 -to "rx_data[1](n)" ; ## C07 FMCA_DP0_M2C_N set_location_assignment PIN_BA8 -to "rx_data[1](n)" ; ## A03 FMCA_DP1_M2C_N
set_location_assignment PIN_AY5 -to rx_data[2] ; ## A06 FMCA_DP2_M2C_P set_location_assignment PIN_AY5 -to rx_data[2] ; ## A06 FMCA_DP2_M2C_P
set_location_assignment PIN_AY6 -to "rx_data[2](n)" ; ## A07 FMCA_DP2_M2C_N set_location_assignment PIN_AY6 -to "rx_data[2](n)" ; ## A07 FMCA_DP2_M2C_N
set_location_assignment PIN_BA7 -to rx_data[3] ; ## A02 FMCA_DP1_M2C_P set_location_assignment PIN_AV5 -to rx_data[3] ; ## A10 FMCA_DP3_M2C_P
set_location_assignment PIN_BA8 -to "rx_data[3](n)" ; ## A03 FMCA_DP1_M2C_N set_location_assignment PIN_AV6 -to "rx_data[3](n)" ; ## A11 FMCA_DP3_M2C_N
set_location_assignment PIN_AT10 -to rx_sync ; ## D08 FMCA_LA01_CC_P set_location_assignment PIN_AY17 -to rx_sync ; ## G36 FMCA_HPC_LA33_P
set_location_assignment PIN_AR11 -to "rx_sync(n)" ; ## D09 FMCA_LA01_CC_N set_location_assignment PIN_AW17 -to rx_sysref ; ## G37 FMCA_HPC_LA33_N
set_location_assignment PIN_AR20 -to rx_sysref ; ## G09 FMCA_LA03_P set_location_assignment PIN_BB18 -to spi_csn ; ## G34 FMCA_HPC_LA31_N
set_location_assignment PIN_AR19 -to "rx_sysref(n)" ; ## G10 FMCA_LA03_N set_location_assignment PIN_BB17 -to spi_clk ; ## G33 FMCA_HPC_LA31_P
set_location_assignment PIN_AL8 -to tx_ref_clk ; ## D04 FMCA_GBTCLK0_M2C_P set_location_assignment PIN_AV20 -to spi_sdio ; ## H37 FMCA_HPC_LA32_P
set_location_assignment PIN_AL7 -to "tx_ref_clk(n)" ; ## D05 FMCA_GBTCLK0_M2C_N
set_location_assignment PIN_BC3 -to tx_data[0] ; ## A30 FMCA_DP3_C2M_P (tx_data_p[0])
set_location_assignment PIN_BC4 -to "tx_data[0](n)" ; ## A31 FMCA_DP3_C2M_N (tx_data_n[0])
set_location_assignment PIN_BC7 -to tx_data[1] ; ## C02 FMCA_DP0_C2M_P (tx_data_p[3])
set_location_assignment PIN_BC8 -to "tx_data[1](n)" ; ## C03 FMCA_DP0_C2M_N (tx_data_n[3])
set_location_assignment PIN_BB5 -to tx_data[2] ; ## A26 FMCA_DP2_C2M_P (tx_data_p[1])
set_location_assignment PIN_BB6 -to "tx_data[2](n)" ; ## A27 FMCA_DP2_C2M_N (tx_data_n[1])
set_location_assignment PIN_BD5 -to tx_data[3] ; ## A22 FMCA_DP1_C2M_P (tx_data_p[2])
set_location_assignment PIN_BD6 -to "tx_data[3](n)" ; ## A23 FMCA_DP1_C2M_N (tx_data_n[2])
set_location_assignment PIN_AR22 -to tx_sync ; ## H07 FMCA_LA02_P
set_location_assignment PIN_AT22 -to "tx_sync(n)" ; ## H08 FMCA_LA02_N
set_location_assignment PIN_AN20 -to tx_sysref ; ## H10 FMCA_LA04_P
set_location_assignment PIN_AP19 -to "tx_sysref(n)" ; ## H11 FMCA_LA04_N
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to ref_clk set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to ref_clk
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to rx_data set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to rx_data
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to tx_data
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[0] set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[0]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[1] set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[1]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[2] set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[2]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[3] set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[3]
set_instance_assignment -name IO_STANDARD LVDS -to rx_sync
set_instance_assignment -name IO_STANDARD LVDS -to rx_sysref
set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to rx_sysref
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_data[0]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_data[1]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_data[2]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_data[3]
set_instance_assignment -name IO_STANDARD LVDS -to tx_sync
set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to tx_sync
set_instance_assignment -name IO_STANDARD LVDS -to tx_sysref
set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to tx_sysref
set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_0 -to rx_data[0]
set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_1 -to rx_data[1]
set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_2 -to rx_data[2]
set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_3 -to rx_data[3]
set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_0 -to tx_data[0]
set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_1 -to tx_data[1]
set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_2 -to tx_data[2]
set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_3 -to tx_data[3]
# gpio
set_location_assignment PIN_AT17 -to trig ; ## H13 FMCA_LA07_P
set_location_assignment PIN_AU17 -to "trig(n)" ; ## H14 FMCA_LA07_N
set_location_assignment PIN_AR14 -to adc_fdb ; ## H17 FMCA_LA11_N
set_location_assignment PIN_AT14 -to adc_fda ; ## H16 FMCA_LA11_P
set_location_assignment PIN_AR16 -to dac_irq ; ## G15 FMCA_LA12_P
set_location_assignment PIN_AP17 -to clkd_status[1] ; ## D18 FMCA_LA13_N
set_location_assignment PIN_AR17 -to clkd_status[0] ; ## D17 FMCA_LA13_P
set_location_assignment PIN_AV14 -to adc_pd ; ## C10 FMCA_LA06_P
set_location_assignment PIN_AP16 -to dac_txen ; ## G16 FMCA_LA12_N
set_location_assignment PIN_AT15 -to dac_reset ; ## C15 FMCA_LA10_N
set_location_assignment PIN_AP18 -to clkd_sync ; ## G12 FMCA_LA08_P
set_instance_assignment -name IO_STANDARD LVDS -to trig
# spi
set_location_assignment PIN_AV11 -to spi_csn_clk ; ## D11 FMCA_LA05_P
set_location_assignment PIN_AR15 -to spi_csn_dac ; ## C14 FMCA_LA10_P
set_location_assignment PIN_AV13 -to spi_csn_adc ; ## D15 FMCA_LA09_N
set_location_assignment PIN_AW11 -to spi_clk ; ## D12 FMCA_LA05_N
set_location_assignment PIN_AW13 -to spi_sdio ; ## D14 FMCA_LA09_P
set_location_assignment PIN_AN19 -to spi_dir ; ## G13 FMCA_LA08_N
execute_flow -compile execute_flow -compile

2
projects/fmcjesdadc1/a10gx/system_qsys.tcl
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@ -1,5 +1,5 @@
source $ad_hdl_dir/projects/common/a10gx/a10gx_system_qsys.tcl source $ad_hdl_dir/projects/common/a10gx/a10gx_system_qsys.tcl
source ../common/daq2_qsys.tcl source ../common/fmcjesdadc1_qsys.tcl

103
projects/fmcjesdadc1/a10gx/system_top.v
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@ -79,82 +79,35 @@ module system_top (
// lane interface // lane interface
input rx_ref_clk, input ref_clk,
input rx_sysref, input rx_sysref,
output rx_sync, output rx_sync,
input [ 3:0] rx_data, input [ 3:0] rx_data,
input tx_ref_clk,
input tx_sysref,
input tx_sync,
output [ 3:0] tx_data,
// gpio
input trig,
input adc_fdb,
input adc_fda,
input dac_irq,
input [ 1:0] clkd_status,
output adc_pd,
output dac_txen,
output dac_reset,
output clkd_sync,
// spi // spi
output spi_csn_clk, output spi_csn,
output spi_csn_dac,
output spi_csn_adc,
output spi_clk, output spi_clk,
inout spi_sdio, inout spi_sdio);
output spi_dir);
// internal signals // internal signals
wire rx_clk;
wire [ 3:0] rx_ip_sof;
wire [127:0] rx_ip_data;
wire eth_reset; wire eth_reset;
wire eth_mdio_i; wire eth_mdio_i;
wire eth_mdio_o; wire eth_mdio_o;
wire eth_mdio_t; wire eth_mdio_t;
wire [ 63:0] gpio_i; wire [ 63:0] gpio_i;
wire [ 63:0] gpio_o; wire [ 63:0] gpio_o;
wire spi_miso_s; wire spi_miso;
wire spi_mosi_s; wire spi_mosi;
wire [ 7:0] spi_csn_s; wire [ 7:0] spi_csn_s;
// daq2
assign spi_csn_adc = spi_csn_s[2];
assign spi_csn_dac = spi_csn_s[1];
assign spi_csn_clk = spi_csn_s[0];
daq2_spi i_daq2_spi (
.spi_csn (spi_csn_s[2:0]),
.spi_clk (spi_clk),
.spi_mosi (spi_mosi_s),
.spi_miso (spi_miso_s),
.spi_sdio (spi_sdio),
.spi_dir (spi_dir));
// gpio in & out are separate cores // gpio in & out are separate cores
assign gpio_i[63:44] = gpio_o[63:44]; assign gpio_i[63:32] = gpio_o[63:32];
assign gpio_i[43:43] = trig;
assign gpio_i[42:40] = gpio_o[42:40];
assign adc_pd = gpio_o[42];
assign dac_txen = gpio_o[41];
assign dac_reset = gpio_o[40];
assign gpio_i[39:39] = gpio_o[39];
assign gpio_i[38:38] = gpio_o[38];
assign clkd_sync = gpio_o[38];
assign gpio_i[37:37] = gpio_o[37];
assign gpio_i[36:36] = adc_fdb;
assign gpio_i[35:35] = adc_fda;
assign gpio_i[34:34] = dac_irq;
assign gpio_i[33:32] = clkd_status;
// board stuff // board stuff
@ -165,17 +118,38 @@ module system_top (
assign ddr3_a[14:12] = 3'd0; assign ddr3_a[14:12] = 3'd0;
assign gpio_i[31:27] = gpio_o[31:27]; assign gpio_i[31:27] = gpio_o[31:27];
assign gpio_i[26:16] = gpio_bd_i;
assign gpio_i[15: 0] = gpio_o[15:0]; assign gpio_i[15: 0] = gpio_o[15:0];
assign gpio_bd_o = gpio_o[15:0]; // instantiations
assign spi_csn = spi_csn_s[0];
fmcjesdadc1_spi i_fmcjesdadc1_spi (
.spi_csn (spi_csn_s[0]),
.spi_clk (spi_clk),
.spi_mosi (spi_mosi),
.spi_miso (spi_miso),
.spi_sdio (spi_sdio));
system_bd i_system_bd ( system_bd i_system_bd (
.rx_core_clk_clk (rx_clk),
.rx_data_0_rx_serial_data (rx_data[0]), .rx_data_0_rx_serial_data (rx_data[0]),
.rx_data_1_rx_serial_data (rx_data[1]), .rx_data_1_rx_serial_data (rx_data[1]),
.rx_data_2_rx_serial_data (rx_data[2]), .rx_data_2_rx_serial_data (rx_data[2]),
.rx_data_3_rx_serial_data (rx_data[3]), .rx_data_3_rx_serial_data (rx_data[3]),
.rx_ref_clk_clk (rx_ref_clk), .rx_ip_data_data (rx_ip_data),
.rx_ip_data_valid (),
.rx_ip_data_ready (1'b1),
.rx_ip_data_0_data (rx_ip_data[63:0]),
.rx_ip_data_0_valid (1'b1),
.rx_ip_data_0_ready (),
.rx_ip_data_1_data (rx_ip_data[127:64]),
.rx_ip_data_1_valid (1'b1),
.rx_ip_data_1_ready (),
.rx_ip_sof_export (rx_ip_sof),
.rx_ip_sof_0_export (rx_ip_sof),
.rx_ip_sof_1_export (rx_ip_sof),
.rx_ref_clk_clk (ref_clk),
.rx_sync_export (rx_sync), .rx_sync_export (rx_sync),
.rx_sysref_export (rx_sysref), .rx_sysref_export (rx_sysref),
.sys_clk_clk (sys_clk), .sys_clk_clk (sys_clk),
@ -209,17 +183,10 @@ module system_top (
.sys_gpio_in_export (gpio_i[63:32]), .sys_gpio_in_export (gpio_i[63:32]),
.sys_gpio_out_export (gpio_o[63:32]), .sys_gpio_out_export (gpio_o[63:32]),
.sys_rst_reset_n (sys_resetn), .sys_rst_reset_n (sys_resetn),
.sys_spi_MISO (spi_miso_s), .sys_spi_MISO (spi_miso),
.sys_spi_MOSI (spi_mosi_s), .sys_spi_MOSI (spi_mosi_s),
.sys_spi_SCLK (spi_clk), .sys_spi_SCLK (spi_clk),
.sys_spi_SS_n (spi_csn_s), .sys_spi_SS_n (spi_csn_s));
.tx_data_0_tx_serial_data (tx_data[0]),
.tx_data_1_tx_serial_data (tx_data[1]),
.tx_data_2_tx_serial_data (tx_data[2]),
.tx_data_3_tx_serial_data (tx_data[3]),
.tx_ref_clk_clk (tx_ref_clk),
.tx_sync_export (tx_sync),
.tx_sysref_export (tx_sysref));
endmodule endmodule

152
projects/fmcjesdadc1/a10soc/system_project.tcl
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@ -2,149 +2,39 @@
source ../../scripts/adi_env.tcl source ../../scripts/adi_env.tcl
source ../../scripts/adi_project_alt.tcl source ../../scripts/adi_project_alt.tcl
adi_project_altera adrv9371x_a10soc adi_project_altera fmcjesdadc1_a10soc
source $ad_hdl_dir/projects/common/a10soc/a10soc_system_assign.tcl source $ad_hdl_dir/projects/common/a10soc/a10soc_system_assign.tcl
source $ad_hdl_dir/projects/common/a10soc/a10soc_plddr4_assign.tcl
# ad9371 # files
set_location_assignment PIN_N29 -to ref_clk0 ; ## D04 FMC_HPC_GBTCLK0_M2C_P (NC) set_global_assignment -name VERILOG_FILE ../common/fmcjesdadc1_spi.v
set_location_assignment PIN_N28 -to "ref_clk0(n)" ; ## D05 FMC_HPC_GBTCLK0_M2C_N (NC) set_global_assignment -name VERILOG_FILE ../../../library/common/ad_sysref_gen.v
set_location_assignment PIN_R29 -to ref_clk1 ; ## B20 FMC_HPC_GBTCLK1_M2C_P
set_location_assignment PIN_R28 -to "ref_clk1(n)" ; ## B21 FMC_HPC_GBTCLK1_M2C_N # lane interface
set_location_assignment PIN_R33 -to rx_data[0] ; ## A02 FMC_HPC_DP1_M2C_P
set_location_assignment PIN_R32 -to "rx_data[0](n)" ; ## A03 FMC_HPC_DP1_M2C_N set_location_assignment PIN_N29 -to ref_clk ; ## D04 FMC_HPC_GBTCLK0_M2C_P
set_location_assignment PIN_P35 -to rx_data[1] ; ## A06 FMC_HPC_DP2_M2C_P set_location_assignment PIN_N28 -to "ref_clk(n)" ; ## D05 FMC_HPC_GBTCLK0_M2C_N
set_location_assignment PIN_P34 -to "rx_data[1](n)" ; ## A07 FMC_HPC_DP2_M2C_N set_location_assignment PIN_T31 -to rx_data[0] ; ## C06 FMC_HPC_DP0_M2C_P
set_location_assignment PIN_T31 -to rx_data[2] ; ## C06 FMC_HPC_DP0_M2C_P set_location_assignment PIN_T30 -to "rx_data[0](n)" ; ## C07 FMC_HPC_DP0_M2C_N
set_location_assignment PIN_T30 -to "rx_data[2](n)" ; ## C07 FMC_HPC_DP0_M2C_N set_location_assignment PIN_R33 -to rx_data[1] ; ## A02 FMC_HPC_DP1_M2C_P
set_location_assignment PIN_R32 -to "rx_data[1](n)" ; ## A03 FMC_HPC_DP1_M2C_N
set_location_assignment PIN_P35 -to rx_data[2] ; ## A06 FMC_HPC_DP2_M2C_P
set_location_assignment PIN_P34 -to "rx_data[2](n)" ; ## A07 FMC_HPC_DP2_M2C_N
set_location_assignment PIN_P31 -to rx_data[3] ; ## A10 FMC_HPC_DP3_M2C_P set_location_assignment PIN_P31 -to rx_data[3] ; ## A10 FMC_HPC_DP3_M2C_P
set_location_assignment PIN_P30 -to "rx_data[3](n)" ; ## A11 FMC_HPC_DP3_M2C_N set_location_assignment PIN_P30 -to "rx_data[3](n)" ; ## A11 FMC_HPC_DP3_M2C_N
set_location_assignment PIN_M39 -to tx_data[0] ; ## A22 FMC_HPC_DP1_C2M_P (tx_data_p[3]) set_location_assignment PIN_P11 -to rx_sync ; ## G36 FMCA_HPC_LA33_P
set_location_assignment PIN_M38 -to "tx_data[0](n)" ; ## A23 FMC_HPC_DP1_C2M_N (tx_data_n[3]) set_location_assignment PIN_R11 -to rx_sysref ; ## G37 FMCA_HPC_LA33_N
set_location_assignment PIN_L37 -to tx_data[1] ; ## A26 FMC_HPC_DP2_C2M_P (tx_data_p[0]) set_location_assignment PIN_R8 -to spi_csn ; ## G34 FMCA_HPC_LA31_N
set_location_assignment PIN_L36 -to "tx_data[1](n)" ; ## A27 FMC_HPC_DP2_C2M_N (tx_data_n[0]) set_location_assignment PIN_P8 -to spi_clk ; ## G33 FMCA_HPC_LA31_P
set_location_assignment PIN_N37 -to tx_data[2] ; ## C02 FMC_HPC_DP0_C2M_P (tx_data_p[1]) set_location_assignment PIN_L8 -to spi_sdio ; ## H37 FMCA_HPC_LA32_P
set_location_assignment PIN_N36 -to "tx_data[2](n)" ; ## C03 FMC_HPC_DP0_C2M_N (tx_data_n[1])
set_location_assignment PIN_K39 -to tx_data[3] ; ## A30 FMC_HPC_DP3_C2M_P (tx_data_p[2])
set_location_assignment PIN_K38 -to "tx_data[3](n)" ; ## A31 FMC_HPC_DP3_C2M_N (tx_data_n[2])
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to ref_clk0 set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to ref_clk
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to ref_clk1
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to rx_data set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to rx_data
set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to tx_data
set_instance_assignment -name IO_STANDARD LVDS -to ref_clk0
set_instance_assignment -name IO_STANDARD LVDS -to ref_clk1
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[0] set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[0]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[1] set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[1]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[2] set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[2]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[3] set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to rx_data[3]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_data[0]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_data[1]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_data[2]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to tx_data[3]
set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_0 -to rx_data[0]
set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_1 -to rx_data[1]
set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_2 -to rx_data[2]
set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_3 -to rx_data[3]
set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_0 -to tx_data[0]
set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_1 -to tx_data[1]
set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_2 -to tx_data[2]
set_instance_assignment -name XCVR_RECONFIG_GROUP xcvr_3 -to tx_data[3]
set_location_assignment PIN_C14 -to rx_sync ; ## G09 FMC_HPC_LA03_P
set_location_assignment PIN_D14 -to rx_sync(n) ; ## G10 FMC_HPC_LA03_N
set_location_assignment PIN_E3 -to rx_os_sync ; ## G27 FMC_HPC_LA25_P (Sniffer)
set_location_assignment PIN_F3 -to rx_os_sync(n) ; ## G28 FMC_HPC_LA25_N (Sniffer)
set_location_assignment PIN_C13 -to tx_sync ; ## H07 FMC_HPC_LA02_P
set_location_assignment PIN_D13 -to tx_sync(n) ; ## H08 FMC_HPC_LA02_N
set_location_assignment PIN_P11 -to sysref ; ## G36 FMC_HPC_LA33_P
set_location_assignment PIN_R11 -to sysref(n) ; ## G37 FMC_HPC_LA33_N
set_instance_assignment -name IO_STANDARD LVDS -to rx_sync
set_instance_assignment -name IO_STANDARD LVDS -to rx_os_sync
set_instance_assignment -name IO_STANDARD LVDS -to tx_sync
set_instance_assignment -name IO_STANDARD LVDS -to sysref
set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to tx_sync
set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to sysref
set_location_assignment PIN_A13 -to spi_csn_ad9528 ; ## D15 FMC_HPC_LA09_N
set_location_assignment PIN_A12 -to spi_csn_ad9371 ; ## D14 FMC_HPC_LA09_P
set_location_assignment PIN_A9 -to spi_clk ; ## H13 FMC_HPC_LA07_P
set_location_assignment PIN_B9 -to spi_mosi ; ## H14 FMC_HPC_LA07_N
set_location_assignment PIN_B11 -to spi_miso ; ## G12 FMC_HPC_LA08_P
set_instance_assignment -name IO_STANDARD "1.8 V" -to spi_csn_ad9528
set_instance_assignment -name IO_STANDARD "1.8 V" -to spi_csn_ad9371
set_instance_assignment -name IO_STANDARD "1.8 V" -to spi_clk
set_instance_assignment -name IO_STANDARD "1.8 V" -to spi_mosi
set_instance_assignment -name IO_STANDARD "1.8 V" -to spi_miso
set_location_assignment PIN_F2 -to ad9528_reset_b ; ## D26 FMC_HPC_LA26_P
set_location_assignment PIN_G2 -to ad9528_sysref_req ; ## D27 FMC_HPC_LA26_N
set_location_assignment PIN_J11 -to ad9371_tx1_enable ; ## D17 FMC_HPC_LA13_P
set_location_assignment PIN_J9 -to ad9371_tx2_enable ; ## C18 FMC_HPC_LA14_P
set_location_assignment PIN_K11 -to ad9371_rx1_enable ; ## D18 FMC_HPC_LA13_N
set_location_assignment PIN_J10 -to ad9371_rx2_enable ; ## C19 FMC_HPC_LA14_N
set_location_assignment PIN_F13 -to ad9371_test ; ## D11 FMC_HPC_LA05_P (DNI/NC)
set_location_assignment PIN_H12 -to ad9371_reset_b ; ## H10 FMC_HPC_LA04_P
set_location_assignment PIN_H13 -to ad9371_gpint ; ## H11 FMC_HPC_LA04_N
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9528_reset_b
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9528_sysref_req
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_tx1_enable
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_tx2_enable
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_rx1_enable
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_rx2_enable
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_test
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_reset_b
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpint
# single ended default
set_location_assignment PIN_D4 -to ad9371_gpio[0] ; ## H19 FMC_HPC_LA15_P
set_location_assignment PIN_D5 -to ad9371_gpio[1] ; ## H20 FMC_HPC_LA15_N
set_location_assignment PIN_D6 -to ad9371_gpio[2] ; ## G18 FMC_HPC_LA16_P
set_location_assignment PIN_E6 -to ad9371_gpio[3] ; ## G19 FMC_HPC_LA16_N
set_location_assignment PIN_C2 -to ad9371_gpio[4] ; ## H25 FMC_HPC_LA21_P
set_location_assignment PIN_D3 -to ad9371_gpio[5] ; ## H26 FMC_HPC_LA21_N
set_location_assignment PIN_G7 -to ad9371_gpio[6] ; ## C22 FMC_HPC_LA18_CC_P
set_location_assignment PIN_H7 -to ad9371_gpio[7] ; ## C23 FMC_HPC_LA18_CC_N
set_location_assignment PIN_G4 -to ad9371_gpio[8] ; ## G25 FMC_HPC_LA22_N (LVDS_1N)
set_location_assignment PIN_G5 -to ad9371_gpio[9] ; ## H22 FMC_HPC_LA19_P (LVDS_2P)
set_location_assignment PIN_G6 -to ad9371_gpio[10] ; ## H23 FMC_HPC_LA19_N (LVDS_2N)
set_location_assignment PIN_C3 -to ad9371_gpio[11] ; ## G21 FMC_HPC_LA20_P (LVDS_3P)
set_location_assignment PIN_C4 -to ad9371_gpio[12] ; ## G22 FMC_HPC_LA20_N (LVDS_3N)
set_location_assignment PIN_P10 -to ad9371_gpio[13] ; ## G31 FMC_HPC_LA29_N (LVDS_4N)
set_location_assignment PIN_N9 -to ad9371_gpio[14] ; ## G30 FMC_HPC_LA29_P (LVDS_4P)
set_location_assignment PIN_F4 -to ad9371_gpio[15] ; ## G24 FMC_HPC_LA22_P (LVDS_1P)
set_location_assignment PIN_N13 -to ad9371_gpio[16] ; ## G16 FMC_HPC_LA12_N (LVDS_5N)
set_location_assignment PIN_M12 -to ad9371_gpio[17] ; ## G15 FMC_HPC_LA12_P (LVDS_5P)
set_location_assignment PIN_F14 -to ad9371_gpio[18] ; ## D12 FMC_HPC_LA05_N
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[0]
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[1]
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[2]
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[3]
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[4]
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[5]
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[6]
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[7]
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[8]
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[9]
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[10]
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[11]
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[12]
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[13]
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[14]
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[15]
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[16]
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[17]
set_instance_assignment -name IO_STANDARD "1.8 V" -to ad9371_gpio[18]
execute_flow -compile execute_flow -compile

8
projects/fmcjesdadc1/a10soc/system_qsys.tcl
View File

@ -1,11 +1,5 @@
set dac_fifo_name avl_ad9371_tx_fifo
set dac_fifo_address_width 10
set dac_data_width 128
set dac_dma_data_width 128
source $ad_hdl_dir/projects/common/a10soc/a10soc_system_qsys.tcl source $ad_hdl_dir/projects/common/a10soc/a10soc_system_qsys.tcl
source $ad_hdl_dir/projects/common/a10soc/a10soc_plddr4_dacfifo_qsys.tcl source ../common/fmcjesdadc1_qsys.tcl
source ../common/adrv9371x_qsys.tcl

153
projects/fmcjesdadc1/a10soc/system_top.v
View File

@ -63,27 +63,6 @@ module system_top (
inout [ 3:0] hps_ddr_dbi_n, inout [ 3:0] hps_ddr_dbi_n,
input hps_ddr_rzq, input hps_ddr_rzq,
// pl-ddr4
input sys_ddr_ref_clk,
output [ 0:0] sys_ddr_clk_p,
output [ 0:0] sys_ddr_clk_n,
output [ 16:0] sys_ddr_a,
output [ 1:0] sys_ddr_ba,
output [ 0:0] sys_ddr_bg,
output [ 0:0] sys_ddr_cke,
output [ 0:0] sys_ddr_cs_n,
output [ 0:0] sys_ddr_odt,
output [ 0:0] sys_ddr_reset_n,
output [ 0:0] sys_ddr_act_n,
output [ 0:0] sys_ddr_par,
input [ 0:0] sys_ddr_alert_n,
inout [ 7:0] sys_ddr_dqs_p,
inout [ 7:0] sys_ddr_dqs_n,
inout [ 63:0] sys_ddr_dq,
inout [ 7:0] sys_ddr_dbi_n,
input sys_ddr_rzq,
// hps-ethernet // hps-ethernet
input [ 0:0] hps_eth_rxclk, input [ 0:0] hps_eth_rxclk,
@ -128,121 +107,77 @@ module system_top (
input [ 7:0] gpio_bd_i, input [ 7:0] gpio_bd_i,
output [ 3:0] gpio_bd_o, output [ 3:0] gpio_bd_o,
// ad9371-interface // lane interface
input ref_clk0, input ref_clk,
input ref_clk1, input rx_sysref,
input [ 3:0] rx_data,
output [ 3:0] tx_data,
output rx_sync, output rx_sync,
output rx_os_sync, input [ 3:0] rx_data,
input tx_sync,
input sysref,
output ad9528_reset_b, // spi
output ad9528_sysref_req,
output ad9371_tx1_enable,
output ad9371_tx2_enable,
output ad9371_rx1_enable,
output ad9371_rx2_enable,
output ad9371_test,
output ad9371_reset_b,
input ad9371_gpint,
inout [ 18:0] ad9371_gpio, output spi_csn,
output spi_csn_ad9528,
output spi_csn_ad9371,
output spi_clk, output spi_clk,
output spi_mosi, inout spi_sdio);
input spi_miso);
// internal signals // internal signals
wire sys_ddr_cal_success; wire rx_clk;
wire sys_ddr_cal_fail; wire [ 3:0] rx_ip_sof;
wire [127:0] rx_ip_data;
wire sys_hps_resetn; wire sys_hps_resetn;
wire sys_resetn_s; wire sys_resetn_s;
wire [ 63:0] gpio_i; wire [ 63:0] gpio_i;
wire [ 63:0] gpio_o; wire [ 63:0] gpio_o;
wire spi_miso;
wire spi_mosi;
wire [ 7:0] spi_csn_s; wire [ 7:0] spi_csn_s;
wire dac_fifo_bypass;
// assignments // gpio in & out are separate cores
assign spi_csn_ad9528 = spi_csn_s[0]; assign gpio_i[63:32] = gpio_o[63:32];
assign spi_csn_ad9371 = spi_csn_s[1];
// gpio (ad9371)
assign gpio_i[63:61] = gpio_o[63:61];
assign dac_fifo_bypass = gpio_o[60];
assign gpio_i[60:60] = gpio_o[60];
assign ad9528_reset_b = gpio_o[59];
assign ad9528_sysref_req = gpio_o[58];
assign ad9371_tx1_enable = gpio_o[57];
assign ad9371_tx2_enable = gpio_o[56];
assign ad9371_rx1_enable = gpio_o[55];
assign ad9371_rx2_enable = gpio_o[54];
assign ad9371_test = gpio_o[53];
assign ad9371_reset_b = gpio_o[52];
assign gpio_i[59:52] = gpio_o[59:52];
assign gpio_i[51:51] = ad9371_gpint;
assign gpio_i[50:32] = gpio_o[50:32];
// board stuff (max-v-u21) // board stuff (max-v-u21)
assign gpio_i[31:14] = gpio_o[31:14]; assign gpio_i[31:12] = gpio_o[31:12];
assign gpio_i[13:13] = sys_ddr_cal_success;
assign gpio_i[12:12] = sys_ddr_cal_fail;
assign gpio_i[11: 4] = gpio_bd_i; assign gpio_i[11: 4] = gpio_bd_i;
assign gpio_i[ 3: 0] = gpio_o[3:0]; assign gpio_i[ 3: 0] = gpio_o[3:0];
assign gpio_bd_o = gpio_o[3:0]; assign gpio_bd_o = gpio_o[3:0];
// peripheral reset
assign sys_resetn_s = sys_resetn & sys_hps_resetn;
// instantiations // instantiations
assign spi_csn = spi_csn_s[0];
fmcjesdadc1_spi i_fmcjesdadc1_spi (
.spi_csn (spi_csn_s[0]),
.spi_clk (spi_clk),
.spi_mosi (spi_mosi),
.spi_miso (spi_miso),
.spi_sdio (spi_sdio));
system_bd i_system_bd ( system_bd i_system_bd (
.ad9371_gpio_export (ad9371_gpio), .rx_core_clk_clk (rx_clk),
.rx_data_0_rx_serial_data (rx_data[0]), .rx_data_0_rx_serial_data (rx_data[0]),
.rx_data_1_rx_serial_data (rx_data[1]), .rx_data_1_rx_serial_data (rx_data[1]),
.rx_data_2_rx_serial_data (rx_data[2]), .rx_data_2_rx_serial_data (rx_data[2]),
.rx_data_3_rx_serial_data (rx_data[3]), .rx_data_3_rx_serial_data (rx_data[3]),
.rx_os_ref_clk_clk (ref_clk1), .rx_ip_data_data (rx_ip_data),
.rx_os_sync_export (rx_os_sync), .rx_ip_data_valid (),
.rx_os_sysref_export (sysref), .rx_ip_data_ready (1'b1),
.rx_ref_clk_clk (ref_clk1), .rx_ip_data_0_data (rx_ip_data[63:0]),
.rx_ip_data_0_valid (1'b1),
.rx_ip_data_0_ready (),
.rx_ip_data_1_data (rx_ip_data[127:64]),
.rx_ip_data_1_valid (1'b1),
.rx_ip_data_1_ready (),
.rx_ip_sof_export (rx_ip_sof),
.rx_ip_sof_0_export (rx_ip_sof),
.rx_ip_sof_1_export (rx_ip_sof),
.rx_ref_clk_clk (ref_clk),
.rx_sync_export (rx_sync), .rx_sync_export (rx_sync),
.rx_sysref_export (sysref), .rx_sysref_export (rx_sysref),
.sys_clk_clk (sys_clk), .sys_clk_clk (sys_clk),
.sys_ddr_mem_mem_ck (sys_ddr_clk_p),
.sys_ddr_mem_mem_ck_n (sys_ddr_clk_n),
.sys_ddr_mem_mem_a (sys_ddr_a),
.sys_ddr_mem_mem_act_n (sys_ddr_act_n),
.sys_ddr_mem_mem_ba (sys_ddr_ba),
.sys_ddr_mem_mem_bg (sys_ddr_bg),
.sys_ddr_mem_mem_cke (sys_ddr_cke),
.sys_ddr_mem_mem_cs_n (sys_ddr_cs_n),
.sys_ddr_mem_mem_odt (sys_ddr_odt),
.sys_ddr_mem_mem_reset_n (sys_ddr_reset_n),
.sys_ddr_mem_mem_par (sys_ddr_par),
.sys_ddr_mem_mem_alert_n (sys_ddr_alert_n),
.sys_ddr_mem_mem_dqs (sys_ddr_dqs_p),
.sys_ddr_mem_mem_dqs_n (sys_ddr_dqs_n),
.sys_ddr_mem_mem_dq (sys_ddr_dq),
.sys_ddr_mem_mem_dbi_n (sys_ddr_dbi_n),
.sys_ddr_oct_oct_rzqin (sys_ddr_rzq),
.sys_ddr_ref_clk_clk (sys_ddr_ref_clk),
.sys_ddr_status_local_cal_success (sys_ddr_cal_success),
.sys_ddr_status_local_cal_fail (sys_ddr_cal_fail),
.sys_gpio_bd_in_port (gpio_i[31:0]), .sys_gpio_bd_in_port (gpio_i[31:0]),
.sys_gpio_bd_out_port (gpio_o[31:0]), .sys_gpio_bd_out_port (gpio_o[31:0]),
.sys_gpio_in_export (gpio_i[63:32]), .sys_gpio_in_export (gpio_i[63:32]),
@ -316,15 +251,7 @@ module system_top (
.sys_spi_MISO (spi_miso), .sys_spi_MISO (spi_miso),
.sys_spi_MOSI (spi_mosi), .sys_spi_MOSI (spi_mosi),
.sys_spi_SCLK (spi_clk), .sys_spi_SCLK (spi_clk),
.sys_spi_SS_n (spi_csn_s), .sys_spi_SS_n (spi_csn_s));
.tx_data_0_tx_serial_data (tx_data[0]),
.tx_data_1_tx_serial_data (tx_data[1]),
.tx_data_2_tx_serial_data (tx_data[2]),
.tx_data_3_tx_serial_data (tx_data[3]),
.tx_fifo_bypass_bypass (dac_fifo_bypass),
.tx_ref_clk_clk (ref_clk1),
.tx_sync_export (tx_sync),
.tx_sysref_export (sysref));
endmodule endmodule