From 3b748d8252e58701b399b354972103bf5b8fcbdb Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Thu, 6 Apr 2017 12:15:54 +0200 Subject: [PATCH] m2k: standalone: Disable 200MHz clock The 200 MHz clock was only used as the IODELAY controller clock. Since the design does not use any IODELAYs anymore this clock can be removed. Signed-off-by: Lars-Peter Clausen --- projects/m2k/common/m2k_bd.tcl | 2 -- projects/m2k/standalone/system_bd.tcl | 3 --- 2 files changed, 5 deletions(-) diff --git a/projects/m2k/common/m2k_bd.tcl b/projects/m2k/common/m2k_bd.tcl index 093e0bdb0..076cfe553 100644 --- a/projects/m2k/common/m2k_bd.tcl +++ b/projects/m2k/common/m2k_bd.tcl @@ -139,8 +139,6 @@ ad_connect pattern_generator_dmac/fifo_rd_dout logic_analyzer/dac_data ad_connect pattern_generator_dmac/fifo_rd_valid logic_analyzer/dac_valid -ad_connect sys_200m_clk axi_ad9963/delay_clk - ad_connect axi_ad9963/adc_clk adc_trigger_fifo/clk #ad_connect axi_ad9963/adc_clk util_cpack_ad9963/adc_clk ad_connect axi_adc_decimate/adc_clk axi_ad9963/adc_clk diff --git a/projects/m2k/standalone/system_bd.tcl b/projects/m2k/standalone/system_bd.tcl index d87fc8e1f..99efb24bd 100644 --- a/projects/m2k/standalone/system_bd.tcl +++ b/projects/m2k/standalone/system_bd.tcl @@ -50,9 +50,7 @@ set_property -dict [list CONFIG.PCW_TTC0_PERIPHERAL_ENABLE {0}] $sys_ps7 set_property -dict [list CONFIG.PCW_PACKAGE_NAME {clg225}] $sys_ps7 set_property -dict [list CONFIG.PCW_USE_S_AXI_HP1 {1}] $sys_ps7 set_property -dict [list CONFIG.PCW_USE_S_AXI_HP2 {1}] $sys_ps7 -set_property -dict [list CONFIG.PCW_EN_CLK1_PORT {1}] $sys_ps7 set_property -dict [list CONFIG.PCW_FPGA0_PERIPHERAL_FREQMHZ {100.0}] $sys_ps7 -set_property -dict [list CONFIG.PCW_FPGA1_PERIPHERAL_FREQMHZ {200.0}] $sys_ps7 set_property -dict [list CONFIG.PCW_GPIO_EMIO_GPIO_ENABLE {1}] $sys_ps7 set_property -dict [list CONFIG.PCW_GPIO_EMIO_GPIO_IO {17}] $sys_ps7 set_property -dict [list CONFIG.PCW_SPI1_PERIPHERAL_ENABLE {0}] $sys_ps7 @@ -99,7 +97,6 @@ set_property -dict [list CONFIG.C_EXT_RST_WIDTH {1}] $sys_rstgen # system reset/clock definitions ad_connect sys_cpu_clk sys_ps7/FCLK_CLK0 -ad_connect sys_200m_clk sys_ps7/FCLK_CLK1 ad_connect sys_cpu_reset sys_rstgen/peripheral_reset ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk