From 3c78d8fe584da6262e25afd04cc5d09c141ec37c Mon Sep 17 00:00:00 2001 From: Adrian Costina Date: Fri, 31 Oct 2014 14:49:29 +0200 Subject: [PATCH] ad9265_fmc: Added correct fifo to ILA. Updated interrupts --- projects/ad9265_fmc/common/ad9265_bd.tcl | 202 ++++++++++---------- projects/ad9265_fmc/zc706/system_constr.xdc | 4 - projects/ad9265_fmc/zc706/system_top.v | 19 +- 3 files changed, 123 insertions(+), 102 deletions(-) diff --git a/projects/ad9265_fmc/common/ad9265_bd.tcl b/projects/ad9265_fmc/common/ad9265_bd.tcl index f41293a91..777bd7a1a 100644 --- a/projects/ad9265_fmc/common/ad9265_bd.tcl +++ b/projects/ad9265_fmc/common/ad9265_bd.tcl @@ -1,4 +1,6 @@ +source $ad_hdl_dir/projects/common/xilinx/sys_wfifo.tcl + # ad9265 set adc_clk_in_p [create_bd_port -dir I adc_clk_in_p] @@ -17,8 +19,10 @@ set spi_sdo_o [create_bd_port -dir O spi_sdo_o] set spi_sdo_i [create_bd_port -dir I spi_sdo_i] set spi_sdi_i [create_bd_port -dir I spi_sdi_i] -set gnd [create_bd_port -dir I gnd] -set vdd [create_bd_port -dir I vdd] +# interrupts + +set ad9265_spi [create_bd_port -dir O ad9265_spi] +set ad9265_dma_irq [create_bd_port -dir O ad9265_dma_irq] # adc peripheral @@ -39,84 +43,86 @@ set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_SRC {16}] $axi_ad9265_dma set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {64}] $axi_ad9265_dma if {$sys_zynq == 1} { - set axi_ad9265_dma_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_ad9265_dma_interconnect] - set_property -dict [list CONFIG.NUM_MI {1}] $axi_ad9265_dma_interconnect + set axi_ad9265_dma_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_ad9265_dma_interconnect] + set_property -dict [list CONFIG.NUM_MI {1}] $axi_ad9265_dma_interconnect } # spi + if {$sys_zynq == 0} { - set axi_ad9265_spi [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_quad_spi:3.2 axi_ad9265_spi] - set_property -dict [list CONFIG.C_USE_STARTUP {0}] $axi_ad9265_spi - set_property -dict [list CONFIG.C_NUM_SS_BITS {2}] $axi_ad9265_spi - set_property -dict [list CONFIG.C_SCK_RATIO {8}] $axi_ad9265_spi + set axi_ad9265_spi [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_quad_spi:3.2 axi_ad9265_spi] + set_property -dict [list CONFIG.C_USE_STARTUP {0}] $axi_ad9265_spi + set_property -dict [list CONFIG.C_NUM_SS_BITS {2}] $axi_ad9265_spi + set_property -dict [list CONFIG.C_SCK_RATIO {8}] $axi_ad9265_spi } else { - set_property -dict [list CONFIG.PCW_SPI0_PERIPHERAL_ENABLE {1}] $sys_ps7 - set_property -dict [list CONFIG.PCW_SPI0_SPI0_IO {EMIO}] $sys_ps7 + set_property -dict [list CONFIG.PCW_SPI0_PERIPHERAL_ENABLE {1}] $sys_ps7 + set_property -dict [list CONFIG.PCW_SPI0_SPI0_IO {EMIO}] $sys_ps7 } # additions to default configuration + if {$sys_zynq == 0} { - set_property -dict [list CONFIG.NUM_MI {10}] $axi_cpu_interconnect + set_property -dict [list CONFIG.NUM_MI {10}] $axi_cpu_interconnect } else { - set_property -dict [list CONFIG.NUM_MI {9}] $axi_cpu_interconnect + set_property -dict [list CONFIG.NUM_MI {9}] $axi_cpu_interconnect } if {$sys_zynq == 0} { - set_property -dict [list CONFIG.NUM_PORTS {6}] $sys_concat_intc - set_property -dict [list CONFIG.NUM_SI {9}] $axi_mem_interconnect + set_property -dict [list CONFIG.NUM_SI {9}] $axi_mem_interconnect } # clock for ila + if {$sys_zynq == 1} { - set_property -dict [list CONFIG.PCW_USE_S_AXI_HP2 {1}] $sys_ps7 - set_property -dict [list CONFIG.PCW_EN_CLK2_PORT {1}] $sys_ps7 - set_property -dict [list CONFIG.PCW_EN_RST2_PORT {1}] $sys_ps7 - set_property -dict [list CONFIG.PCW_FPGA2_PERIPHERAL_FREQMHZ {125.0}] $sys_ps7 + set_property -dict [list CONFIG.PCW_USE_S_AXI_HP2 {1}] $sys_ps7 + set_property -dict [list CONFIG.PCW_EN_CLK2_PORT {1}] $sys_ps7 + set_property -dict [list CONFIG.PCW_EN_RST2_PORT {1}] $sys_ps7 + set_property -dict [list CONFIG.PCW_FPGA2_PERIPHERAL_FREQMHZ {125.0}] $sys_ps7 - set_property LEFT 31 [get_bd_ports GPIO_I] - set_property LEFT 31 [get_bd_ports GPIO_O] - set_property LEFT 31 [get_bd_ports GPIO_T] + set_property LEFT 31 [get_bd_ports GPIO_I] + set_property LEFT 31 [get_bd_ports GPIO_O] + set_property LEFT 31 [get_bd_ports GPIO_T] - set sys_ila_clk_source [get_bd_pins sys_ps7/FCLK_CLK2] + set sys_ila_clk_source [get_bd_pins sys_ps7/FCLK_CLK2] - connect_bd_net -net sys_ila_clk $sys_ila_clk_source + connect_bd_net -net sys_ila_clk $sys_ila_clk_source } else { - set ila_clkgen [create_bd_cell -type ip -vlnv xilinx.com:ip:clk_wiz:5.1 ila_clkgen] - set_property -dict [list CONFIG.PRIM_IN_FREQ {200}] $ila_clkgen - set_property -dict [list CONFIG.CLKOUT1_REQUESTED_OUT_FREQ {125}] $ila_clkgen - set_property -dict [list CONFIG.USE_LOCKED {false}] $ila_clkgen - set_property -dict [list CONFIG.USE_RESET {false}] $ila_clkgen + set ila_clkgen [create_bd_cell -type ip -vlnv xilinx.com:ip:clk_wiz:5.1 ila_clkgen] + set_property -dict [list CONFIG.PRIM_IN_FREQ {200}] $ila_clkgen + set_property -dict [list CONFIG.CLKOUT1_REQUESTED_OUT_FREQ {125}] $ila_clkgen + set_property -dict [list CONFIG.USE_LOCKED {false}] $ila_clkgen + set_property -dict [list CONFIG.USE_RESET {false}] $ila_clkgen - connect_bd_net -net sys_200m_clk [get_bd_pins ila_clkgen/clk_in1] + connect_bd_net -net sys_200m_clk [get_bd_pins ila_clkgen/clk_in1] - set sys_ila_clk_source [get_bd_pins ila_clkgen/clk_out1] - connect_bd_net -net sys_ila_clk $sys_ila_clk_source + set sys_ila_clk_source [get_bd_pins ila_clkgen/clk_out1] + connect_bd_net -net sys_ila_clk $sys_ila_clk_source } # connections (spi) -if {$sys_zynq == 0} { - connect_bd_net -net spi_csn_i [get_bd_ports spi_csn_i] [get_bd_pins axi_ad9265_spi/ss_i] - connect_bd_net -net spi_csn_o [get_bd_ports spi_csn_o] [get_bd_pins axi_ad9265_spi/ss_o] - connect_bd_net -net spi_sclk_i [get_bd_ports spi_clk_i] [get_bd_pins axi_ad9265_spi/sck_i] - connect_bd_net -net spi_sclk_o [get_bd_ports spi_clk_o] [get_bd_pins axi_ad9265_spi/sck_o] - connect_bd_net -net spi_mosi_i [get_bd_ports spi_sdo_i] [get_bd_pins axi_ad9265_spi/io0_i] - connect_bd_net -net spi_mosi_o [get_bd_ports spi_sdo_o] [get_bd_pins axi_ad9265_spi/io0_o] - connect_bd_net -net spi_miso_i [get_bd_ports spi_sdi_i] [get_bd_pins axi_ad9265_spi/io1_i] - delete_bd_objs [get_bd_nets sys_concat_intc_din_2] - delete_bd_objs [get_bd_ports unc_int2] +if {$sys_zynq == 0} { + connect_bd_net -net spi_csn_i [get_bd_ports spi_csn_i] [get_bd_pins axi_ad9265_spi/ss_i] + connect_bd_net -net spi_csn_o [get_bd_ports spi_csn_o] [get_bd_pins axi_ad9265_spi/ss_o] + connect_bd_net -net spi_sclk_i [get_bd_ports spi_clk_i] [get_bd_pins axi_ad9265_spi/sck_i] + connect_bd_net -net spi_sclk_o [get_bd_ports spi_clk_o] [get_bd_pins axi_ad9265_spi/sck_o] + connect_bd_net -net spi_mosi_i [get_bd_ports spi_sdo_i] [get_bd_pins axi_ad9265_spi/io0_i] + connect_bd_net -net spi_mosi_o [get_bd_ports spi_sdo_o] [get_bd_pins axi_ad9265_spi/io0_o] + connect_bd_net -net spi_miso_i [get_bd_ports spi_sdi_i] [get_bd_pins axi_ad9265_spi/io1_i] + } else { - connect_bd_net -net spi_csn0 [get_bd_ports spi_csn0] [get_bd_pins sys_ps7/SPI0_SS_O] - connect_bd_net -net spi_csn1 [get_bd_ports spi_csn1] [get_bd_pins sys_ps7/SPI0_SS1_O] - connect_bd_net -net spi_csn_i [get_bd_ports spi_csn_i] [get_bd_pins sys_ps7/SPI0_SS_I] - connect_bd_net -net spi_sclk_i [get_bd_ports spi_clk_i] [get_bd_pins sys_ps7/SPI0_SCLK_I] - connect_bd_net -net spi_sclk_o [get_bd_ports spi_clk_o] [get_bd_pins sys_ps7/SPI0_SCLK_O] - connect_bd_net -net spi_mosi_i [get_bd_ports spi_sdo_i] [get_bd_pins sys_ps7/SPI0_MOSI_I] - connect_bd_net -net spi_mosi_o [get_bd_ports spi_sdo_o] [get_bd_pins sys_ps7/SPI0_MOSI_O] - connect_bd_net -net spi_miso_i [get_bd_ports spi_sdi_i] [get_bd_pins sys_ps7/SPI0_MISO_I] + connect_bd_net -net spi_csn0 [get_bd_ports spi_csn0] [get_bd_pins sys_ps7/SPI0_SS_O] + connect_bd_net -net spi_csn1 [get_bd_ports spi_csn1] [get_bd_pins sys_ps7/SPI0_SS1_O] + connect_bd_net -net spi_csn_i [get_bd_ports spi_csn_i] [get_bd_pins sys_ps7/SPI0_SS_I] + connect_bd_net -net spi_sclk_i [get_bd_ports spi_clk_i] [get_bd_pins sys_ps7/SPI0_SCLK_I] + connect_bd_net -net spi_sclk_o [get_bd_ports spi_clk_o] [get_bd_pins sys_ps7/SPI0_SCLK_O] + connect_bd_net -net spi_mosi_i [get_bd_ports spi_sdo_i] [get_bd_pins sys_ps7/SPI0_MOSI_I] + connect_bd_net -net spi_mosi_o [get_bd_ports spi_sdo_o] [get_bd_pins sys_ps7/SPI0_MOSI_O] + connect_bd_net -net spi_miso_i [get_bd_ports spi_sdi_i] [get_bd_pins sys_ps7/SPI0_MISO_I] } # connections (ad9265) + connect_bd_net -net axi_ad9265_adc_clk_in_n [get_bd_ports adc_clk_in_p] [get_bd_pins axi_ad9265/adc_clk_in_p] connect_bd_net -net axi_ad9265_adc_clk_in_p [get_bd_ports adc_clk_in_n] [get_bd_pins axi_ad9265/adc_clk_in_n] connect_bd_net -net axi_ad9265_adc_data_in_n [get_bd_ports adc_data_in_n] [get_bd_pins axi_ad9265/adc_data_in_n] @@ -133,12 +139,14 @@ connect_bd_net -net axi_ad9265_dma_valid [get_bd_pins axi_ad9265/adc_valid connect_bd_net -net axi_ad9265_dma_data [get_bd_pins axi_ad9265/adc_data] [get_bd_pins axi_ad9265_dma/fifo_wr_din] connect_bd_net -net axi_ad9265_dma_dovf [get_bd_pins axi_ad9265/adc_dovf] [get_bd_pins axi_ad9265_dma/fifo_wr_overflow] -connect_bd_net -net axi_ad9265_dma_irq [get_bd_pins axi_ad9265_dma/irq] [get_bd_pins sys_concat_intc/In2] +connect_bd_net -net axi_ad9265_dma_irq [get_bd_pins axi_ad9265_dma/irq] [get_bd_ports ad9265_dma_irq] + # interconnect (cpu) -connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M07_ACLK] [get_bd_pins $sys_100m_clk_source] -connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M08_ACLK] [get_bd_pins $sys_100m_clk_source] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M07_ARESETN] [get_bd_pins $sys_100m_resetn_source] -connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M08_ARESETN] [get_bd_pins $sys_100m_resetn_source] + +connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M07_ACLK] $sys_100m_clk_source +connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M08_ACLK] $sys_100m_clk_source +connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M07_ARESETN] $sys_100m_resetn_source +connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M08_ARESETN] $sys_100m_resetn_source connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9265/s_axi_aclk] connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9265_dma/s_axi_aclk] @@ -149,71 +157,73 @@ connect_bd_intf_net -intf_net axi_cpu_interconnect_m07 [get_bd_intf_pins axi_cpu connect_bd_intf_net -intf_net axi_cpu_interconnect_m08 [get_bd_intf_pins axi_cpu_interconnect/M08_AXI] [get_bd_intf_pins axi_ad9265/s_axi] if {$sys_zynq == 0} { - connect_bd_intf_net -intf_net axi_cpu_interconnect_m09_axi [get_bd_intf_pins axi_cpu_interconnect/M09_AXI] [get_bd_intf_pins axi_ad9265_spi/axi_lite] + connect_bd_intf_net -intf_net axi_cpu_interconnect_m09_axi [get_bd_intf_pins axi_cpu_interconnect/M09_AXI] [get_bd_intf_pins axi_ad9265_spi/axi_lite] - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M09_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9265_spi/s_axi_aclk] - connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9265_spi/ext_spi_clk] - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M09_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9265_spi/s_axi_aresetn] + connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M09_ACLK] $sys_100m_clk_source + connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9265_spi/s_axi_aclk] + connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9265_spi/ext_spi_clk] + connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M09_ARESETN] $sys_100m_resetn_source + connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9265_spi/s_axi_aresetn] - connect_bd_net -net axi_ad9265_spi_irq [get_bd_pins axi_ad9265_spi/ip2intc_irpt] [get_bd_pins sys_concat_intc/In5] + connect_bd_net -net axi_ad9265_spi_irq [get_bd_pins axi_ad9265_spi/ip2intc_irpt] [get_bd_ports ad9265_spi] } # interconnect (mem/adc) -if {$sys_zynq == 0} { - connect_bd_intf_net -intf_net axi_mem_interconnect_s08_axi [get_bd_intf_pins axi_mem_interconnect/S08_AXI] [get_bd_intf_pins axi_ad9265_dma/m_dest_axi] - connect_bd_net -net sys_200m_clk [get_bd_pins axi_mem_interconnect/S08_ACLK] $sys_200m_clk_source - connect_bd_net -net sys_200m_clk [get_bd_pins axi_ad9265_dma/m_dest_axi_aclk] - connect_bd_net -net sys_200m_resetn [get_bd_pins axi_mem_interconnect/S08_ARESETN] $sys_200m_resetn_source - connect_bd_net -net sys_200m_resetn [get_bd_pins axi_ad9265_dma/m_dest_axi_aresetn] -} else { - connect_bd_intf_net -intf_net axi_ad9265_dma_interconnect_s0 [get_bd_intf_pins axi_ad9265_dma_interconnect/S00_AXI] [get_bd_intf_pins axi_ad9265_dma/m_dest_axi] - connect_bd_intf_net -intf_net axi_ad9265_dma_interconnect_m00_axi [get_bd_intf_pins axi_ad9265_dma_interconnect/M00_AXI] [get_bd_intf_pins sys_ps7/S_AXI_HP2] - connect_bd_net -net sys_200m_clk [get_bd_pins axi_ad9265_dma_interconnect/S00_ACLK] $sys_200m_clk_source - connect_bd_net -net sys_200m_clk [get_bd_pins axi_ad9265_dma/m_dest_axi_aclk] - connect_bd_net -net sys_200m_clk [get_bd_pins sys_ps7/S_AXI_HP2_ACLK] - connect_bd_net -net sys_200m_clk [get_bd_pins axi_ad9265_dma_interconnect/ACLK] $sys_200m_clk_source - connect_bd_net -net sys_200m_clk [get_bd_pins axi_ad9265_dma_interconnect/M00_ACLK] $sys_200m_clk_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9265_dma_interconnect/ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9265_dma_interconnect/M00_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9265_dma/m_dest_axi_aresetn] - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9265_dma_interconnect/S00_ARESETN] $sys_100m_resetn_source +if {$sys_zynq == 0} { + connect_bd_intf_net -intf_net axi_mem_interconnect_s08_axi [get_bd_intf_pins axi_mem_interconnect/S08_AXI] [get_bd_intf_pins axi_ad9265_dma/m_dest_axi] + connect_bd_net -net sys_200m_clk [get_bd_pins axi_mem_interconnect/S08_ACLK] $sys_200m_clk_source + connect_bd_net -net sys_200m_clk [get_bd_pins axi_ad9265_dma/m_dest_axi_aclk] + connect_bd_net -net sys_200m_resetn [get_bd_pins axi_mem_interconnect/S08_ARESETN] $sys_200m_resetn_source + connect_bd_net -net sys_200m_resetn [get_bd_pins axi_ad9265_dma/m_dest_axi_aresetn] +} else { + connect_bd_intf_net -intf_net axi_ad9265_dma_interconnect_s0 [get_bd_intf_pins axi_ad9265_dma_interconnect/S00_AXI] [get_bd_intf_pins axi_ad9265_dma/m_dest_axi] + connect_bd_intf_net -intf_net axi_ad9265_dma_interconnect_m00_axi [get_bd_intf_pins axi_ad9265_dma_interconnect/M00_AXI] [get_bd_intf_pins sys_ps7/S_AXI_HP2] + + connect_bd_net -net sys_200m_clk [get_bd_pins axi_ad9265_dma_interconnect/S00_ACLK] $sys_200m_clk_source + connect_bd_net -net sys_200m_clk [get_bd_pins axi_ad9265_dma/m_dest_axi_aclk] + connect_bd_net -net sys_200m_clk [get_bd_pins sys_ps7/S_AXI_HP2_ACLK] + connect_bd_net -net sys_200m_clk [get_bd_pins axi_ad9265_dma_interconnect/ACLK] $sys_200m_clk_source + connect_bd_net -net sys_200m_clk [get_bd_pins axi_ad9265_dma_interconnect/M00_ACLK] $sys_200m_clk_source + connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9265_dma_interconnect/ARESETN] $sys_100m_resetn_source + connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9265_dma_interconnect/M00_ARESETN] $sys_100m_resetn_source + connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9265_dma/m_dest_axi_aresetn] + connect_bd_net -net sys_100m_resetn [get_bd_pins axi_ad9265_dma_interconnect/S00_ARESETN] $sys_100m_resetn_source } # ila (with fifo to prevent timing failure) -set ila_fifo [create_bd_cell -type ip -vlnv xilinx.com:ip:fifo_generator:12.0 ila_fifo] -set_property -dict [list CONFIG.Fifo_Implementation {Independent_Clocks_Block_RAM}] $ila_fifo -set_property -dict [list CONFIG.Input_Data_Width {16}] $ila_fifo -set_property -dict [list CONFIG.Input_Depth {128}] $ila_fifo -set_property -dict [list CONFIG.Output_Data_Width {32}] $ila_fifo -set_property -dict [list CONFIG.Overflow_Flag {true}] $ila_fifo -set_property -dict [list CONFIG.Reset_Pin {false}] $ila_fifo + +p_sys_wfifo [current_bd_instance .] ila_wfifo 16 32 + +connect_bd_net -net adc_125m_clk [get_bd_pins ila_wfifo/m_clk] $adc_125m_clk_source +connect_bd_net -net sys_ila_clk [get_bd_pins ila_wfifo/s_clk] $sys_ila_clk_source +connect_bd_net -net sys_100m_resetn [get_bd_pins ila_wfifo/rstn] $sys_100m_resetn_source set ila_ad9265_mon [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:4.0 ila_ad9265_mon] -set_property -dict [list CONFIG.C_NUM_OF_PROBES {1}] $ila_ad9265_mon -set_property -dict [list CONFIG.C_PROBE0_WIDTH {32}] $ila_ad9265_mon set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_ad9265_mon +set_property -dict [list CONFIG.C_NUM_OF_PROBES {2}] $ila_ad9265_mon +set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_ad9265_mon +set_property -dict [list CONFIG.C_PROBE1_WIDTH {32}] $ila_ad9265_mon set_property -dict [list CONFIG.C_EN_STRG_QUAL {1}] $ila_ad9265_mon -connect_bd_net -net axi_ad9265_dma_data [get_bd_pins ila_fifo/din] [get_bd_pins axi_ad9265/adc_data] -connect_bd_net -net adc_125m_clk [get_bd_pins axi_ad9265/adc_clk] [get_bd_pins ila_fifo/wr_clk] -connect_bd_net -net sys_ila_clk [get_bd_pins ila_fifo/rd_clk] [get_bd_pins ila_ad9265_mon/clk] -connect_bd_net -net vdd [get_bd_pins ila_fifo/rd_en] [get_bd_pins ila_fifo/wr_en] [get_bd_ports vdd] +connect_bd_net -net axi_ad9265_dma_valid [get_bd_pins ila_wfifo/m_wr] [get_bd_pins axi_ad9265/adc_valid] +connect_bd_net -net axi_ad9265_dma_data [get_bd_pins ila_wfifo/m_wdata] [get_bd_pins axi_ad9265/adc_data] +connect_bd_net -net axi_ad9265_adc_dovf [get_bd_pins ila_wfifo/m_wovf] [get_bd_pins axi_ad9265/adc_dunf] +connect_bd_net -net ila_fifo_wr [get_bd_pins ila_wfifo/s_wr] [get_bd_pins ila_ad9265_mon/PROBE0] +connect_bd_net -net ila_fifo_wdata [get_bd_pins ila_wfifo/s_wdata] [get_bd_pins ila_ad9265_mon/PROBE1] +connect_bd_net -net sys_ila_clk [get_bd_pins ila_ad9265_mon/clk] $sys_ila_clk_source -connect_bd_net -net ila_fifo_dout [get_bd_pins ila_fifo/dout] [get_bd_pins ila_ad9265_mon/probe0] # address mapping create_bd_addr_seg -range 0x00010000 -offset 0x44A00000 $sys_addr_cntrl_space [get_bd_addr_segs axi_ad9265/s_axi/axi_lite] SEG_data_ad9265_core create_bd_addr_seg -range 0x00010000 -offset 0x44A30000 $sys_addr_cntrl_space [get_bd_addr_segs axi_ad9265_dma/s_axi/axi_lite] SEG_data_ad9265_dma if {$sys_zynq == 0} { - create_bd_addr_seg -range 0x00010000 -offset 0x44A70000 $sys_addr_cntrl_space [get_bd_addr_segs axi_ad9265_spi/axi_lite/Reg] SEG_data_ad9265_spi + create_bd_addr_seg -range 0x00010000 -offset 0x44A70000 $sys_addr_cntrl_space [get_bd_addr_segs axi_ad9265_spi/axi_lite/Reg] SEG_data_ad9265_spi } if {$sys_zynq == 0} { - create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_ad9265_dma/m_dest_axi] [get_bd_addr_segs axi_ddr_cntrl/memmap/memaddr] SEG_axi_ddr_cntrl + create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_ad9265_dma/m_dest_axi] [get_bd_addr_segs axi_ddr_cntrl/memmap/memaddr] SEG_axi_ddr_cntrl } else { - create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_ad9265_dma/m_dest_axi] [get_bd_addr_segs sys_ps7/S_AXI_HP2/HP2_DDR_LOWOCM] SEG_sys_ps7_hp2_ddr_lowocm + create_bd_addr_seg -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces axi_ad9265_dma/m_dest_axi] [get_bd_addr_segs sys_ps7/S_AXI_HP2/HP2_DDR_LOWOCM] SEG_sys_ps7_hp2_ddr_lowocm } diff --git a/projects/ad9265_fmc/zc706/system_constr.xdc b/projects/ad9265_fmc/zc706/system_constr.xdc index 161609b48..8cea99125 100644 --- a/projects/ad9265_fmc/zc706/system_constr.xdc +++ b/projects/ad9265_fmc/zc706/system_constr.xdc @@ -31,7 +31,3 @@ set_property -dict {PACKAGE_PIN Y26 IOSTANDARD LVCMOS25} [get_ports spi_sdio # clocks create_clock -name adc_clk -period 3.33 [get_ports adc_clk_in_p] -create_clock -name ila_clk -period 8.00 [get_pins i_system_wrapper/system_i/sys_ps7/FCLK_CLK2] - -set_clock_groups -asynchronous -group {adc_clk} -set_clock_groups -asynchronous -group {ila_clk} \ No newline at end of file diff --git a/projects/ad9265_fmc/zc706/system_top.v b/projects/ad9265_fmc/zc706/system_top.v index 464bf8994..4b01ddea5 100644 --- a/projects/ad9265_fmc/zc706/system_top.v +++ b/projects/ad9265_fmc/zc706/system_top.v @@ -143,6 +143,7 @@ wire spi_mosi; wire [14:0] gpio_i; wire [14:0] gpio_o; wire [14:0] gpio_t; +wire [15:0] ps_intrs; // instantiations @@ -195,9 +196,23 @@ system_wrapper i_system_wrapper ( .hdmi_vsync (hdmi_vsync), .iic_main_scl_io (iic_scl), .iic_main_sda_io (iic_sda), + .ps_intr_0 (ps_intrs[0]), + .ps_intr_1 (ps_intrs[1]), + .ps_intr_10 (ps_intrs[10]), + .ps_intr_11 (ps_intrs[11]), + .ps_intr_12 (ps_intrs[12]), + .ps_intr_13 (ps_intrs[13]), + .ps_intr_2 (ps_intrs[2]), + .ps_intr_3 (ps_intrs[3]), + .ps_intr_4 (ps_intrs[4]), + .ps_intr_5 (ps_intrs[5]), + .ps_intr_6 (ps_intrs[6]), + .ps_intr_7 (ps_intrs[7]), + .ps_intr_8 (ps_intrs[8]), + .ps_intr_9 (ps_intrs[9]), + .ad9265_spi (ps_intrs[2]), + .ad9265_dma_irq (ps_intrs[12]), .spdif (spdif), - .vdd(1'b1), - .gnd(1'b0), .adc_clk_in_n(adc_clk_in_n), .adc_clk_in_p(adc_clk_in_p), .adc_data_in_n(adc_data_in_n),