diff --git a/projects/fmcjesdadc1/a5gt/system_bd.qsys b/projects/fmcjesdadc1/a5gt/system_bd.qsys
index ce933302a..fa7810f69 100644
--- a/projects/fmcjesdadc1/a5gt/system_bd.qsys
+++ b/projects/fmcjesdadc1/a5gt/system_bd.qsys
@@ -17,103 +17,67 @@
type = "String";
}
}
- element axi_ad9250_0
+ element a5gt_base
{
datum _sortIndex
{
- value = "19";
+ value = "1";
type = "int";
}
- datum sopceditor_expanded
- {
- value = "1";
- type = "boolean";
- }
}
- element axi_ad9250_0.s_axi
+ element a5gt_base.sys_mem_interconnect_s0
{
datum baseAddress
{
- value = "272695296";
+ value = "0";
type = "String";
}
}
- element axi_ad9250_1
+ element fmcjesdadc1
{
datum _sortIndex
{
- value = "16";
+ value = "2";
type = "int";
}
- datum sopceditor_expanded
- {
- value = "1";
- type = "boolean";
- }
}
- element axi_ad9250_1.s_axi
+ element fmcjesdadc1.axi_ad9250_0_s_axi
{
datum baseAddress
{
- value = "272760832";
+ value = "131072";
type = "String";
}
}
- element axi_dmac_0
- {
- datum _sortIndex
- {
- value = "17";
- type = "int";
- }
- datum sopceditor_expanded
- {
- value = "1";
- type = "boolean";
- }
- }
- element axi_dmac_0.s_axi
+ element fmcjesdadc1.axi_ad9250_1_s_axi
{
datum baseAddress
{
- value = "272842752";
+ value = "65536";
type = "String";
}
}
- element axi_dmac_1
- {
- datum _sortIndex
- {
- value = "14";
- type = "int";
- }
- datum sopceditor_expanded
- {
- value = "1";
- type = "boolean";
- }
- }
- element axi_dmac_1.s_axi
+ element fmcjesdadc1.axi_dmac_0_s_axi
{
datum baseAddress
{
- value = "272826368";
+ value = "212992";
type = "String";
}
}
- element axi_jesd_xcvr
- {
- datum _sortIndex
- {
- value = "21";
- type = "int";
- }
- }
- element axi_jesd_xcvr.s_axi
+ element fmcjesdadc1.axi_dmac_1_s_axi
{
datum baseAddress
{
- value = "272629760";
+ value = "196608";
+ type = "String";
+ }
+ }
+ element fmcjesdadc1.axi_jesd_xcvr_s_axi
+ {
+ datum baseAddress
+ {
+ value = "0";
type = "String";
}
}
@@ -125,287 +89,11 @@
type = "int";
}
}
- element sys_cpu
+ element system_bd
{
- datum _sortIndex
+ datum _originalDeviceFamily
{
- value = "2";
- type = "int";
- }
- datum sopceditor_expanded
- {
- value = "1";
- type = "boolean";
- }
- }
- element sys_cpu.debug_mem_slave
- {
- datum baseAddress
- {
- value = "272869376";
- type = "String";
- }
- }
- element sys_ddr3_cntrl
- {
- datum _sortIndex
- {
- value = "4";
- type = "int";
- }
- datum sopceditor_expanded
- {
- value = "1";
- type = "boolean";
- }
- }
- element sys_ddr3_cntrl.avl
- {
- datum _lockedAddress
- {
- value = "0";
- type = "boolean";
- }
- datum baseAddress
- {
- value = "0";
- type = "String";
- }
- }
- element sys_ethernet
- {
- datum _sortIndex
- {
- value = "5";
- type = "int";
- }
- datum sopceditor_expanded
- {
- value = "1";
- type = "boolean";
- }
- }
- element sys_ethernet.control_port
- {
- datum baseAddress
- {
- value = "272871424";
- type = "String";
- }
- }
- element sys_ethernet_dma_rx
- {
- datum _sortIndex
- {
- value = "6";
- type = "int";
- }
- }
- element sys_ethernet_dma_rx.csr
- {
- datum baseAddress
- {
- value = "272872576";
- type = "String";
- }
- }
- element sys_ethernet_dma_rx.descriptor_slave
- {
- datum baseAddress
- {
- value = "272872544";
- type = "String";
- }
- }
- element sys_ethernet_dma_rx.response
- {
- datum baseAddress
- {
- value = "272872672";
- type = "String";
- }
- }
- element sys_ethernet_dma_tx
- {
- datum _sortIndex
- {
- value = "7";
- type = "int";
- }
- }
- element sys_ethernet_dma_tx.csr
- {
- datum baseAddress
- {
- value = "272872608";
- type = "String";
- }
- }
- element sys_ethernet_dma_tx.descriptor_slave
- {
- datum baseAddress
- {
- value = "272872512";
- type = "String";
- }
- }
- element sys_gpio
- {
- datum _sortIndex
- {
- value = "12";
- type = "int";
- }
- datum sopceditor_expanded
- {
- value = "1";
- type = "boolean";
- }
- }
- element sys_gpio.s1
- {
- datum baseAddress
- {
- value = "272872656";
- type = "String";
- }
- }
- element sys_gpio_bd
- {
- datum _sortIndex
- {
- value = "11";
- type = "int";
- }
- }
- element sys_gpio_bd.s1
- {
- datum baseAddress
- {
- value = "272872640";
- type = "String";
- }
- }
- element sys_id
- {
- datum _sortIndex
- {
- value = "10";
- type = "int";
- }
- datum sopceditor_expanded
- {
- value = "1";
- type = "boolean";
- }
- }
- element sys_id.control_slave
- {
- datum baseAddress
- {
- value = "272872680";
- type = "String";
- }
- }
- element sys_int_mem
- {
- datum _sortIndex
- {
- value = "3";
- type = "int";
- }
- datum sopceditor_expanded
- {
- value = "1";
- type = "boolean";
- }
- }
- element sys_int_mem.s1
- {
- datum _lockedAddress
- {
- value = "0";
- type = "boolean";
- }
- datum baseAddress
- {
- value = "270532608";
- type = "String";
- }
- }
- element sys_pll
- {
- datum _sortIndex
- {
- value = "1";
- type = "int";
- }
- datum sopceditor_expanded
- {
- value = "1";
- type = "boolean";
- }
- }
- element sys_spi
- {
- datum _sortIndex
- {
- value = "13";
- type = "int";
- }
- datum sopceditor_expanded
- {
- value = "1";
- type = "boolean";
- }
- }
- element sys_spi.spi_control_port
- {
- datum baseAddress
- {
- value = "272872448";
- type = "String";
- }
- }
- element sys_timer
- {
- datum _sortIndex
- {
- value = "9";
- type = "int";
- }
- datum sopceditor_expanded
- {
- value = "1";
- type = "boolean";
- }
- }
- element sys_timer.s1
- {
- datum baseAddress
- {
- value = "272872480";
- type = "String";
- }
- }
- element sys_uart
- {
- datum _sortIndex
- {
- value = "8";
- type = "int";
- }
- datum sopceditor_expanded
- {
- value = "1";
- type = "boolean";
- }
- }
- element sys_uart.avalon_jtag_slave
- {
- datum baseAddress
- {
- value = "272872688";
+ value = "Arria V";
type = "String";
}
}
@@ -481,30 +169,6 @@
type = "String";
}
}
- element util_bsplit
- {
- datum _sortIndex
- {
- value = "20";
- type = "int";
- }
- }
- element util_cpack_0
- {
- datum _sortIndex
- {
- value = "18";
- type = "int";
- }
- }
- element util_cpack_1
- {
- datum _sortIndex
- {
- value = "15";
- type = "int";
- }
- }
}
]]>
@@ -526,162 +190,142 @@
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+ $${FILENAME}_a5gt_base
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+ $${FILENAME}_fmcjesdadc1
@@ -689,958 +333,11 @@
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- sys_cpu.jtag_debug_module
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- ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 1 HARDCOPY 0 HAS_18_BIT_MULTS 1 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 1 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 1 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 1 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 1 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 0 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 1 M144K_MEMORY 1 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 1 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 1 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 1 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 1 TRANSCEIVER_6G_BLOCK 1 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1
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- $${FILENAME}_sys_int_mem
-
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-
- ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 1 HARDCOPY 0 HAS_18_BIT_MULTS 1 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 1 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 1 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 1 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 1 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 1 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 0 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 1 M10K_MEMORY 1 M144K_MEMORY 1 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 1 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 1 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 1 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 1 TRANSCEIVER_6G_BLOCK 1 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 1 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1
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- Create an adjpllin signal to connect with an upstream PLL
-
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- Automatic Switchover
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- NO_INTERACTIVE_WINDOWS
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+ start="fmcjesdadc1.axi_dmac_0_m_axi"
+ end="a5gt_base.sys_mem_interconnect_s0">
@@ -1648,170 +345,8 @@
-
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+ start="fmcjesdadc1.axi_dmac_1_m_axi"
+ end="a5gt_base.sys_mem_interconnect_s0">
@@ -1819,592 +354,92 @@
+ start="a5gt_base.sys_cpu_interconnect_m0"
+ end="fmcjesdadc1.axi_ad9250_0_s_axi">
-
+
+ start="a5gt_base.sys_cpu_interconnect_m0"
+ end="fmcjesdadc1.axi_ad9250_1_s_axi">
-
+
+ start="a5gt_base.sys_cpu_interconnect_m0"
+ end="fmcjesdadc1.axi_dmac_0_s_axi">
+
+
+
+
+
+
+
+
+
+
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+ start="sys_clk.clk"
+ end="a5gt_base.sys_clk" />
+ end="fmcjesdadc1.sys_clk" />
-
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+ start="a5gt_base.mem_clk"
+ end="fmcjesdadc1.mem_clk" />
-
-
-
+ start="a5gt_base.sys_intr"
+ end="fmcjesdadc1.axi_dmac_0_intr">
-
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+ start="a5gt_base.sys_intr"
+ end="fmcjesdadc1.axi_dmac_1_intr">
+
-
+ start="sys_clk.clk_reset"
+ end="a5gt_base.sys_rst" />
+ end="fmcjesdadc1.sys_rst" />
-
-
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+ start="a5gt_base.mem_rst"
+ end="fmcjesdadc1.mem_rst" />
diff --git a/projects/fmcjesdadc1/a5gt/system_constr.sdc b/projects/fmcjesdadc1/a5gt/system_constr.sdc
index 10e084507..9a557c5e2 100644
--- a/projects/fmcjesdadc1/a5gt/system_constr.sdc
+++ b/projects/fmcjesdadc1/a5gt/system_constr.sdc
@@ -7,10 +7,8 @@ derive_pll_clocks
derive_clock_uncertainty
set_clock_groups -exclusive \
- -group [get_clocks {i_system_bd|sys_pll|altera_pll_i|general[0].gpll~PLL_OUTPUT_COUNTER|divclk}] \
- -group [get_clocks {i_system_bd|sys_pll|altera_pll_i|general[1].gpll~PLL_OUTPUT_COUNTER|divclk}] \
- -group [get_clocks {i_system_bd|sys_pll|altera_pll_i|general[2].gpll~PLL_OUTPUT_COUNTER|divclk}] \
+ -group [get_clocks {i_system_bd|a5gt_base|sys_pll|altera_pll_i|general[0].gpll~PLL_OUTPUT_COUNTER|divclk}] \
+ -group [get_clocks {i_system_bd|a5gt_base|sys_pll|altera_pll_i|general[1].gpll~PLL_OUTPUT_COUNTER|divclk}] \
+ -group [get_clocks {i_system_bd|a5gt_base|sys_pll|altera_pll_i|general[2].gpll~PLL_OUTPUT_COUNTER|divclk}] \
-set_false_path -from [get_registers *dev_sync_n*] -to [get_registers *rx_sync_m1*]
-set_false_path -from [get_registers *rx_sysref*] -to [get_registers *sys_xcvr*sysref*]
diff --git a/projects/fmcjesdadc1/a5gt/system_project.tcl b/projects/fmcjesdadc1/a5gt/system_project.tcl
index 36a13df46..fccef9318 100755
--- a/projects/fmcjesdadc1/a5gt/system_project.tcl
+++ b/projects/fmcjesdadc1/a5gt/system_project.tcl
@@ -5,13 +5,16 @@ source ../../scripts/adi_env.tcl
project_new fmcjesdadc1_a5gt -overwrite
source $ad_hdl_dir/projects/common/a5gt/a5gt_system_assign.tcl
+file copy -force $ad_hdl_dir/projects/common/a5gt/a5gt_system_bd.qsys .
+file copy -force $ad_hdl_dir/projects/fmcjesdadc1/common/fmcjesdadc1_bd.qsys .
+set_global_assignment -name QSYS_FILE system_bd.qsys
set_global_assignment -name VERILOG_FILE $ad_hdl_dir/library/common/ad_iobuf.v
set_global_assignment -name VERILOG_FILE ../common/fmcjesdadc1_spi.v
-set_global_assignment -name VERILOG_FILE ../common/sys_xcvr.v
-set_global_assignment -name QSYS_FILE sys_xcvr_rstcntrl_rx_pll.qsys
-set_global_assignment -name QSYS_FILE sys_xcvr_core.qsys
-set_global_assignment -name QSYS_FILE sys_xcvr_rx_ip.qsys
+set_global_assignment -name VERILOG_FILE system_top.v
+
+set_global_assignment -name SDC_FILE system_constr.sdc
+set_global_assignment -name TOP_LEVEL_ENTITY system_top
# reference clock
diff --git a/projects/fmcjesdadc1/a5gt/system_top.v b/projects/fmcjesdadc1/a5gt/system_top.v
index 00ce6e585..b714fc863 100644
--- a/projects/fmcjesdadc1/a5gt/system_top.v
+++ b/projects/fmcjesdadc1/a5gt/system_top.v
@@ -213,55 +213,54 @@ module system_top (
.dataout (eth_tx_clk_out));
system_bd i_system_bd (
- .rx_data_rx_d (rx_data),
+ .a5gt_base_sys_ddr3_oct_rzqin (ddr3_rzq),
+ .a5gt_base_sys_ddr3_phy_mem_a (ddr3_a),
+ .a5gt_base_sys_ddr3_phy_mem_ba (ddr3_ba),
+ .a5gt_base_sys_ddr3_phy_mem_ck (ddr3_clk_p),
+ .a5gt_base_sys_ddr3_phy_mem_ck_n (ddr3_clk_n),
+ .a5gt_base_sys_ddr3_phy_mem_cke (ddr3_cke),
+ .a5gt_base_sys_ddr3_phy_mem_cs_n (ddr3_cs_n),
+ .a5gt_base_sys_ddr3_phy_mem_dm (ddr3_dm),
+ .a5gt_base_sys_ddr3_phy_mem_ras_n (ddr3_ras_n),
+ .a5gt_base_sys_ddr3_phy_mem_cas_n (ddr3_cas_n),
+ .a5gt_base_sys_ddr3_phy_mem_we_n (ddr3_we_n),
+ .a5gt_base_sys_ddr3_phy_mem_reset_n (ddr3_reset_n),
+ .a5gt_base_sys_ddr3_phy_mem_dq (ddr3_dq),
+ .a5gt_base_sys_ddr3_phy_mem_dqs (ddr3_dqs_p),
+ .a5gt_base_sys_ddr3_phy_mem_dqs_n (ddr3_dqs_n),
+ .a5gt_base_sys_ddr3_phy_mem_odt (ddr3_odt),
+ .a5gt_base_sys_125m_clk_clk (sys_125m_clk),
+ .a5gt_base_sys_25m_clk_clk (sys_25m_clk),
+ .a5gt_base_sys_2m5_clk_clk (sys_2m5_clk),
+ .a5gt_base_sys_ethernet_mdio_mdc (eth_mdc),
+ .a5gt_base_sys_ethernet_mdio_mdio_in (eth_mdio_i),
+ .a5gt_base_sys_ethernet_mdio_mdio_out (eth_mdio_o),
+ .a5gt_base_sys_ethernet_mdio_mdio_oen (eth_mdio_t),
+ .a5gt_base_sys_ethernet_rgmii_rgmii_in (eth_rx_data),
+ .a5gt_base_sys_ethernet_rgmii_rgmii_out (eth_tx_data),
+ .a5gt_base_sys_ethernet_rgmii_rx_control (eth_rx_cntrl),
+ .a5gt_base_sys_ethernet_rgmii_tx_control (eth_tx_cntrl),
+ .a5gt_base_sys_ethernet_rx_clk_clk (eth_rx_clk),
+ .a5gt_base_sys_ethernet_status_set_10 (),
+ .a5gt_base_sys_ethernet_status_set_1000 (),
+ .a5gt_base_sys_ethernet_status_eth_mode (eth_tx_mode_1g),
+ .a5gt_base_sys_ethernet_status_ena_10 (eth_tx_mode_10m_100m_n),
+ .a5gt_base_sys_ethernet_tx_clk_clk (eth_tx_clk),
+ .a5gt_base_sys_gpio_in_port (gpio_i[63:32]),
+ .a5gt_base_sys_gpio_out_port (gpio_o[63:32]),
+ .a5gt_base_sys_gpio_bd_in_port (gpio_i[31:0]),
+ .a5gt_base_sys_gpio_bd_out_port (gpio_o[31:0]),
+ .a5gt_base_sys_pll_locked_export (sys_pll_locked),
+ .a5gt_base_sys_spi_MISO (spi_miso),
+ .a5gt_base_sys_spi_MOSI (spi_mosi),
+ .a5gt_base_sys_spi_SCLK (spi_clk),
+ .a5gt_base_sys_spi_SS_n (spi_csn),
+ .rx_data_rx_serial_data (rx_data),
.rx_ref_clk_clk (ref_clk),
.rx_sync_rx_sync (rx_sync),
.rx_sysref_rx_ext_sysref_out (rx_sysref),
- .sys_125m_clk_clk (sys_125m_clk),
- .sys_25m_clk_clk (sys_25m_clk),
- .sys_2m5_clk_clk (sys_2m5_clk),
.sys_clk_clk (sys_clk),
- .sys_ddr3_oct_rzqin (ddr3_rzq),
- .sys_ddr3_phy_mem_a (ddr3_a),
- .sys_ddr3_phy_mem_ba (ddr3_ba),
- .sys_ddr3_phy_mem_ck (ddr3_clk_p),
- .sys_ddr3_phy_mem_ck_n (ddr3_clk_n),
- .sys_ddr3_phy_mem_cke (ddr3_cke),
- .sys_ddr3_phy_mem_cs_n (ddr3_cs_n),
- .sys_ddr3_phy_mem_dm (ddr3_dm),
- .sys_ddr3_phy_mem_ras_n (ddr3_ras_n),
- .sys_ddr3_phy_mem_cas_n (ddr3_cas_n),
- .sys_ddr3_phy_mem_we_n (ddr3_we_n),
- .sys_ddr3_phy_mem_reset_n (ddr3_reset_n),
- .sys_ddr3_phy_mem_dq (ddr3_dq),
- .sys_ddr3_phy_mem_dqs (ddr3_dqs_p),
- .sys_ddr3_phy_mem_dqs_n (ddr3_dqs_n),
- .sys_ddr3_phy_mem_odt (ddr3_odt),
- .sys_ethernet_mdio_mdc (eth_mdc),
- .sys_ethernet_mdio_mdio_in (eth_mdio_i),
- .sys_ethernet_mdio_mdio_out (eth_mdio_o),
- .sys_ethernet_mdio_mdio_oen (eth_mdio_t),
- .sys_ethernet_rgmii_rgmii_in (eth_rx_data),
- .sys_ethernet_rgmii_rgmii_out (eth_tx_data),
- .sys_ethernet_rgmii_rx_control (eth_rx_cntrl),
- .sys_ethernet_rgmii_tx_control (eth_tx_cntrl),
- .sys_ethernet_rx_clk_clk (eth_rx_clk),
- .sys_ethernet_status_set_10 (),
- .sys_ethernet_status_set_1000 (),
- .sys_ethernet_status_eth_mode (eth_tx_mode_1g),
- .sys_ethernet_status_ena_10 (eth_tx_mode_10m_100m_n),
- .sys_ethernet_tx_clk_clk (eth_tx_clk),
- .sys_gpio_in_port (gpio_i[63:32]),
- .sys_gpio_out_port (gpio_o[63:32]),
- .sys_gpio_bd_in_port (gpio_i[31:0]),
- .sys_gpio_bd_out_port (gpio_o[31:0]),
- .sys_pll_locked_export (sys_pll_locked),
- .sys_reset_reset_n (sys_resetn),
- .sys_spi_MISO (spi_miso),
- .sys_spi_MOSI (spi_mosi),
- .sys_spi_SCLK (spi_clk),
- .sys_spi_SS_n (spi_csn),
- .tx_ref_clk_clk (1'd0));
+ .sys_reset_reset_n (sys_resetn));
endmodule