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util_axis_fifo: Fix reset signal 

Some of the synchronizers were using the wrong reset signal, fix this.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
main
Lars-Peter Clausen 2015-04-15 14:25:45 +02:00
parent 762fa3290b
commit 4062aa2860
2 changed files with 3 additions and 3 deletions
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2
library/util_axis_fifo/address_gray_pipelined.v
View File

@ -140,7 +140,7 @@ end
always @(posedge m_axis_aclk)
begin
if (s_axis_aresetn == 1'b0) begin
if (m_axis_aresetn == 1'b0) begin
m_axis_valid <= 1'b0;
m_axis_level <= 'h00;
end else begin

4
library/util_axis_fifo/util_axis_fifo.v
View File

@ -72,7 +72,7 @@ sync_bits #(
.CLK_ASYNC(C_CLKS_ASYNC)
) i_waddr_sync (
.out_clk(m_axis_aclk),
.out_resetn(s_axis_aresetn),
.out_resetn(m_axis_aresetn),
.in(s_axis_waddr),
.out(m_axis_waddr)
);
@ -82,7 +82,7 @@ sync_bits #(
.CLK_ASYNC(C_CLKS_ASYNC)
) i_raddr_sync (
.out_clk(s_axis_aclk),
.out_resetn(m_axis_aresetn),
.out_resetn(s_axis_aresetn),
.in(m_axis_raddr),
.out(s_axis_raddr)
);