diff --git a/library/util_axis_fifo/address_gray_pipelined.v b/library/util_axis_fifo/address_gray_pipelined.v
index a4e3e90ca..7637943e0 100644
--- a/library/util_axis_fifo/address_gray_pipelined.v
+++ b/library/util_axis_fifo/address_gray_pipelined.v
@@ -140,7 +140,7 @@ end
 
 always @(posedge m_axis_aclk)
 begin
-	if (s_axis_aresetn == 1'b0) begin
+	if (m_axis_aresetn == 1'b0) begin
 		m_axis_valid <= 1'b0;
 		m_axis_level <= 'h00;
 	end else begin
diff --git a/library/util_axis_fifo/util_axis_fifo.v b/library/util_axis_fifo/util_axis_fifo.v
index 5590dccd2..a991df16b 100644
--- a/library/util_axis_fifo/util_axis_fifo.v
+++ b/library/util_axis_fifo/util_axis_fifo.v
@@ -72,7 +72,7 @@ sync_bits #(
 	.CLK_ASYNC(C_CLKS_ASYNC)
 ) i_waddr_sync (
 	.out_clk(m_axis_aclk),
-	.out_resetn(s_axis_aresetn),
+	.out_resetn(m_axis_aresetn),
 	.in(s_axis_waddr),
 	.out(m_axis_waddr)
 );
@@ -82,7 +82,7 @@ sync_bits #(
 	.CLK_ASYNC(C_CLKS_ASYNC)
 ) i_raddr_sync (
 	.out_clk(s_axis_aclk),
-	.out_resetn(m_axis_aresetn),
+	.out_resetn(s_axis_aresetn),
 	.in(m_axis_raddr),
 	.out(s_axis_raddr)
 );