From 43673f6b9d916fa11db27b46f101dc262750b0e7 Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Mon, 23 Mar 2015 12:45:34 +0200 Subject: [PATCH] imageon_zc706: Update the project to the new framework --- projects/imageon/common/imageon_bd.tcl | 255 ++++++++-------------- projects/imageon/zc706/system_constr.xdc | 4 +- projects/imageon/zc706/system_project.tcl | 1 + projects/imageon/zc706/system_top.v | 191 ++++++++-------- 4 files changed, 198 insertions(+), 253 deletions(-) diff --git a/projects/imageon/common/imageon_bd.tcl b/projects/imageon/common/imageon_bd.tcl index 3cb98e141..9a2470ec6 100644 --- a/projects/imageon/common/imageon_bd.tcl +++ b/projects/imageon/common/imageon_bd.tcl @@ -1,196 +1,133 @@ - # adv7511 +# adv7511 - set fmc_hdmi_rx_clk [create_bd_port -dir I fmc_hdmi_rx_clk] - set fmc_hdmi_rx_data [create_bd_port -dir I -from 15 -to 0 fmc_hdmi_rx_data] +create_bd_port -dir I fmc_hdmi_rx_clk +create_bd_port -dir I -from 15 -to 0 fmc_hdmi_rx_data - # adv7611 +# adv7611 - set fmc_hdmi_tx_clk [create_bd_port -dir O fmc_hdmi_tx_clk] - set fmc_hdmi_tx_spdif [create_bd_port -dir O fmc_hdmi_tx_spdif] - set fmc_hdmi_tx_data [create_bd_port -dir O -from 15 -to 0 fmc_hdmi_tx_data] +create_bd_port -dir O fmc_hdmi_tx_clk +create_bd_port -dir O fmc_hdmi_tx_spdif +create_bd_port -dir O -from 15 -to 0 fmc_hdmi_tx_data - # hdmi interrupt +# iic interface - set fmc_hdmi_tx_dma_intr [create_bd_port -dir O fmc_hdmi_tx_dma_intr] - set fmc_hdmi_rx_dma_intr [create_bd_port -dir O fmc_hdmi_rx_dma_intr] - set fmc_hdmi_iic_intr [create_bd_port -dir O fmc_hdmi_iic_intr] +create_bd_intf_port -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 iic_fmc - # iic interface +# fmc hdmi peripherals - set IIC_FMC [create_bd_intf_port -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 IIC_FMC] - set fmc_iic_rstn [create_bd_port -dir O fmc_iic_rstn] +set fmc_hdmi_clkgen [create_bd_cell -type ip -vlnv analog.com:user:axi_clkgen:1.0 fmc_hdmi_clkgen] - # fmc hdmi peripherals +set fmc_hdmi_tx_core [create_bd_cell -type ip -vlnv analog.com:user:axi_hdmi_tx:1.0 fmc_hdmi_tx_core] +set_property -dict [list CONFIG.PCORE_EMBEDDED_SYNC {1}] $fmc_hdmi_tx_core - set fmc_hdmi_tx_core [create_bd_cell -type ip -vlnv analog.com:user:axi_hdmi_tx:1.0 fmc_hdmi_tx_core] - set fmc_hdmi_rx_core [create_bd_cell -type ip -vlnv analog.com:user:axi_hdmi_rx:1.0 fmc_hdmi_rx_core] +set fmc_hdmi_rx_core [create_bd_cell -type ip -vlnv analog.com:user:axi_hdmi_rx:1.0 fmc_hdmi_rx_core] - set fmc_hdmi_tx_dma [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_vdma:6.2 fmc_hdmi_tx_dma] - set_property -dict [list CONFIG.c_m_axis_mm2s_tdata_width {64}] $fmc_hdmi_tx_dma - set_property -dict [list CONFIG.c_use_mm2s_fsync {1}] $fmc_hdmi_tx_dma - set_property -dict [list CONFIG.c_include_s2mm {0}] $fmc_hdmi_tx_dma +set fmc_hdmi_tx_dma [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_vdma:6.2 fmc_hdmi_tx_dma] +set_property -dict [list CONFIG.c_m_axis_mm2s_tdata_width {64}] $fmc_hdmi_tx_dma +set_property -dict [list CONFIG.c_use_mm2s_fsync {1}] $fmc_hdmi_tx_dma +set_property -dict [list CONFIG.c_include_s2mm {0}] $fmc_hdmi_tx_dma - set fmc_hdmi_rx_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 fmc_hdmi_rx_dma] - set_property -dict [list CONFIG.C_DMA_TYPE_SRC {2}] $fmc_hdmi_rx_dma - set_property -dict [list CONFIG.C_DMA_TYPE_DEST {0}] $fmc_hdmi_rx_dma - set_property -dict [list CONFIG.C_CYCLIC {0}] $fmc_hdmi_rx_dma - set_property -dict [list CONFIG.C_SYNC_TRANSFER_START {0}] $fmc_hdmi_rx_dma - set_property -dict [list CONFIG.C_AXI_SLICE_SRC {1}] $fmc_hdmi_rx_dma - set_property -dict [list CONFIG.C_AXI_SLICE_DEST {0}] $fmc_hdmi_rx_dma - set_property -dict [list CONFIG.C_CLKS_ASYNC_DEST_REQ {0}] $fmc_hdmi_rx_dma - set_property -dict [list CONFIG.C_CLKS_ASYNC_SRC_DEST {1}] $fmc_hdmi_rx_dma - set_property -dict [list CONFIG.C_CLKS_ASYNC_REQ_SRC {1}] $fmc_hdmi_rx_dma - set_property -dict [list CONFIG.C_2D_TRANSFER {1}] $fmc_hdmi_rx_dma - set_property -dict [list CONFIG.C_SYNC_TRANSFER_START {1}] $fmc_hdmi_rx_dma - set_property -dict [list CONFIG.C_DMA_LENGTH_WIDTH {14}] $fmc_hdmi_rx_dma - set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_SRC {64}] $fmc_hdmi_rx_dma - set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {64}] $fmc_hdmi_rx_dma +set fmc_hdmi_rx_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 fmc_hdmi_rx_dma] +set_property -dict [list CONFIG.C_DMA_TYPE_SRC {2}] $fmc_hdmi_rx_dma +set_property -dict [list CONFIG.C_DMA_TYPE_DEST {0}] $fmc_hdmi_rx_dma +set_property -dict [list CONFIG.C_CYCLIC {0}] $fmc_hdmi_rx_dma +set_property -dict [list CONFIG.C_SYNC_TRANSFER_START {0}] $fmc_hdmi_rx_dma +set_property -dict [list CONFIG.C_AXI_SLICE_SRC {1}] $fmc_hdmi_rx_dma +set_property -dict [list CONFIG.C_AXI_SLICE_DEST {0}] $fmc_hdmi_rx_dma +set_property -dict [list CONFIG.C_CLKS_ASYNC_DEST_REQ {0}] $fmc_hdmi_rx_dma +set_property -dict [list CONFIG.C_CLKS_ASYNC_SRC_DEST {1}] $fmc_hdmi_rx_dma +set_property -dict [list CONFIG.C_CLKS_ASYNC_REQ_SRC {1}] $fmc_hdmi_rx_dma +set_property -dict [list CONFIG.C_2D_TRANSFER {1}] $fmc_hdmi_rx_dma +set_property -dict [list CONFIG.C_SYNC_TRANSFER_START {1}] $fmc_hdmi_rx_dma +set_property -dict [list CONFIG.C_DMA_LENGTH_WIDTH {14}] $fmc_hdmi_rx_dma +set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_SRC {64}] $fmc_hdmi_rx_dma +set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {64}] $fmc_hdmi_rx_dma - set fmc_hdmi_tx_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 fmc_hdmi_tx_interconnect] - set_property -dict [list CONFIG.NUM_MI {1}] $fmc_hdmi_tx_interconnect +set fmc_spdif_tx_core [create_bd_cell -type ip -vlnv analog.com:user:axi_spdif_tx:1.0 fmc_spdif_tx_core] +set_property -dict [list CONFIG.C_DMA_TYPE {1}] $fmc_spdif_tx_core +set_property -dict [list CONFIG.C_S_AXI_ADDR_WIDTH {16}] $fmc_spdif_tx_core - set fmc_hdmi_rx_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 fmc_hdmi_rx_interconnect] - set_property -dict [list CONFIG.NUM_MI {1}] $fmc_hdmi_rx_interconnect +set axi_iic_fmc [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_iic:2.0 axi_iic_fmc] +set_property -dict [list CONFIG.USE_BOARD_FLOW {true}] $axi_iic_fmc +set_property -dict [list CONFIG.IIC_BOARD_INTERFACE {Custom}] $axi_iic_fmc - set fmc_spdif_tx_core [create_bd_cell -type ip -vlnv analog.com:user:axi_spdif_tx:1.0 fmc_spdif_tx_core] - set_property -dict [list CONFIG.C_DMA_TYPE {1}] $fmc_spdif_tx_core - set_property -dict [list CONFIG.C_S_AXI_ADDR_WIDTH {16}] $fmc_spdif_tx_core +# additional setups - set axi_iic_fmc [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_iic:2.0 axi_iic_fmc] - set_property -dict [list CONFIG.USE_BOARD_FLOW {true} CONFIG.IIC_BOARD_INTERFACE {IIC_FMC}] $axi_iic_fmc +set_property -dict [list CONFIG.PCW_USE_DMA1 {1}] $sys_ps7 - # additions to default configurations +# fmc hdmi tx connections - set_property -dict [list CONFIG.NUM_MI {13}] $axi_cpu_interconnect - set_property -dict [list CONFIG.PCW_USE_S_AXI_HP1 {1}] $sys_ps7 - set_property -dict [list CONFIG.PCW_USE_S_AXI_HP2 {1}] $sys_ps7 - set_property -dict [list CONFIG.PCW_USE_DMA1 {1}] $sys_ps7 +ad_connect sys_cpu_clk fmc_hdmi_tx_core/m_axis_mm2s_clk +ad_connect sys_cpu_clk fmc_hdmi_tx_dma/m_axis_mm2s_aclk +ad_connect sys_cpu_clk fmc_hdmi_clkgen/drp_clk +ad_connect sys_200m_clk fmc_hdmi_clkgen/clk +ad_connect fmc_hdmi_tx_core/hdmi_clk fmc_hdmi_clkgen/clk_0 +ad_connect fmc_hdmi_tx_clk fmc_hdmi_tx_core/hdmi_out_clk - # up axi interface connections +ad_connect fmc_hdmi_tx_data fmc_hdmi_tx_core/hdmi_16_es_data +ad_connect fmc_hdmi_tx_core/m_axis_mm2s_tvalid fmc_hdmi_tx_dma/m_axis_mm2s_tvalid +ad_connect fmc_hdmi_tx_core/m_axis_mm2s_tdata fmc_hdmi_tx_dma/m_axis_mm2s_tdata +ad_connect fmc_hdmi_tx_core/m_axis_mm2s_tkeep fmc_hdmi_tx_dma/m_axis_mm2s_tkeep +ad_connect fmc_hdmi_tx_core/m_axis_mm2s_tlast fmc_hdmi_tx_dma/m_axis_mm2s_tlast +ad_connect fmc_hdmi_tx_core/m_axis_mm2s_tready fmc_hdmi_tx_dma/m_axis_mm2s_tready +ad_connect fmc_hdmi_tx_core/m_axis_mm2s_fsync fmc_hdmi_tx_dma/mm2s_fsync +ad_connect fmc_hdmi_tx_core/m_axis_mm2s_fsync_ret fmc_hdmi_tx_dma/mm2s_fsync - connect_bd_intf_net -intf_net axi_cpu_interconnect_m07 [get_bd_intf_pins axi_cpu_interconnect/M07_AXI] [get_bd_intf_pins fmc_hdmi_tx_core/s_axi] - connect_bd_intf_net -intf_net axi_cpu_interconnect_m08 [get_bd_intf_pins axi_cpu_interconnect/M08_AXI] [get_bd_intf_pins fmc_hdmi_rx_core/s_axi] - connect_bd_intf_net -intf_net axi_cpu_interconnect_m09 [get_bd_intf_pins axi_cpu_interconnect/M09_AXI] [get_bd_intf_pins fmc_hdmi_tx_dma/S_AXI_LITE] - connect_bd_intf_net -intf_net axi_cpu_interconnect_m10 [get_bd_intf_pins axi_cpu_interconnect/M10_AXI] [get_bd_intf_pins fmc_hdmi_rx_dma/s_axi] - connect_bd_intf_net -intf_net axi_cpu_interconnect_m11 [get_bd_intf_pins axi_cpu_interconnect/M11_AXI] [get_bd_intf_pins fmc_spdif_tx_core/s_axi] - connect_bd_intf_net -intf_net axi_cpu_interconnect_m12 [get_bd_intf_pins axi_cpu_interconnect/M12_AXI] [get_bd_intf_pins axi_iic_fmc/s_axi] +# fmc hdmi rx connections - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M07_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M08_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M09_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M10_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M11_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins axi_cpu_interconnect/M12_ACLK] $sys_100m_clk_source +ad_connect fmc_hdmi_rx_core/dma_data fmc_hdmi_rx_dma/fifo_wr_din +ad_connect fmc_hdmi_rx_core/dma_valid fmc_hdmi_rx_dma/fifo_wr_en +ad_connect fmc_hdmi_rx_core/dma_clk fmc_hdmi_rx_dma/fifo_wr_clk +ad_connect fmc_hdmi_rx_core/dma_sync fmc_hdmi_rx_dma/fifo_wr_sync +ad_connect fmc_hdmi_rx_core/dma_ovf fmc_hdmi_rx_dma/fifo_wr_overflow - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M07_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M08_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M09_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M10_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M11_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_cpu_interconnect/M12_ARESETN] $sys_100m_resetn_source +ad_connect fmc_hdmi_rx_clk fmc_hdmi_rx_core/hdmi_clk +ad_connect fmc_hdmi_rx_data fmc_hdmi_rx_core/hdmi_data +# fmc spdif audio - # fmc hdmi tx data path +ad_connect sys_ps7/DMA1_REQ fmc_spdif_tx_core/DMA_REQ +ad_connect sys_ps7/DMA1_ACK fmc_spdif_tx_core/DMA_ACK +ad_connect sys_cpu_clk fmc_spdif_tx_core/DMA_REQ_ACLK +ad_connect sys_cpu_clk sys_ps7/DMA1_ACLK - connect_bd_intf_net -intf fmc_hdmi_tx_interconnect_s00 [get_bd_intf_pins fmc_hdmi_tx_interconnect/S00_AXI] [get_bd_intf_pins fmc_hdmi_tx_dma/M_AXI_MM2S] - connect_bd_intf_net -intf fmc_hdmi_tx_interconnect_m00 [get_bd_intf_pins fmc_hdmi_tx_interconnect/M00_AXI] [get_bd_intf_pins sys_ps7/S_AXI_HP1] +ad_connect sys_cpu_resetn fmc_spdif_tx_core/DMA_REQ_RSTN - connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_tx_interconnect/ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_tx_interconnect/S00_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_tx_interconnect/M00_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins sys_ps7/S_AXI_HP1_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_tx_dma/s_axi_lite_aclk] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_tx_dma/m_axi_mm2s_aclk] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_tx_dma/m_axis_mm2s_aclk] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_tx_core/m_axis_mm2s_clk] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_tx_core/s_axi_aclk] $sys_100m_clk_source +ad_connect sys_audio_clkgen/clk_out1 fmc_spdif_tx_core/spdif_data_clk +ad_connect fmc_hdmi_tx_spdif fmc_spdif_tx_core/spdif_tx_o - connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_tx_interconnect/ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_tx_interconnect/S00_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_tx_interconnect/M00_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_tx_dma/axi_resetn] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_tx_core/s_axi_aresetn] $sys_100m_resetn_source +# fmc iic connections - connect_bd_net -net axi_hdmi_tx_core_hdmi_clk [get_bd_pins fmc_hdmi_tx_core/hdmi_clk] [get_bd_pins axi_hdmi_clkgen/clk_0] - connect_bd_net -net fmc_hdmi_tx_core_hdmi_out_clk [get_bd_pins fmc_hdmi_tx_core/hdmi_out_clk] [get_bd_ports fmc_hdmi_tx_clk] - connect_bd_net -net fmc_hdmi_tx_core_hdmi_data [get_bd_pins fmc_hdmi_tx_core/hdmi_16_es_data] [get_bd_ports fmc_hdmi_tx_data] - connect_bd_net -net fmc_hdmi_tx_core_mm2s_tvalid [get_bd_pins fmc_hdmi_tx_core/m_axis_mm2s_tvalid] [get_bd_pins fmc_hdmi_tx_dma/m_axis_mm2s_tvalid] - connect_bd_net -net fmc_hdmi_tx_core_mm2s_tdata [get_bd_pins fmc_hdmi_tx_core/m_axis_mm2s_tdata] [get_bd_pins fmc_hdmi_tx_dma/m_axis_mm2s_tdata] - connect_bd_net -net fmc_hdmi_tx_core_mm2s_tkeep [get_bd_pins fmc_hdmi_tx_core/m_axis_mm2s_tkeep] [get_bd_pins fmc_hdmi_tx_dma/m_axis_mm2s_tkeep] - connect_bd_net -net fmc_hdmi_tx_core_mm2s_tlast [get_bd_pins fmc_hdmi_tx_core/m_axis_mm2s_tlast] [get_bd_pins fmc_hdmi_tx_dma/m_axis_mm2s_tlast] - connect_bd_net -net fmc_hdmi_tx_core_mm2s_tready [get_bd_pins fmc_hdmi_tx_core/m_axis_mm2s_tready] [get_bd_pins fmc_hdmi_tx_dma/m_axis_mm2s_tready] - connect_bd_net -net fmc_hdmi_tx_core_mm2s_fsync [get_bd_pins fmc_hdmi_tx_core/m_axis_mm2s_fsync] [get_bd_pins fmc_hdmi_tx_dma/mm2s_fsync] - connect_bd_net -net fmc_hdmi_tx_core_mm2s_fsync [get_bd_pins fmc_hdmi_tx_core/m_axis_mm2s_fsync_ret] +ad_connect iic_fmc axi_iic_fmc/iic +ad_connect sys_cpu_clk axi_iic_fmc/s_axi_aclk +ad_connect sys_cpu_resetn axi_iic_fmc/s_axi_aresetn - # fmc hdmi rx data path +# processor interconnect - connect_bd_intf_net -intf fmc_hdmi_rx_interconnect_s00 [get_bd_intf_pins fmc_hdmi_rx_interconnect/S00_AXI] [get_bd_intf_pins fmc_hdmi_rx_dma/m_dest_axi] - connect_bd_intf_net -intf fmc_hdmi_rx_interconnect_m00 [get_bd_intf_pins fmc_hdmi_rx_interconnect/M00_AXI] [get_bd_intf_pins sys_ps7/S_AXI_HP2] +ad_cpu_interconnect 0x43C00000 fmc_hdmi_tx_core +ad_cpu_interconnect 0x43100000 fmc_hdmi_rx_core +ad_cpu_interconnect 0x43010000 fmc_hdmi_tx_dma +ad_cpu_interconnect 0x43C20000 fmc_hdmi_rx_dma +ad_cpu_interconnect 0x43C30000 fmc_spdif_tx_core +ad_cpu_interconnect 0x43C40000 axi_iic_fmc +ad_cpu_interconnect 0x43C50000 fmc_hdmi_clkgen - connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_rx_interconnect/ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_rx_interconnect/S00_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_rx_interconnect/M00_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins sys_ps7/S_AXI_HP2_ACLK] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_rx_dma/s_axi_aclk] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_rx_dma/m_dest_axi_aclk] $sys_100m_clk_source - connect_bd_net -net sys_100m_clk [get_bd_pins fmc_hdmi_rx_core/s_axi_aclk] $sys_100m_clk_source +# memory interconnect - connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_rx_interconnect/ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_rx_interconnect/S00_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_rx_interconnect/M00_ARESETN] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_rx_dma/s_axi_aresetn] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_rx_dma/m_dest_axi_aresetn] $sys_100m_resetn_source - connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_hdmi_rx_core/s_axi_aresetn] $sys_100m_resetn_source +ad_mem_hp1_interconnect sys_cpu_clk sys_ps7/S_AXI_HP1 +ad_mem_hp1_interconnect sys_cpu_clk fmc_hdmi_tx_dma/M_AXI_MM2S - connect_bd_net -net hdmi_rx_fifo_wr_data [get_bd_pins fmc_hdmi_rx_core/video_data] [get_bd_pins fmc_hdmi_rx_dma/fifo_wr_din] - connect_bd_net -net hdmi_rx_fifo_wr_dvalid [get_bd_pins fmc_hdmi_rx_core/video_valid] [get_bd_pins fmc_hdmi_rx_dma/fifo_wr_en] - connect_bd_net -net hdmi_rx_fifo_wr_clk [get_bd_pins fmc_hdmi_rx_core/video_clk] [get_bd_pins fmc_hdmi_rx_dma/fifo_wr_clk] - connect_bd_net -net hdmi_rx_fifo_wr_sync [get_bd_pins fmc_hdmi_rx_core/video_sync] [get_bd_pins fmc_hdmi_rx_dma/fifo_wr_sync] - connect_bd_net -net hdmi_rx_fifo_overflow [get_bd_pins fmc_hdmi_rx_core/video_overflow] [get_bd_pins fmc_hdmi_rx_dma/fifo_wr_overflow] +ad_mem_hp2_interconnect sys_cpu_clk sys_ps7/S_AXI_HP2 +ad_mem_hp2_interconnect sys_cpu_clk fmc_hdmi_rx_dma/m_dest_axi - connect_bd_net -net fmc_hdmi_rx_core_clk [get_bd_pins fmc_hdmi_rx_core/hdmi_clk] [get_bd_ports fmc_hdmi_rx_clk] - connect_bd_net -net fmc_hdmi_rx_core_data [get_bd_pins fmc_hdmi_rx_core/hdmi_data] [get_bd_ports fmc_hdmi_rx_data] +# fmc hdmi interrupts - # fmc spdif audio +connect_bd_net -net fmc_hdmi_tx_interrupt [get_bd_pins fmc_hdmi_tx_dma/mm2s_introut] [get_bd_ports fmc_hdmi_tx_dma_intr] +connect_bd_net -net fmc_hdmi_rx_interrupt [get_bd_pins fmc_hdmi_rx_dma/irq] [get_bd_ports fmc_hdmi_rx_dma_intr] +connect_bd_net -net fmc_hdmi_iic_interrupt [get_bd_pins axi_iic_fmc/iic2intc_irpt] [get_bd_ports fmc_hdmi_iic_intr] - connect_bd_intf_net -intf_net fmc_spdif_dma_req_tx [get_bd_intf_pins sys_ps7/DMA1_REQ] [get_bd_intf_pins fmc_spdif_tx_core/DMA_REQ] - connect_bd_intf_net -intf_net fmc_spdif_dma_ack_tx [get_bd_intf_pins sys_ps7/DMA1_ACK] [get_bd_intf_pins fmc_spdif_tx_core/DMA_ACK] - - connect_bd_net -net sys_100m_clk [get_bd_pins fmc_spdif_tx_core/S_AXI_ACLK] - connect_bd_net -net sys_100m_clk [get_bd_pins fmc_spdif_tx_core/DMA_REQ_ACLK] - connect_bd_net -net sys_100m_clk [get_bd_pins sys_ps7/DMA1_ACLK] - - connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_spdif_tx_core/S_AXI_ARESETN] - connect_bd_net -net sys_100m_resetn [get_bd_pins fmc_spdif_tx_core/DMA_REQ_RSTN] - - connect_bd_net -net sys_audio_clkgen_clk [get_bd_pins sys_audio_clkgen/clk_out1] [get_bd_pins fmc_spdif_tx_core/spdif_data_clk] - connect_bd_net -net fmc_spdif [get_bd_ports fmc_hdmi_tx_spdif] [get_bd_pins fmc_spdif_tx_core/spdif_tx_o] - - # fmc iic connections - - connect_bd_intf_net -intf_net axi_iic_fmc_iic [get_bd_intf_ports IIC_FMC] [get_bd_intf_pins axi_iic_fmc/iic] - - connect_bd_net -net sys_100m_clk [get_bd_pins axi_iic_fmc/s_axi_aclk] - connect_bd_net -net sys_100m_resetn [get_bd_pins axi_iic_fmc/s_axi_aresetn] - - connect_bd_net -net fmc_hdmi_iic_rstn [get_bd_pins axi_iic_fmc/gpo] [get_bd_ports fmc_iic_rstn] - - # fmc hdmi interrupts - - connect_bd_net -net fmc_hdmi_tx_interrupt [get_bd_pins fmc_hdmi_tx_dma/mm2s_introut] [get_bd_ports fmc_hdmi_tx_dma_intr] - connect_bd_net -net fmc_hdmi_rx_interrupt [get_bd_pins fmc_hdmi_rx_dma/irq] [get_bd_ports fmc_hdmi_rx_dma_intr] - connect_bd_net -net fmc_hdmi_iic_interrupt [get_bd_pins axi_iic_fmc/iic2intc_irpt] [get_bd_ports fmc_hdmi_iic_intr] - - # address map - - create_bd_addr_seg -range 0x00010000 -offset 0x43C00000 $sys_addr_cntrl_space [get_bd_addr_segs fmc_hdmi_tx_core/s_axi/axi_lite] SEG_data_fmc_hdmi_tx_core - create_bd_addr_seg -range 0x00010000 -offset 0x43100000 $sys_addr_cntrl_space [get_bd_addr_segs fmc_hdmi_rx_core/s_axi/axi_lite] SEG_data_fmc_hdmi_rx_core - create_bd_addr_seg -range 0x00010000 -offset 0x43010000 $sys_addr_cntrl_space [get_bd_addr_segs fmc_hdmi_tx_dma/S_AXI_LITE/Reg] SEG_data_fmc_hdmi_tx_dma - create_bd_addr_seg -range 0x00010000 -offset 0x43C20000 $sys_addr_cntrl_space [get_bd_addr_segs fmc_hdmi_rx_dma/s_axi/axi_lite] SEG_data_fmc_hdmi_rx_dma - create_bd_addr_seg -range 0x00010000 -offset 0x43C30000 $sys_addr_cntrl_space [get_bd_addr_segs fmc_spdif_tx_core/S_AXI/reg0] SEG_data_fmc_spdif_tx_core - create_bd_addr_seg -range 0x00010000 -offset 0x43C40000 $sys_addr_cntrl_space [get_bd_addr_segs axi_iic_fmc/s_axi/Reg] SEG_data_fmc_hdmi_iic - - create_bd_addr -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces fmc_hdmi_tx_dma/Data_MM2S] [get_bd_addr_segs sys_ps7/S_AXI_HP1/HP1_DDR_LOWOCM] SEG_sys_ps7_hp1_ddr_lowocm - create_bd_addr -range $sys_mem_size -offset 0x00000000 [get_bd_addr_spaces fmc_hdmi_rx_dma/m_dest_axi] [get_bd_addr_segs sys_ps7/S_AXI_HP2/HP2_DDR_LOWOCM] SEG_sys_ps7_hp2_ddr_lowocm +ad_cpu_interrupt ps-11 mb-14 axi_iic_fmc/iic2intc_irpt +ad_cpu_interrupt ps-12 mb-13 fmc_hdmi_rx_dma/irq +ad_cpu_interrupt ps-13 mb-12 fmc_hdmi_tx_dma/mm2s_introut diff --git a/projects/imageon/zc706/system_constr.xdc b/projects/imageon/zc706/system_constr.xdc index 98cb8dcfe..be96e6ee7 100644 --- a/projects/imageon/zc706/system_constr.xdc +++ b/projects/imageon/zc706/system_constr.xdc @@ -19,6 +19,8 @@ set_property -dict {PACKAGE_PIN AB29 IOSTANDARD LVCMOS25} [get_ports fm set_property -dict {PACKAGE_PIN AD29 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_data[14]] ; ## G34 FMC_LPC_LA31_N set_property -dict {PACKAGE_PIN AC29 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_data[15]] ; ## G33 FMC_LPC_LA31_P +set_property -dict {PACKAGE_PIN AF15 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_rx_int] ; ## D08 FMC_LPC_LA01_CC_P + # fmc hdmi tx (adv7511) set_property -dict {PACKAGE_PIN AD28 IOSTANDARD LVCMOS25} [get_ports fmc_hdmi_tx_clk] ; ## G3 FMC_LPC_CLK1_M2C_N @@ -48,6 +50,6 @@ set_property -dict {PACKAGE_PIN AG15 IOSTANDARD LVCMOS25} [get_ports fm # clock definition -create_clock -period 6.06061 -name hdmi_rx_clk -waveform {0.000 3.030305} [get_ports fmc_hdmi_rx_clk] +create_clock -period 6.66667 -name hdmi_rx_clk -waveform {0.000 3.333335} [get_ports fmc_hdmi_rx_clk] diff --git a/projects/imageon/zc706/system_project.tcl b/projects/imageon/zc706/system_project.tcl index a1f36eafd..f8923194d 100644 --- a/projects/imageon/zc706/system_project.tcl +++ b/projects/imageon/zc706/system_project.tcl @@ -2,6 +2,7 @@ source ../../scripts/adi_env.tcl source $ad_hdl_dir/projects/scripts/adi_project.tcl +source $ad_hdl_dir/projects/scripts/adi_board.tcl set project_name imageon_zc706 diff --git a/projects/imageon/zc706/system_top.v b/projects/imageon/zc706/system_top.v index 99405eaf4..e796db5bd 100644 --- a/projects/imageon/zc706/system_top.v +++ b/projects/imageon/zc706/system_top.v @@ -41,28 +41,28 @@ module system_top ( - DDR_addr, - DDR_ba, - DDR_cas_n, - DDR_ck_n, - DDR_ck_p, - DDR_cke, - DDR_cs_n, - DDR_dm, - DDR_dq, - DDR_dqs_n, - DDR_dqs_p, - DDR_odt, - DDR_ras_n, - DDR_reset_n, - DDR_we_n, + ddr_addr, + ddr_ba, + ddr_cas_n, + ddr_ck_n, + ddr_ck_p, + ddr_cke, + ddr_cs_n, + ddr_dm, + ddr_dq, + ddr_dqs_n, + ddr_dqs_p, + ddr_odt, + ddr_ras_n, + ddr_reset_n, + ddr_we_n, - FIXED_IO_ddr_vrn, - FIXED_IO_ddr_vrp, - FIXED_IO_mio, - FIXED_IO_ps_clk, - FIXED_IO_ps_porb, - FIXED_IO_ps_srstb, + fixed_io_ddr_vrn, + fixed_io_ddr_vrp, + fixed_io_mio, + fixed_io_ps_clk, + fixed_io_ps_porb, + fixed_io_ps_srstb, gpio_bd, @@ -84,32 +84,34 @@ module system_top ( fmc_hdmi_tx_data, fmc_hdmi_tx_spdif, + fmc_hdmi_rx_int, + fmc_iic_scl, fmc_iic_sda, fmc_iic_rstn); - inout [14:0] DDR_addr; - inout [ 2:0] DDR_ba; - inout DDR_cas_n; - inout DDR_ck_n; - inout DDR_ck_p; - inout DDR_cke; - inout DDR_cs_n; - inout [ 3:0] DDR_dm; - inout [31:0] DDR_dq; - inout [ 3:0] DDR_dqs_n; - inout [ 3:0] DDR_dqs_p; - inout DDR_odt; - inout DDR_ras_n; - inout DDR_reset_n; - inout DDR_we_n; + inout [14:0] ddr_addr; + inout [ 2:0] ddr_ba; + inout ddr_cas_n; + inout ddr_ck_n; + inout ddr_ck_p; + inout ddr_cke; + inout ddr_cs_n; + inout [ 3:0] ddr_dm; + inout [31:0] ddr_dq; + inout [ 3:0] ddr_dqs_n; + inout [ 3:0] ddr_dqs_p; + inout ddr_odt; + inout ddr_ras_n; + inout ddr_reset_n; + inout ddr_we_n; - inout FIXED_IO_ddr_vrn; - inout FIXED_IO_ddr_vrp; - inout [53:0] FIXED_IO_mio; - inout FIXED_IO_ps_clk; - inout FIXED_IO_ps_porb; - inout FIXED_IO_ps_srstb; + inout fixed_io_ddr_vrn; + inout fixed_io_ddr_vrp; + inout [53:0] fixed_io_mio; + inout fixed_io_ps_clk; + inout fixed_io_ps_porb; + inout fixed_io_ps_srstb; inout [14:0] gpio_bd; @@ -131,53 +133,63 @@ module system_top ( output [15:0] fmc_hdmi_tx_data; output fmc_hdmi_tx_spdif; + inout fmc_hdmi_rx_int; + inout fmc_iic_scl; inout fmc_iic_sda; output fmc_iic_rstn; // internal signals - wire [14:0] gpio_i; - wire [14:0] gpio_o; - wire [14:0] gpio_t; + wire [63:0] gpio_i; + wire [63:0] gpio_o; + wire [63:0] gpio_t; - wire [15:0] ps_intrs; + assign fmc_iic_rstn = 1'b1; // instantiations ad_iobuf #( .DATA_WIDTH(15) ) i_gpio_bd ( - .dt(gpio_t), - .di(gpio_o), - .do(gpio_i), + .dt(gpio_t[14:0]), + .di(gpio_o[14:0]), + .do(gpio_i[14:0]), .dio(gpio_bd)); + ad_iobuf #( + .DATA_WIDTH(1) + ) i_hdmi_rx_int ( + .dt(gpio_t[32]), + .di(gpio_o[32]), + .do(gpio_i[32]), + .dio(fmc_hdmi_rx_int)); + system_wrapper i_system_wrapper ( - .DDR_addr (DDR_addr), - .DDR_ba (DDR_ba), - .DDR_cas_n (DDR_cas_n), - .DDR_ck_n (DDR_ck_n), - .DDR_ck_p (DDR_ck_p), - .DDR_cke (DDR_cke), - .DDR_cs_n (DDR_cs_n), - .DDR_dm (DDR_dm), - .DDR_dq (DDR_dq), - .DDR_dqs_n (DDR_dqs_n), - .DDR_dqs_p (DDR_dqs_p), - .DDR_odt (DDR_odt), - .DDR_ras_n (DDR_ras_n), - .DDR_reset_n (DDR_reset_n), - .DDR_we_n (DDR_we_n), - .FIXED_IO_ddr_vrn (FIXED_IO_ddr_vrn), - .FIXED_IO_ddr_vrp (FIXED_IO_ddr_vrp), - .FIXED_IO_mio (FIXED_IO_mio), - .FIXED_IO_ps_clk (FIXED_IO_ps_clk), - .FIXED_IO_ps_porb (FIXED_IO_ps_porb), - .FIXED_IO_ps_srstb (FIXED_IO_ps_srstb), - .GPIO_I (gpio_i), - .GPIO_O (gpio_o), - .GPIO_T (gpio_t), + .ddr_addr (DDR_addr), + .ddr_ba (DDR_ba), + .ddr_cas_n (DDR_cas_n), + .ddr_ck_n (DDR_ck_n), + .ddr_ck_p (DDR_ck_p), + .ddr_cke (DDR_cke), + .ddr_cs_n (DDR_cs_n), + .ddr_dm (DDR_dm), + .ddr_dq (DDR_dq), + .ddr_dqs_n (DDR_dqs_n), + .ddr_dqs_p (DDR_dqs_p), + .ddr_odt (DDR_odt), + .ddr_ras_n (DDR_ras_n), + .ddr_reset_n (DDR_reset_n), + .ddr_we_n (DDR_we_n), + .fixed_io_ddr_vrn (FIXED_IO_ddr_vrn), + .fixed_io_ddr_vrp (FIXED_IO_ddr_vrp), + .fixed_io_mio (FIXED_IO_mio), + .fixed_io_ps_clk (FIXED_IO_ps_clk), + .fixed_io_ps_porb (FIXED_IO_ps_porb), + .fixed_io_ps_srstb (FIXED_IO_ps_srstb), + .gpio_i (gpio_i), + .gpio_o (gpio_o), + .gpio_t (gpio_t), .hdmi_data (hdmi_data), .hdmi_data_e (hdmi_data_e), .hdmi_hsync (hdmi_hsync), @@ -185,32 +197,25 @@ module system_top ( .hdmi_vsync (hdmi_vsync), .iic_main_scl_io (iic_scl), .iic_main_sda_io (iic_sda), - .ps_intr_0 (ps_intrs[0]), - .ps_intr_1 (ps_intrs[1]), - .ps_intr_2 (ps_intrs[2]), - .ps_intr_3 (ps_intrs[3]), - .ps_intr_4 (ps_intrs[4]), - .ps_intr_5 (ps_intrs[5]), - .ps_intr_6 (ps_intrs[6]), - .ps_intr_7 (ps_intrs[7]), - .ps_intr_8 (ps_intrs[8]), - .ps_intr_9 (ps_intrs[9]), - .ps_intr_10 (ps_intrs[10]), - .ps_intr_11 (ps_intrs[11]), - .ps_intr_12 (ps_intrs[12]), - .ps_intr_13 (ps_intrs[13]), + .ps_intr_00 (1'b0), + .ps_intr_01 (1'b0), + .ps_intr_02 (1'b0), + .ps_intr_03 (1'b0), + .ps_intr_04 (1'b0), + .ps_intr_05 (1'b0), + .ps_intr_06 (1'b0), + .ps_intr_07 (1'b0), + .ps_intr_08 (1'b0), + .ps_intr_09 (1'b0), + .ps_intr_10 (1'b0), .spdif (spdif), .fmc_hdmi_rx_clk (fmc_hdmi_rx_clk), .fmc_hdmi_rx_data (fmc_hdmi_rx_data), .fmc_hdmi_tx_clk (fmc_hdmi_tx_clk), .fmc_hdmi_tx_spdif (fmc_hdmi_tx_spdif), .fmc_hdmi_tx_data (fmc_hdmi_tx_data), - .fmc_hdmi_tx_dma_intr (ps_intrs[13]), - .fmc_hdmi_rx_dma_intr (ps_intrs[12]), - .fmc_hdmi_iic_intr (ps_intrs[11]), - .iic_fmc_scl_io (iic_fmc_scl_io), - .iic_fmc_sda_io (iic_fmc_sda_io), - .fmc_iic_rstn (fmc_iic_rstn)); + .iic_fmc_scl_io (fmc_iic_scl), + .iic_fmc_sda_io (fmc_iic_sda)); endmodule