diff --git a/projects/cn0577/common/cn0577_bd.tcl b/projects/cn0577/common/cn0577_bd.tcl index 3273e45e6..340dd4b20 100644 --- a/projects/cn0577/common/cn0577_bd.tcl +++ b/projects/cn0577/common/cn0577_bd.tcl @@ -48,27 +48,26 @@ ad_connect ref_clk sampling_clk ad_connect sys_200m_clk axi_ltc2387/delay_clk -ad_connect ref_clk axi_ltc2387/ref_clk -ad_connect clk_gate axi_ltc2387/clk_gate -ad_connect dco_p axi_ltc2387/dco_p -ad_connect dco_n axi_ltc2387/dco_n -ad_connect da_n axi_ltc2387/da_n -ad_connect da_p axi_ltc2387/da_p -ad_connect db_n axi_ltc2387/db_n -ad_connect db_p axi_ltc2387/db_p - -ad_connect cnv axi_pwm_gen/pwm_0 -ad_connect clk_gate axi_pwm_gen/pwm_1 - -ad_connect ref_clk axi_pwm_gen/ext_clk -ad_connect sys_cpu_resetn axi_pwm_gen/s_axi_aresetn -ad_connect sys_cpu_clk axi_pwm_gen/s_axi_aclk -ad_connect ref_clk axi_ltc2387_dma/fifo_wr_clk +ad_connect ref_clk axi_ltc2387/ref_clk +ad_connect clk_gate axi_ltc2387/clk_gate +ad_connect dco_p axi_ltc2387/dco_p +ad_connect dco_n axi_ltc2387/dco_n +ad_connect da_p axi_ltc2387/da_p +ad_connect da_n axi_ltc2387/da_n +ad_connect db_p axi_ltc2387/db_p +ad_connect db_n axi_ltc2387/db_n +ad_connect ref_clk axi_ltc2387_dma/fifo_wr_clk ad_connect axi_ltc2387/adc_valid axi_ltc2387_dma/fifo_wr_en ad_connect axi_ltc2387/adc_data axi_ltc2387_dma/fifo_wr_din ad_connect axi_ltc2387/adc_dovf axi_ltc2387_dma/fifo_wr_overflow +ad_connect cnv axi_pwm_gen/pwm_0 +ad_connect clk_gate axi_pwm_gen/pwm_1 +ad_connect ref_clk axi_pwm_gen/ext_clk +ad_connect sys_cpu_resetn axi_pwm_gen/s_axi_aresetn +ad_connect sys_cpu_clk axi_pwm_gen/s_axi_aclk + # address mapping ad_cpu_interconnect 0x44A00000 axi_ltc2387 @@ -79,7 +78,7 @@ ad_cpu_interconnect 0x44A60000 axi_pwm_gen ad_mem_hp2_interconnect $sys_cpu_clk sys_ps7/S_AXI_HP2 ad_mem_hp2_interconnect $sys_cpu_clk axi_ltc2387_dma/m_dest_axi -ad_connect $sys_cpu_resetn axi_ltc2387_dma/m_dest_axi_aresetn +ad_connect $sys_cpu_resetn axi_ltc2387_dma/m_dest_axi_aresetn # interrupts diff --git a/projects/cn0577/zed/system_bd.tcl b/projects/cn0577/zed/system_bd.tcl index 0930be442..6bc4ffbe1 100644 --- a/projects/cn0577/zed/system_bd.tcl +++ b/projects/cn0577/zed/system_bd.tcl @@ -1,11 +1,11 @@ -# specify number of channels -- the design supports one lane/two lanes +# specify number of channels - the design supports one lane/two lanes set two_lanes 1 source $ad_hdl_dir/projects/common/zed/zed_system_bd.tcl source $ad_hdl_dir/projects/scripts/adi_pd.tcl source ../common/cn0577_bd.tcl -#system ID +# system ID ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9 ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "[pwd]/mem_init_sys.txt" ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9 diff --git a/projects/cn0577/zed/system_constr.xdc b/projects/cn0577/zed/system_constr.xdc index 0550e21f7..6cbb15e7a 100644 --- a/projects/cn0577/zed/system_constr.xdc +++ b/projects/cn0577/zed/system_constr.xdc @@ -1,24 +1,32 @@ - # cn0577 -# pin connections +# clocks -set_property -dict {PACKAGE_PIN D18 IOSTANDARD LVDS_25 DIFF_TERM 1} [get_ports ref_clk_p]; #G02 FMC_LPC_CLK1_M2C_P -set_property -dict {PACKAGE_PIN C19 IOSTANDARD LVDS_25 DIFF_TERM 1} [get_ports ref_clk_n]; #G03 FMC_LPC_CLK1_M2C_N -set_property -dict {PACKAGE_PIN L18 IOSTANDARD LVDS_25 DIFF_TERM 1} [get_ports dco_p]; #H04 FMC_LPC_CLK0_M2C_P -set_property -dict {PACKAGE_PIN L19 IOSTANDARD LVDS_25 DIFF_TERM 1} [get_ports dco_n]; #H05 FMC_LPC_CLK0_M2C_N -set_property -dict {PACKAGE_PIN P17 IOSTANDARD LVDS_25 DIFF_TERM 1} [get_ports da_p]; #H07 FMC_LPC_LA02_P -set_property -dict {PACKAGE_PIN P18 IOSTANDARD LVDS_25 DIFF_TERM 1} [get_ports da_n]; #H08 FMC_LPC_LA02_N -set_property -dict {PACKAGE_PIN M21 IOSTANDARD LVDS_25 DIFF_TERM 1} [get_ports db_p]; #H10 FMC_LPC_LA04_P -set_property -dict {PACKAGE_PIN M22 IOSTANDARD LVDS_25 DIFF_TERM 1} [get_ports db_n]; #H11 FMC_LPC_LA04_N -set_property -dict {PACKAGE_PIN M19 IOSTANDARD LVDS_25} [get_ports clk_p]; #G06 FMC_LPC_LA00_CC_P -set_property -dict {PACKAGE_PIN M20 IOSTANDARD LVDS_25} [get_ports clk_n]; #G07 FMC_LPC_LA00_CC_N -set_property -dict {PACKAGE_PIN N19 IOSTANDARD LVDS_25} [get_ports cnv_p]; #D08 FMC_LPC_LA01_CC_P -set_property -dict {PACKAGE_PIN N20 IOSTANDARD LVDS_25} [get_ports cnv_n]; #D09 FMC_LPC_LA01_CC_N -set_property -dict {PACKAGE_PIN P22 IOSTANDARD LVCMOS25} [get_ports cnv_en]; #G10 FMC_LPC_LA03_N -set_property -dict {PACKAGE_PIN J20 IOSTANDARD LVCMOS25} [get_ports pd_cntrl]; #G18 FMC_LPC_LA16_P -set_property -dict {PACKAGE_PIN G20 IOSTANDARD LVCMOS25} [get_ports testpat_cntrl]; #G21 FMC_LPC_LA20_P -set_property -dict {PACKAGE_PIN G19 IOSTANDARD LVCMOS25} [get_ports twolanes_cntrl]; #G24 FMC_LPC_LA22_P +set_property -dict {PACKAGE_PIN D18 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports ref_clk_p] ; ## G2 FMC_CLK1_M2C_P IO_L12P_T1_MRCC_35 +set_property -dict {PACKAGE_PIN C19 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports ref_clk_n] ; ## G3 FMC_CLK1_M2C_N IO_L12N_T1_MRCC_35 +set_property -dict {PACKAGE_PIN M19 IOSTANDARD LVDS_25} [get_ports clk_p] ; ## G6 FMC_LA00_CC_P IO_L13P_T2_MRCC_34 +set_property -dict {PACKAGE_PIN M20 IOSTANDARD LVDS_25} [get_ports clk_n] ; ## G7 FMC_LA00_CC_N IO_L13N_T2_MRCC_34 + +# cnv + +set_property -dict {PACKAGE_PIN N19 IOSTANDARD LVDS_25} [get_ports cnv_p] ; ## D8 FMC_LA01_CC_P IO_L14P_T2_SRCC_34 +set_property -dict {PACKAGE_PIN N20 IOSTANDARD LVDS_25} [get_ports cnv_n] ; ## D9 FMC_LA01_CC_N IO_L14N_T2_SRCC_34 +set_property -dict {PACKAGE_PIN P22 IOSTANDARD LVCMOS25} [get_ports cnv_en] ; ## G10 FMC_LA03_N IO_L16N_T2_34 + +# dco, da, db + +set_property -dict {PACKAGE_PIN L18 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports dco_p] ; ## H4 FMC_CLK0_M2C_P IO_L12P_T1_MRCC_34 +set_property -dict {PACKAGE_PIN L19 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports dco_n] ; ## H5 FMC_CLK0_M2C_N IO_L12N_T1_MRCC_34 +set_property -dict {PACKAGE_PIN P17 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports da_p] ; ## H7 FMC_LA02_P IO_L20P_T3_34 +set_property -dict {PACKAGE_PIN P18 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports da_n] ; ## H8 FMC_LA02_N IO_L20N_T3_34 +set_property -dict {PACKAGE_PIN M21 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports db_p] ; ## H10 FMC_LA04_P IO_L15P_T2_DQS_34 +set_property -dict {PACKAGE_PIN M22 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports db_n] ; ## H11 FMC_LA04_N IO_L15N_T2_DQS_34 + +# control signals + +set_property -dict {PACKAGE_PIN J20 IOSTANDARD LVCMOS25} [get_ports pd_cntrl] ; ## G18 FMC_LA16_P IO_L9P_T1_DQS_34 +set_property -dict {PACKAGE_PIN G20 IOSTANDARD LVCMOS25} [get_ports testpat_cntrl] ; ## G21 FMC_LA20_P IO_L22P_T3_AD7P_35 +set_property -dict {PACKAGE_PIN G19 IOSTANDARD LVCMOS25} [get_ports twolanes_cntrl] ; ## G24 FMC_LA22_P IO_L20P_T3_AD6P_35 # 120MHz clock set clk_period 8.333 diff --git a/projects/cn0577/zed/system_top.v b/projects/cn0577/zed/system_top.v index 0227db9ae..ba5943653 100644 --- a/projects/cn0577/zed/system_top.v +++ b/projects/cn0577/zed/system_top.v @@ -103,25 +103,28 @@ module system_top ( // internal signals - wire [63:0] gpio_i; - wire [63:0] gpio_o; - wire [63:0] gpio_t; + wire [63:0] gpio_i; + wire [63:0] gpio_o; + wire [63:0] gpio_t; - wire [ 1:0] iic_mux_scl_i_s; - wire [ 1:0] iic_mux_scl_o_s; - wire iic_mux_scl_t_s; - wire [ 1:0] iic_mux_sda_i_s; - wire [ 1:0] iic_mux_sda_o_s; - wire iic_mux_sda_t_s; + wire [ 1:0] iic_mux_scl_i_s; + wire [ 1:0] iic_mux_scl_o_s; + wire iic_mux_scl_t_s; + wire [ 1:0] iic_mux_sda_i_s; + wire [ 1:0] iic_mux_sda_o_s; + wire iic_mux_sda_t_s; - wire clk_s; - wire cnv_s; - wire cnv; - wire clk_gate; - wire sampling_clk_s; - wire ltc_clk; + wire clk_s; + wire cnv_s; + wire cnv; + wire clk_gate; + wire sampling_clk_s; + wire ltc_clk; assign gpio_i[63:34] = gpio_o[63:34]; + + // hardcode GPIO to always use two lanes configuration + assign twolanes_cntrl = 1'b1; assign cnv_en = cnv; @@ -169,7 +172,7 @@ module system_top ( .I (cnv_s)); ad_iobuf #( - .DATA_WIDTH(2) + .DATA_WIDTH (2) ) iobuf_gpio_cn0577 ( .dio_i (gpio_o[33:32]), .dio_o (gpio_i[33:32]), @@ -177,7 +180,7 @@ module system_top ( .dio_p ({pd_cntrl, testpat_cntrl})); ad_iobuf #( - .DATA_WIDTH(32) + .DATA_WIDTH (32) ) iobuf_gpio_bd ( .dio_i (gpio_o[31:0]), .dio_o (gpio_i[31:0]), @@ -185,7 +188,7 @@ module system_top ( .dio_p (gpio_bd)); ad_iobuf #( - .DATA_WIDTH(2) + .DATA_WIDTH (2) ) i_iic_mux_scl ( .dio_t ({iic_mux_scl_t_s, iic_mux_scl_t_s}), .dio_i (iic_mux_scl_o_s), @@ -193,7 +196,7 @@ module system_top ( .dio_p (iic_mux_scl)); ad_iobuf #( - .DATA_WIDTH(2) + .DATA_WIDTH (2) ) i_iic_mux_sda ( .dio_t ({iic_mux_sda_t_s, iic_mux_sda_t_s}), .dio_i (iic_mux_sda_o_s), @@ -260,7 +263,7 @@ module system_top ( .spi0_csn_0_o (), .spi0_csn_1_o (), .spi0_csn_2_o (), - .spi0_csn_i (1'b0), + .spi0_csn_i (1'b1), .spi0_sdi_i (1'b0), .spi0_sdo_i (1'b0), .spi0_sdo_o (), @@ -269,7 +272,7 @@ module system_top ( .spi1_csn_0_o (), .spi1_csn_1_o (), .spi1_csn_2_o (), - .spi1_csn_i (1'b0), + .spi1_csn_i (1'b1), .spi1_sdi_i (1'b0), .spi1_sdo_i (1'b0), .spi1_sdo_o ());