vc707: interrupt updates
parent
c9691fac64
commit
4788d09620
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@ -25,6 +25,10 @@ set rx_sysref [create_bd_port -dir O rx_sysref]
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set rx_data_p [create_bd_port -dir I -from 7 -to 0 rx_data_p]
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set rx_data_n [create_bd_port -dir I -from 7 -to 0 rx_data_n]
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set ad9625_spi_intr [create_bd_port -dir O ad9625_spi_intr]
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set ad9625_gpio_intr [create_bd_port -dir O ad9625_gpio_intr]
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set ad9625_dma_intr [create_bd_port -dir O ad9625_dma_intr]
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if {$sys_zynq == 0} {
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set gpio_ad9625_i [create_bd_port -dir I -from 1 -to 0 gpio_ad9625_i]
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@ -125,10 +129,6 @@ if {$sys_zynq == 1} {
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set_property -dict [list CONFIG.NUM_MI {13}] $axi_cpu_interconnect
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set_property -dict [list CONFIG.NUM_SI {10}] $axi_mem_interconnect
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set_property -dict [list CONFIG.NUM_PORTS {7}] $sys_concat_intc
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delete_bd_objs [get_bd_nets sys_concat_intc_din_2]
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delete_bd_objs [get_bd_ports unc_int2]
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}
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# connections (spi and gpio)
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@ -158,8 +158,8 @@ if {$sys_zynq == 1 } {
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connect_bd_net -net gpio_ad9625_o [get_bd_ports gpio_ad9625_o] [get_bd_pins axi_ad9625_gpio/gpio_io_o]
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connect_bd_net -net gpio_ad9625_t [get_bd_ports gpio_ad9625_t] [get_bd_pins axi_ad9625_gpio/gpio_io_t]
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connect_bd_net -net axi_ad9625_spi_irq [get_bd_pins axi_ad9625_spi/ip2intc_irpt] [get_bd_pins sys_concat_intc/In10]
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connect_bd_net -net axi_ad9625_gpio_irq [get_bd_pins axi_ad9625_gpio/ip2intc_irpt] [get_bd_pins sys_concat_intc/In9]
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connect_bd_net -net axi_ad9625_spi_intr [get_bd_pins axi_ad9625_spi/ip2intc_irpt] [get_bd_ports ad9625_spi_intr]
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connect_bd_net -net axi_ad9625_gpio_intr [get_bd_pins axi_ad9625_gpio/ip2intc_irpt] [get_bd_ports ad9625_gpio_intr]
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}
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# connections (gt)
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@ -201,7 +201,7 @@ connect_bd_net -net sys_100m_clk [get_bd_pins axi_ad9625_fifo
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connect_bd_net -net axi_ad9625_dma_dvalid [get_bd_pins axi_ad9625_fifo/dma_wvalid] [get_bd_pins axi_ad9625_dma/s_axis_valid]
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connect_bd_net -net axi_ad9625_dma_dready [get_bd_pins axi_ad9625_fifo/dma_wready] [get_bd_pins axi_ad9625_dma/s_axis_ready]
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connect_bd_net -net axi_ad9625_dma_ddata [get_bd_pins axi_ad9625_fifo/dma_wdata] [get_bd_pins axi_ad9625_dma/s_axis_data]
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connect_bd_net -net axi_ad9625_dma_irq [get_bd_pins axi_ad9625_dma/irq] [get_bd_pins sys_concat_intc/In13]
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connect_bd_net -net axi_ad9625_dma_intr [get_bd_pins axi_ad9625_dma/irq] [get_bd_ports ad9625_dma_intr]
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if {$sys_zynq == 0} {
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@ -185,15 +185,16 @@ module system_top (
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// internal signals
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wire [1:0] gpio_i;
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wire [1:0] gpio_o;
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wire [1:0] gpio_t;
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wire [ 1:0] gpio_i;
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wire [ 1:0] gpio_o;
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wire [ 1:0] gpio_t;
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wire rx_ref_clk;
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wire rx_sysref;
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wire rx_sync;
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wire spi_clk;
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wire spi_miso;
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wire spi_mosi;
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wire [31:0] mb_intrs;
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// instantiations
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@ -233,7 +234,12 @@ module system_top (
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.spi_adc_sdio (spi_adc_sdio),
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.spi_clk_sdio (spi_clk_sdio));
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assign fan_pwm = 1'b1;
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system_wrapper i_system_wrapper (
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.ad9625_dma_intr (mb_intrs[13]),
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.ad9625_gpio_intr (mb_intrs[12]),
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.ad9625_spi_intr (mb_intrs[11]),
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.ddr3_addr (ddr3_addr),
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.ddr3_ba (ddr3_ba),
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.ddr3_cas_n (ddr3_cas_n),
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@ -249,7 +255,6 @@ module system_top (
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.ddr3_ras_n (ddr3_ras_n),
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.ddr3_reset_n (ddr3_reset_n),
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.ddr3_we_n (ddr3_we_n),
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.fan_pwm (fan_pwm),
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.gpio_lcd_tri_o (gpio_lcd),
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.gpio_led_tri_o (gpio_led),
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.gpio_sw_tri_i (gpio_sw),
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@ -261,11 +266,34 @@ module system_top (
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.iic_main_scl_io (iic_scl),
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.iic_main_sda_io (iic_sda),
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.iic_rstn (iic_rstn),
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.mb_intr_10 (mb_intrs[10]),
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.mb_intr_11 (mb_intrs[11]),
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.mb_intr_12 (mb_intrs[12]),
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.mb_intr_13 (mb_intrs[13]),
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.mb_intr_14 (mb_intrs[14]),
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.mb_intr_15 (mb_intrs[15]),
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.mb_intr_16 (mb_intrs[16]),
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.mb_intr_17 (mb_intrs[17]),
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.mb_intr_18 (mb_intrs[18]),
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.mb_intr_19 (mb_intrs[19]),
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.mb_intr_20 (mb_intrs[20]),
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.mb_intr_21 (mb_intrs[21]),
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.mb_intr_22 (mb_intrs[22]),
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.mb_intr_23 (mb_intrs[23]),
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.mb_intr_24 (mb_intrs[24]),
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.mb_intr_25 (mb_intrs[25]),
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.mb_intr_26 (mb_intrs[26]),
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.mb_intr_27 (mb_intrs[27]),
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.mb_intr_28 (mb_intrs[28]),
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.mb_intr_29 (mb_intrs[29]),
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.mb_intr_30 (mb_intrs[30]),
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.mb_intr_31 (mb_intrs[31]),
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.mdio_mdc (mdio_mdc),
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.mdio_mdio_io (mdio_mdio),
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.mgt_clk_clk_n (mgt_clk_n),
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.mgt_clk_clk_p (mgt_clk_p),
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.phy_rstn (phy_rstn),
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.phy_sd (1'b1),
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.sgmii_rxn (sgmii_rxn),
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.sgmii_rxp (sgmii_rxp),
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.sgmii_txn (sgmii_txn),
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@ -2,11 +2,11 @@
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set sys_rst [create_bd_port -dir I -type rst sys_rst]
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set sys_clk_p [create_bd_port -dir I sys_clk_p]
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set sys_clk_n [create_bd_port -dir I sys_clk_n]
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set fan_pwm [create_bd_port -dir O fan_pwm]
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set ddr3 [create_bd_intf_port -mode Master -vlnv xilinx.com:interface:ddrx_rtl:1.0 ddr3]
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set phy_rstn [create_bd_port -dir O -type rst phy_rstn]
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set phy_sd [create_bd_port -dir I phy_sd]
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set mgt_clk [create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 mgt_clk]
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set sgmii [create_bd_intf_port -mode Master -vlnv xilinx.com:interface:sgmii_rtl:1.0 sgmii]
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set mdio [create_bd_intf_port -mode Master -vlnv xilinx.com:interface:mdio_io:1.0 mdio]
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@ -21,12 +21,6 @@ set iic_main [create_bd_intf_port -mode Master -vlnv xilinx.com:interface
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set uart_sin [create_bd_port -dir I uart_sin]
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set uart_sout [create_bd_port -dir O uart_sout]
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set unc_int0 [create_bd_port -dir I unc_int0]
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set unc_int1 [create_bd_port -dir I unc_int1]
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set unc_int2 [create_bd_port -dir I unc_int2]
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set unc_int3 [create_bd_port -dir I unc_int3]
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set unc_int4 [create_bd_port -dir I unc_int4]
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set hdmi_out_clk [create_bd_port -dir O hdmi_out_clk]
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set hdmi_hsync [create_bd_port -dir O hdmi_hsync]
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set hdmi_vsync [create_bd_port -dir O hdmi_vsync]
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@ -39,21 +33,6 @@ set spdif [create_bd_port -dir O spdif]
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set_property -dict [list CONFIG.POLARITY {ACTIVE_HIGH}] $sys_rst
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# interrupts
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set timer_irq [create_bd_port -dir O timer_irq]
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set eth_irq [create_bd_port -dir O eth_irq]
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set eth_dma_mm2s_irq [create_bd_port -dir O eth_dma_mm2s_irq]
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set eth_dma_s2mm_irq [create_bd_port -dir O eth_dma_s2mm_irq]
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set uart_irq [create_bd_port -dir O uart_irq]
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set gpio_lcd_irq [create_bd_port -dir O gpio_lcd_irq]
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set gpio_sw_irq [create_bd_port -dir O gpio_sw_irq]
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set spdif_dma_irq [create_bd_port -dir O spdif_dma_irq]
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set iic_irq [create_bd_port -dir O iic_irq]
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set hdmi_dma_irq [create_bd_port -dir O hdmi_dma_irq]
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set mb_axi_intr [create_bd_port -dir I -from 31 -to 0 -type intr mb_axi_intr]
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# instance: microblaze - processor
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set sys_mb [create_bd_cell -type ip -vlnv xilinx.com:ip:microblaze:9.3 sys_mb]
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@ -76,7 +55,6 @@ set_property -dict [list CONFIG.C_DCACHE_HIGHADDR {0xBFFFFFFF}] $sys_mb
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set_property -dict [list CONFIG.C_DCACHE_BASEADDR {0x80000000}] $sys_mb
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set_property -dict [list CONFIG.G_TEMPLATE_LIST {4}] $sys_mb
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# instance: microblaze - local memory & bus
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set sys_dlmb [create_bd_cell -type ip -vlnv xilinx.com:ip:lmb_v10:3.0 sys_dlmb]
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@ -100,8 +78,6 @@ set_property -dict [list CONFIG.C_USE_UART {1}] $sys_mb_debug
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set sys_rstgen [create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 sys_rstgen]
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set sys_const_vcc [create_bd_cell -type ip -vlnv xilinx.com:ip:xlconstant:1.1 sys_const_vcc]
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# instance: ddr (mig)
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set axi_ddr_cntrl [create_bd_cell -type ip -vlnv xilinx.com:ip:mig_7series:2.1 axi_ddr_cntrl]
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@ -111,6 +87,7 @@ set_property -dict [list CONFIG.XML_INPUT_FILE {vc707_system_mig.prj}] $axi_ddr_
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set_property -dict [list CONFIG.RESET_BOARD_INTERFACE {Custom}] $axi_ddr_cntrl
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# instance: axi interconnect (lite)
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set axi_cpu_aux_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_cpu_aux_interconnect]
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set_property -dict [list CONFIG.NUM_MI {8}] $axi_cpu_aux_interconnect
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set_property -dict [list CONFIG.STRATEGY {1}] $axi_cpu_aux_interconnect
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@ -165,6 +142,9 @@ set_property -dict [list CONFIG.C_ALL_OUTPUTS_2 {1}] $axi_gpio_sw_led
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set axi_intc [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_intc:4.1 axi_intc]
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set_property -dict [list CONFIG.C_HAS_FAST {0}] $axi_intc
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set sys_concat_intc [create_bd_cell -type ip -vlnv xilinx.com:ip:xlconcat:2.1 sys_concat_intc]
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set_property -dict [list CONFIG.NUM_PORTS {32}] $sys_concat_intc
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# hdmi peripherals
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set axi_hdmi_clkgen [create_bd_cell -type ip -vlnv analog.com:user:axi_clkgen:1.0 axi_hdmi_clkgen]
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@ -218,8 +198,7 @@ connect_bd_intf_net -intf_net sys_mb_ilmb [get_bd_intf_pins sys_mb/ILMB] [get_bd
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connect_bd_intf_net -intf_net sys_mb_debug [get_bd_intf_pins sys_mb_debug/MBDEBUG_0] [get_bd_intf_pins sys_mb/DEBUG]
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connect_bd_intf_net -intf_net sys_mb_interrupt [get_bd_intf_pins axi_intc/interrupt] [get_bd_intf_pins sys_mb/INTERRUPT]
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connect_bd_net -net sys_concat_intr [get_bd_ports mb_axi_intr] [get_bd_pins axi_intc/intr]
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set_property -dict [list CONFIG.PortWidth {32}] [get_bd_ports mb_axi_intr]
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connect_bd_net -net sys_concat_intc_intr [get_bd_pins sys_concat_intc/dout] [get_bd_pins axi_intc/intr]
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# defaults (peripherals)
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@ -350,20 +329,25 @@ connect_bd_intf_net -intf_net axi_ethernet_dma_rxs [get_bd_intf_pins axi_etherne
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# defaults (interrupts)
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connect_bd_net -net sys_base_intr_00 [get_bd_ports timer_irq] [get_bd_pins axi_timer/interrupt]
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connect_bd_net -net sys_base_intr_01 [get_bd_ports eth_irq] [get_bd_pins axi_ethernet/interrupt]
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connect_bd_net -net sys_base_intr_02 [get_bd_ports eth_dma_mm2s_irq] [get_bd_pins axi_ethernet_dma/mm2s_introut]
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connect_bd_net -net sys_base_intr_03 [get_bd_ports eth_dma_s2mm_irq] [get_bd_pins axi_ethernet_dma/s2mm_introut]
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connect_bd_net -net sys_base_intr_04 [get_bd_ports uart_irq] [get_bd_pins axi_uart/interrupt]
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connect_bd_net -net sys_base_intr_05 [get_bd_ports gpio_lcd_irq] [get_bd_pins axi_gpio_lcd/ip2intc_irpt]
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connect_bd_net -net sys_base_intr_06 [get_bd_ports gpio_sw_irq] [get_bd_pins axi_gpio_sw_led/ip2intc_irpt]
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connect_bd_net -net sys_base_intr_07 [get_bd_ports spdif_dma_irq] [get_bd_pins axi_spdif_tx_dma/mm2s_introut]
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connect_bd_net -net sys_base_intr_08 [get_bd_ports iic_irq] [get_bd_pins axi_hdmi_dma/mm2s_introut]
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connect_bd_net -net sys_base_intr_09 [get_bd_ports hdmi_dma_irq] [get_bd_pins axi_iic_main/iic2intc_irpt]
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connect_bd_net [get_bd_pins sys_concat_intc/In0] [get_bd_pins axi_timer/interrupt]
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connect_bd_net [get_bd_pins sys_concat_intc/In1] [get_bd_pins axi_ethernet/interrupt]
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connect_bd_net [get_bd_pins sys_concat_intc/In2] [get_bd_pins axi_ethernet_dma/mm2s_introut]
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connect_bd_net [get_bd_pins sys_concat_intc/In3] [get_bd_pins axi_ethernet_dma/s2mm_introut]
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connect_bd_net [get_bd_pins sys_concat_intc/In4] [get_bd_pins axi_uart/interrupt]
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connect_bd_net [get_bd_pins sys_concat_intc/In5] [get_bd_pins axi_gpio_lcd/ip2intc_irpt]
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connect_bd_net [get_bd_pins sys_concat_intc/In6] [get_bd_pins axi_gpio_sw_led/ip2intc_irpt]
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connect_bd_net [get_bd_pins sys_concat_intc/In7] [get_bd_pins axi_spdif_tx_dma/mm2s_introut]
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connect_bd_net [get_bd_pins sys_concat_intc/In8] [get_bd_pins axi_hdmi_dma/mm2s_introut]
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connect_bd_net [get_bd_pins sys_concat_intc/In9] [get_bd_pins axi_iic_main/iic2intc_irpt]
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for {set intc_index 10} {$intc_index < 32} {incr intc_index} {
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set mb_intr_${intc_index} [create_bd_port -dir I mb_intr_${intc_index}]
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connect_bd_net [get_bd_pins sys_concat_intc/In${intc_index}] [get_bd_ports mb_intr_${intc_index}]
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}
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# defaults (external interface)
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connect_bd_net -net sys_const_vcc_vcc [get_bd_pins sys_const_vcc/dout] [get_bd_ports fan_pwm] [get_bd_pins axi_ethernet/signal_detect]
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connect_bd_net -net phy_sd [get_bd_ports phy_sd] [get_bd_pins axi_ethernet/signal_detect]
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connect_bd_net -net sys_rst_s [get_bd_ports sys_rst]
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connect_bd_net -net sys_rst_s [get_bd_pins sys_rstgen/ext_reset_in]
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connect_bd_net -net sys_rst_s [get_bd_pins axi_ddr_cntrl/sys_rst]
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