diff --git a/library/axi_dmac/address_generator.v b/library/axi_dmac/address_generator.v
index 8e38486d5..c92b2f678 100644
--- a/library/axi_dmac/address_generator.v
+++ b/library/axi_dmac/address_generator.v
@@ -57,7 +57,7 @@ module dmac_address_generator (
   input                        addr_ready,
   output reg                   addr_valid,
   output     [31:0]            addr,
-  output     [ 7:0]            len,
+  output     [LENGTH_WIDTH-1:0] len,
   output     [ 2:0]            size,
   output     [ 1:0]            burst,
   output     [ 2:0]            prot,
@@ -69,6 +69,8 @@ parameter ID_WIDTH = 3;
 parameter DMA_DATA_WIDTH = 64;
 parameter BEATS_PER_BURST_WIDTH = 4;
 parameter BYTES_PER_BEAT_WIDTH = $clog2(DMA_DATA_WIDTH/8);
+parameter LENGTH_WIDTH = 8;
+
 localparam MAX_BEATS_PER_BURST = 2**(BEATS_PER_BURST_WIDTH);
 
 `include "inc_id.h"
@@ -79,7 +81,7 @@ assign cache = 4'b0011;
 assign len = length;
 assign size = $clog2(DMA_DATA_WIDTH/8);
 
-reg [7:0] length = 'h0;
+reg [LENGTH_WIDTH-1:0] length = 'h0;
 reg [31-BYTES_PER_BEAT_WIDTH:0] address = 'h00;
 reg [BEATS_PER_BURST_WIDTH-1:0] last_burst_len = 'h00;
 assign addr = {address, {BYTES_PER_BEAT_WIDTH{1'b0}}};
diff --git a/library/axi_dmac/axi_dmac.v b/library/axi_dmac/axi_dmac.v
index ba4611412..876bc54c7 100644
--- a/library/axi_dmac/axi_dmac.v
+++ b/library/axi_dmac/axi_dmac.v
@@ -537,7 +537,8 @@ dmac_request_arb #(
   .AXI_SLICE_SRC(AXI_SLICE_SRC),
   .MAX_BYTES_PER_BURST(MAX_BYTES_PER_BURST),
   .FIFO_SIZE(FIFO_SIZE),
-  .ID_WIDTH(ID_WIDTH)
+  .ID_WIDTH(ID_WIDTH),
+  .AXI_LENGTH_WIDTH(8-(4*DMA_AXI_PROTOCOL_SRC))
 ) i_request_arb (
   .req_aclk(s_axi_aclk),
   .req_aresetn(s_axi_aresetn),
diff --git a/library/axi_dmac/dest_axi_mm.v b/library/axi_dmac/dest_axi_mm.v
index 93f351e3f..278ed3c34 100644
--- a/library/axi_dmac/dest_axi_mm.v
+++ b/library/axi_dmac/dest_axi_mm.v
@@ -74,7 +74,7 @@ module dmac_dest_mm_axi (
   input                               m_axi_awready,
   output                              m_axi_awvalid,
   output [31:0]                       m_axi_awaddr,
-  output [ 7:0]                       m_axi_awlen,
+  output [AXI_LENGTH_WIDTH-1:0]       m_axi_awlen,
   output [ 2:0]                       m_axi_awsize,
   output [ 1:0]                       m_axi_awburst,
   output [ 2:0]                       m_axi_awprot,
@@ -97,6 +97,7 @@ parameter ID_WIDTH = 3;
 parameter DMA_DATA_WIDTH = 64;
 parameter BYTES_PER_BEAT_WIDTH = $clog2(DMA_DATA_WIDTH/8);
 parameter BEATS_PER_BURST_WIDTH = 4;
+parameter AXI_LENGTH_WIDTH = 8;
 
 reg [(DMA_DATA_WIDTH/8)-1:0] wstrb;
 
@@ -133,7 +134,8 @@ dmac_address_generator #(
   .ID_WIDTH(ID_WIDTH),
   .BEATS_PER_BURST_WIDTH(BEATS_PER_BURST_WIDTH),
   .BYTES_PER_BEAT_WIDTH(BYTES_PER_BEAT_WIDTH),
-  .DMA_DATA_WIDTH(DMA_DATA_WIDTH)
+  .DMA_DATA_WIDTH(DMA_DATA_WIDTH),
+  .LENGTH_WIDTH(AXI_LENGTH_WIDTH)
 ) i_addr_gen (
   .clk(m_axi_aclk),
   .resetn(m_axi_aresetn),
diff --git a/library/axi_dmac/request_arb.v b/library/axi_dmac/request_arb.v
index 706d2cedc..ab61e048f 100644
--- a/library/axi_dmac/request_arb.v
+++ b/library/axi_dmac/request_arb.v
@@ -61,7 +61,7 @@ module dmac_request_arb (
 
   // Write address
   output [31:0]                       m_axi_awaddr,
-  output [ 7:0]                       m_axi_awlen,
+  output [AXI_LENGTH_WIDTH-1:0]       m_axi_awlen,
   output [ 2:0]                       m_axi_awsize,
   output [ 1:0]                       m_axi_awburst,
   output [ 2:0]                       m_axi_awprot,
@@ -85,7 +85,7 @@ module dmac_request_arb (
   input                               m_axi_arready,
   output                              m_axi_arvalid,
   output [31:0]                       m_axi_araddr,
-  output [ 7:0]                       m_axi_arlen,
+  output [AXI_LENGTH_WIDTH-1:0]       m_axi_arlen,
   output [ 2:0]                       m_axi_arsize,
   output [ 1:0]                       m_axi_arburst,
   output [ 2:0]                       m_axi_arprot,
@@ -162,6 +162,8 @@ parameter FIFO_SIZE = 4;
 
 parameter ID_WIDTH = $clog2(FIFO_SIZE*2);
 
+parameter AXI_LENGTH_WIDTH = 8;
+
 localparam DMA_TYPE_MM_AXI = 0;
 localparam DMA_TYPE_STREAM_AXI = 1;
 localparam DMA_TYPE_FIFO = 2;
@@ -403,7 +405,8 @@ dmac_dest_mm_axi #(
   .ID_WIDTH(ID_WIDTH),
   .DMA_DATA_WIDTH(DMA_DATA_WIDTH_DEST),
   .BEATS_PER_BURST_WIDTH(BEATS_PER_BURST_WIDTH_DEST),
-  .BYTES_PER_BEAT_WIDTH(BYTES_PER_BEAT_WIDTH_DEST)
+  .BYTES_PER_BEAT_WIDTH(BYTES_PER_BEAT_WIDTH_DEST),
+  .AXI_LENGTH_WIDTH(AXI_LENGTH_WIDTH)
 ) i_dest_dma_mm (
   .m_axi_aclk(m_dest_axi_aclk),
   .m_axi_aresetn(dest_resetn),
@@ -616,7 +619,8 @@ dmac_src_mm_axi #(
   .ID_WIDTH(ID_WIDTH),
   .DMA_DATA_WIDTH(DMA_DATA_WIDTH_SRC),
   .BEATS_PER_BURST_WIDTH(BEATS_PER_BURST_WIDTH_SRC),
-  .BYTES_PER_BEAT_WIDTH(BYTES_PER_BEAT_WIDTH_SRC)
+  .BYTES_PER_BEAT_WIDTH(BYTES_PER_BEAT_WIDTH_SRC),
+  .AXI_LENGTH_WIDTH(AXI_LENGTH_WIDTH)
 ) i_src_dma_mm (
   .m_axi_aclk(m_src_axi_aclk),
   .m_axi_aresetn(src_resetn),
diff --git a/library/axi_dmac/src_axi_mm.v b/library/axi_dmac/src_axi_mm.v
index c1a06b0d8..c8a8bb65e 100644
--- a/library/axi_dmac/src_axi_mm.v
+++ b/library/axi_dmac/src_axi_mm.v
@@ -71,7 +71,7 @@ module dmac_src_mm_axi (
   input                            m_axi_arready,
   output                           m_axi_arvalid,
   output [31:0]                    m_axi_araddr,
-  output [ 7:0]                    m_axi_arlen,
+  output [AXI_LENGTH_WIDTH-1:0]    m_axi_arlen,
   output [ 2:0]                    m_axi_arsize,
   output [ 1:0]                    m_axi_arburst,
   output [ 2:0]                    m_axi_arprot,
@@ -88,6 +88,7 @@ parameter ID_WIDTH = 3;
 parameter DMA_DATA_WIDTH = 64;
 parameter BYTES_PER_BEAT_WIDTH = 3;
 parameter BEATS_PER_BURST_WIDTH = 4;
+parameter AXI_LENGTH_WIDTH = 8;
 
 `include "resp.h"
 
@@ -125,7 +126,8 @@ dmac_address_generator #(
   .ID_WIDTH(ID_WIDTH),
   .BEATS_PER_BURST_WIDTH(BEATS_PER_BURST_WIDTH),
   .BYTES_PER_BEAT_WIDTH(BYTES_PER_BEAT_WIDTH),
-  .DMA_DATA_WIDTH(DMA_DATA_WIDTH)
+  .DMA_DATA_WIDTH(DMA_DATA_WIDTH),
+  .LENGTH_WIDTH(AXI_LENGTH_WIDTH)
 ) i_addr_gen (
   .clk(m_axi_aclk),
   .resetn(m_axi_aresetn),