From 4a6b554c0aed5c7e23c3f764b1ab6099d4eeb88f Mon Sep 17 00:00:00 2001
From: Rejeesh Kutty <rejeesh.kutty@analog.com>
Date: Wed, 14 Sep 2016 11:12:53 -0400
Subject: [PATCH] ad_serdes- updates

---
 library/altera/common/ad_serdes_in.v  | 31 ++++++++++++++-------------
 library/altera/common/ad_serdes_out.v | 24 ++++++++++-----------
 2 files changed, 28 insertions(+), 27 deletions(-)

diff --git a/library/altera/common/ad_serdes_in.v b/library/altera/common/ad_serdes_in.v
index 9b99895a8..04cb86321 100644
--- a/library/altera/common/ad_serdes_in.v
+++ b/library/altera/common/ad_serdes_in.v
@@ -47,6 +47,7 @@ module ad_serdes_in (
   input           div_clk,
   input           loaden,
   input           hs_phase,
+  input           locked,
 
   // data interface
 
@@ -81,21 +82,21 @@ module ad_serdes_in (
   // instantiations
 
   alt_serdes_in_core i_core (
-    .data_in (data_in_p),
-    .clk (clk),
-    .loaden (loaden),
-    .div_clk (div_clk),
-    .hs_phase (hs_phase),
-    .locked (locked),
-    .data_s ({data_s7,
-              data_s6,
-              data_s5,
-              data_s4,
-              data_s3,
-              data_s2,
-              data_s1,
-              data_s0}),
-    .delay_locked (delay_locked));
+    .clk_export (clk),
+    .div_clk_export (div_clk),
+    .hs_phase_export (hs_phase),
+    .loaden_export (loaden),
+    .locked_export (locked),
+    .data_in_export (data_in_p),
+    .data_s_export ({ data_s7,
+                      data_s6,
+                      data_s5,
+                      data_s4,
+                      data_s3,
+                      data_s2,
+                      data_s1,
+                      data_s0}),
+    .delay_locked_export (delay_locked));
 
 endmodule
 
diff --git a/library/altera/common/ad_serdes_out.v b/library/altera/common/ad_serdes_out.v
index 45ccc4036..e0e98d3ee 100644
--- a/library/altera/common/ad_serdes_out.v
+++ b/library/altera/common/ad_serdes_out.v
@@ -80,18 +80,18 @@ module ad_serdes_out (
   generate
   for (l_inst = 0; l_inst < DATA_WIDTH; l_inst = l_inst + 1) begin: g_data
   alt_serdes_out_core i_core (
-    .data_out (data_out_p[l_inst]),
-    .clk (clk),
-    .loaden (loaden),
-    .div_clk (div_clk),
-    .data_s ({data_s7[l_inst],
-      data_s6[l_inst],
-      data_s5[l_inst],
-      data_s4[l_inst],
-      data_s3[l_inst],
-      data_s2[l_inst],
-      data_s1[l_inst],
-      data_s0[l_inst]}));
+    .clk_export (clk),
+    .div_clk_export (div_clk),
+    .loaden_export (loaden),
+    .data_out_export (data_out_p[l_inst]),
+    .data_s_export ({ data_s7[l_inst],
+                      data_s6[l_inst],
+                      data_s5[l_inst],
+                      data_s4[l_inst],
+                      data_s3[l_inst],
+                      data_s2[l_inst],
+                      data_s1[l_inst],
+                      data_s0[l_inst]}));
   end
   endgenerate