fmcomms2/rfsom: initial commit
Rejeesh Kutty
parent
ee52602c89
commit
4b571ded8f
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source $ad_hdl_dir/projects/common/rfsom/rfsom_system_bd.tcl
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source ../common/fmcomms2_bd.tcl
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# constraints
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# ad9361
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set_property -dict {PACKAGE_PIN M19 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_clk_in_p] ; ## G6 FMC_LPC_LA00_CC_P
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set_property -dict {PACKAGE_PIN M20 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_clk_in_n] ; ## G7 FMC_LPC_LA00_CC_N
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set_property -dict {PACKAGE_PIN N19 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_frame_in_p] ; ## D8 FMC_LPC_LA01_CC_P
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set_property -dict {PACKAGE_PIN N20 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_frame_in_n] ; ## D9 FMC_LPC_LA01_CC_N
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set_property -dict {PACKAGE_PIN P17 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_p[0]] ; ## H7 FMC_LPC_LA02_P
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set_property -dict {PACKAGE_PIN P18 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_n[0]] ; ## H8 FMC_LPC_LA02_N
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set_property -dict {PACKAGE_PIN N22 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_p[1]] ; ## G9 FMC_LPC_LA03_P
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set_property -dict {PACKAGE_PIN P22 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_n[1]] ; ## G10 FMC_LPC_LA03_N
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set_property -dict {PACKAGE_PIN M21 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_p[2]] ; ## H10 FMC_LPC_LA04_P
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set_property -dict {PACKAGE_PIN M22 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_n[2]] ; ## H11 FMC_LPC_LA04_N
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set_property -dict {PACKAGE_PIN J18 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_p[3]] ; ## D11 FMC_LPC_LA05_P
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set_property -dict {PACKAGE_PIN K18 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_n[3]] ; ## D12 FMC_LPC_LA05_N
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set_property -dict {PACKAGE_PIN L21 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_p[4]] ; ## C10 FMC_LPC_LA06_P
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set_property -dict {PACKAGE_PIN L22 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_n[4]] ; ## C11 FMC_LPC_LA06_N
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set_property -dict {PACKAGE_PIN T16 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_p[5]] ; ## H13 FMC_LPC_LA07_P
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set_property -dict {PACKAGE_PIN T17 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_n[5]] ; ## H14 FMC_LPC_LA07_N
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set_property -dict {PACKAGE_PIN J21 IOSTANDARD LVDS_25} [get_ports tx_clk_out_p] ; ## G12 FMC_LPC_LA08_P
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set_property -dict {PACKAGE_PIN J22 IOSTANDARD LVDS_25} [get_ports tx_clk_out_n] ; ## G13 FMC_LPC_LA08_N
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set_property -dict {PACKAGE_PIN R20 IOSTANDARD LVDS_25} [get_ports tx_frame_out_p] ; ## D14 FMC_LPC_LA09_P
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set_property -dict {PACKAGE_PIN R21 IOSTANDARD LVDS_25} [get_ports tx_frame_out_n] ; ## D15 FMC_LPC_LA09_N
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set_property -dict {PACKAGE_PIN N17 IOSTANDARD LVDS_25} [get_ports tx_data_out_p[0]] ; ## H16 FMC_LPC_LA11_P
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set_property -dict {PACKAGE_PIN N18 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[0]] ; ## H17 FMC_LPC_LA11_N
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set_property -dict {PACKAGE_PIN P20 IOSTANDARD LVDS_25} [get_ports tx_data_out_p[1]] ; ## G15 FMC_LPC_LA12_P
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set_property -dict {PACKAGE_PIN P21 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[1]] ; ## G16 FMC_LPC_LA12_N
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set_property -dict {PACKAGE_PIN L17 IOSTANDARD LVDS_25} [get_ports tx_data_out_p[2]] ; ## D17 FMC_LPC_LA13_P
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set_property -dict {PACKAGE_PIN M17 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[2]] ; ## D18 FMC_LPC_LA13_N
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set_property -dict {PACKAGE_PIN R19 IOSTANDARD LVDS_25} [get_ports tx_data_out_p[3]] ; ## C14 FMC_LPC_LA10_P
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set_property -dict {PACKAGE_PIN T19 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[3]] ; ## C15 FMC_LPC_LA10_N
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set_property -dict {PACKAGE_PIN K19 IOSTANDARD LVDS_25} [get_ports tx_data_out_p[4]] ; ## C18 FMC_LPC_LA14_P
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set_property -dict {PACKAGE_PIN K20 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[4]] ; ## C19 FMC_LPC_LA14_N
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set_property -dict {PACKAGE_PIN J16 IOSTANDARD LVDS_25} [get_ports tx_data_out_p[5]] ; ## H19 FMC_LPC_LA15_P
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set_property -dict {PACKAGE_PIN J17 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[5]] ; ## H20 FMC_LPC_LA15_N
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set_property -dict {PACKAGE_PIN G20 IOSTANDARD LVCMOS25} [get_ports gpio_status[0]] ; ## G21 FMC_LPC_LA20_P
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set_property -dict {PACKAGE_PIN G21 IOSTANDARD LVCMOS25} [get_ports gpio_status[1]] ; ## G22 FMC_LPC_LA20_N
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set_property -dict {PACKAGE_PIN E19 IOSTANDARD LVCMOS25} [get_ports gpio_status[2]] ; ## H25 FMC_LPC_LA21_P
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set_property -dict {PACKAGE_PIN E20 IOSTANDARD LVCMOS25} [get_ports gpio_status[3]] ; ## H26 FMC_LPC_LA21_N
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set_property -dict {PACKAGE_PIN G19 IOSTANDARD LVCMOS25} [get_ports gpio_status[4]] ; ## G24 FMC_LPC_LA22_P
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set_property -dict {PACKAGE_PIN F19 IOSTANDARD LVCMOS25} [get_ports gpio_status[5]] ; ## G25 FMC_LPC_LA22_N
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set_property -dict {PACKAGE_PIN E15 IOSTANDARD LVCMOS25} [get_ports gpio_status[6]] ; ## D23 FMC_LPC_LA23_P
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set_property -dict {PACKAGE_PIN D15 IOSTANDARD LVCMOS25} [get_ports gpio_status[7]] ; ## D24 FMC_LPC_LA23_N
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set_property -dict {PACKAGE_PIN A18 IOSTANDARD LVCMOS25} [get_ports gpio_ctl[0]] ; ## H28 FMC_LPC_LA24_P
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set_property -dict {PACKAGE_PIN A19 IOSTANDARD LVCMOS25} [get_ports gpio_ctl[1]] ; ## H29 FMC_LPC_LA24_N
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set_property -dict {PACKAGE_PIN D22 IOSTANDARD LVCMOS25} [get_ports gpio_ctl[2]] ; ## G27 FMC_LPC_LA25_P
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set_property -dict {PACKAGE_PIN C22 IOSTANDARD LVCMOS25} [get_ports gpio_ctl[3]] ; ## G28 FMC_LPC_LA25_N
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set_property -dict {PACKAGE_PIN G15 IOSTANDARD LVCMOS25} [get_ports gpio_en_agc] ; ## H22 FMC_LPC_LA19_P
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set_property -dict {PACKAGE_PIN G16 IOSTANDARD LVCMOS25} [get_ports gpio_sync] ; ## H23 FMC_LPC_LA19_N
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set_property -dict {PACKAGE_PIN A16 IOSTANDARD LVCMOS25} [get_ports gpio_resetb] ; ## H31 FMC_LPC_LA28_P
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set_property -dict {PACKAGE_PIN J20 IOSTANDARD LVCMOS25} [get_ports gpio_enable] ; ## G18 FMC_LPC_LA16_P
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set_property -dict {PACKAGE_PIN K21 IOSTANDARD LVCMOS25} [get_ports gpio_txnrx] ; ## G19 FMC_LPC_LA16_N
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set_property -dict {PACKAGE_PIN F18 IOSTANDARD LVCMOS25 PULLTYPE PULLUP} [get_ports spi_csn] ; ## D26 FMC_LPC_LA26_P
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set_property -dict {PACKAGE_PIN E18 IOSTANDARD LVCMOS25} [get_ports spi_clk] ; ## D27 FMC_LPC_LA26_N
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set_property -dict {PACKAGE_PIN E21 IOSTANDARD LVCMOS25} [get_ports spi_mosi] ; ## C26 FMC_LPC_LA27_P
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set_property -dict {PACKAGE_PIN D21 IOSTANDARD LVCMOS25} [get_ports spi_miso] ; ## C27 FMC_LPC_LA27_N
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# spi pmod JA1
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set_property -dict {PACKAGE_PIN Y11 IOSTANDARD LVCMOS33} [get_ports spi_udc_csn_tx] ; ## JA1
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set_property -dict {PACKAGE_PIN AA11 IOSTANDARD LVCMOS33} [get_ports spi_udc_csn_rx] ; ## JA2
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set_property -dict {PACKAGE_PIN AA9 IOSTANDARD LVCMOS33} [get_ports spi_udc_sclk] ; ## JA4
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set_property -dict {PACKAGE_PIN Y10 IOSTANDARD LVCMOS33} [get_ports spi_udc_data] ; ## JA3
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# clocks
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create_clock -name rx_clk -period 4 [get_ports rx_clk_in_p]
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create_clock -name ad9361_clk -period 4 [get_pins i_system_wrapper/system_i/axi_ad9361/clk]
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source ../../scripts/adi_env.tcl
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source $ad_hdl_dir/projects/scripts/adi_project.tcl
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adi_project_create fmcomms2_rfsom
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adi_project_files fmcomms2_rfsom [list \
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"system_top.v" \
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"system_constr.xdc"\
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"$ad_hdl_dir/library/common/ad_iobuf.v" \
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"$ad_hdl_dir/projects/common/rfsom/rfsom_system_constr.xdc" ]
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adi_project_run fmcomms2_rfsom
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// ***************************************************************************
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// ***************************************************************************
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// Copyright 2011(c) Analog Devices, Inc.
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//
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without modification,
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// are permitted provided that the following conditions are met:
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// - Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// - Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in
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// the documentation and/or other materials provided with the
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// distribution.
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// - Neither the name of Analog Devices, Inc. nor the names of its
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// contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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// - The use of this software may or may not infringe the patent rights
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// of one or more patent holders. This license does not release you
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// from the requirement that you obtain separate licenses from these
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// patent holders to use this software.
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// - Use of the software either in source or binary form, must be run
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// on or directly connected to an Analog Devices Inc. component.
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//
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// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A
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// PARTICULAR PURPOSE ARE DISCLAIMED.
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//
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// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY
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// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
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// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// ***************************************************************************
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// ***************************************************************************
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// ***************************************************************************
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// ***************************************************************************
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`timescale 1ns/100ps
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module system_top (
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DDR_addr,
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DDR_ba,
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DDR_cas_n,
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DDR_ck_n,
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DDR_ck_p,
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DDR_cke,
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DDR_cs_n,
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DDR_dm,
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DDR_dq,
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DDR_dqs_n,
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DDR_dqs_p,
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DDR_odt,
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DDR_ras_n,
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DDR_reset_n,
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DDR_we_n,
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FIXED_IO_ddr_vrn,
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FIXED_IO_ddr_vrp,
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FIXED_IO_mio,
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FIXED_IO_ps_clk,
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FIXED_IO_ps_porb,
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FIXED_IO_ps_srstb,
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gpio_bd,
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hdmi_out_clk,
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hdmi_vsync,
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hdmi_hsync,
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hdmi_data_e,
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hdmi_data,
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spdif,
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iic_scl,
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iic_sda,
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rx_clk_in_p,
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rx_clk_in_n,
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rx_frame_in_p,
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rx_frame_in_n,
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rx_data_in_p,
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rx_data_in_n,
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tx_clk_out_p,
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tx_clk_out_n,
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tx_frame_out_p,
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tx_frame_out_n,
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tx_data_out_p,
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tx_data_out_n,
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gpio_txnrx,
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gpio_enable,
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gpio_resetb,
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gpio_sync,
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gpio_en_agc,
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gpio_ctl,
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gpio_status,
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spi_csn,
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spi_clk,
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spi_mosi,
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spi_miso,
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spi_udc_csn_tx,
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spi_udc_csn_rx,
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spi_udc_sclk,
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spi_udc_data);
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inout [14:0] DDR_addr;
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inout [ 2:0] DDR_ba;
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inout DDR_cas_n;
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inout DDR_ck_n;
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inout DDR_ck_p;
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inout DDR_cke;
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inout DDR_cs_n;
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inout [ 3:0] DDR_dm;
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inout [31:0] DDR_dq;
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inout [ 3:0] DDR_dqs_n;
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inout [ 3:0] DDR_dqs_p;
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inout DDR_odt;
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inout DDR_ras_n;
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inout DDR_reset_n;
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inout DDR_we_n;
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inout FIXED_IO_ddr_vrn;
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inout FIXED_IO_ddr_vrp;
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inout [53:0] FIXED_IO_mio;
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inout FIXED_IO_ps_clk;
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inout FIXED_IO_ps_porb;
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inout FIXED_IO_ps_srstb;
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inout [14:0] gpio_bd;
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output hdmi_out_clk;
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output hdmi_vsync;
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output hdmi_hsync;
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output hdmi_data_e;
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output [23:0] hdmi_data;
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output spdif;
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inout iic_scl;
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inout iic_sda;
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input rx_clk_in_p;
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input rx_clk_in_n;
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input rx_frame_in_p;
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input rx_frame_in_n;
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input [ 5:0] rx_data_in_p;
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input [ 5:0] rx_data_in_n;
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output tx_clk_out_p;
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output tx_clk_out_n;
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output tx_frame_out_p;
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output tx_frame_out_n;
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output [ 5:0] tx_data_out_p;
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output [ 5:0] tx_data_out_n;
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inout gpio_txnrx;
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inout gpio_enable;
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inout gpio_resetb;
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inout gpio_sync;
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inout gpio_en_agc;
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inout [ 3:0] gpio_ctl;
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inout [ 7:0] gpio_status;
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output spi_csn;
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output spi_clk;
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output spi_mosi;
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input spi_miso;
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output spi_udc_csn_tx;
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output spi_udc_csn_rx;
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output spi_udc_sclk;
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output spi_udc_data;
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// internal signals
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wire [48:0] gpio_i;
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wire [48:0] gpio_o;
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wire [48:0] gpio_t;
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wire [15:0] ps_intrs;
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// instantiations
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ad_iobuf #(.DATA_WIDTH(32)) i_iobuf (
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.dt ({gpio_t[48:32],gpio_t[14:0]}),
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.di ({gpio_o[48:32],gpio_o[14:0]}),
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.do ({gpio_i[48:32],gpio_i[14:0]}),
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.dio({ gpio_txnrx,
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gpio_enable,
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gpio_resetb,
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gpio_sync,
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gpio_en_agc,
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gpio_ctl,
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gpio_status,
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gpio_bd}));
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system_wrapper i_system_wrapper (
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.DDR_addr (DDR_addr),
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.DDR_ba (DDR_ba),
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.DDR_cas_n (DDR_cas_n),
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.DDR_ck_n (DDR_ck_n),
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.DDR_ck_p (DDR_ck_p),
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.DDR_cke (DDR_cke),
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.DDR_cs_n (DDR_cs_n),
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.DDR_dm (DDR_dm),
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.DDR_dq (DDR_dq),
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.DDR_dqs_n (DDR_dqs_n),
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.DDR_dqs_p (DDR_dqs_p),
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.DDR_odt (DDR_odt),
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.DDR_ras_n (DDR_ras_n),
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.DDR_reset_n (DDR_reset_n),
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.DDR_we_n (DDR_we_n),
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.FIXED_IO_ddr_vrn (FIXED_IO_ddr_vrn),
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.FIXED_IO_ddr_vrp (FIXED_IO_ddr_vrp),
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.FIXED_IO_mio (FIXED_IO_mio),
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.FIXED_IO_ps_clk (FIXED_IO_ps_clk),
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.FIXED_IO_ps_porb (FIXED_IO_ps_porb),
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.FIXED_IO_ps_srstb (FIXED_IO_ps_srstb),
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.GPIO_I (gpio_i),
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.GPIO_O (gpio_o),
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.GPIO_T (gpio_t),
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.hdmi_data (hdmi_data),
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.hdmi_data_e (hdmi_data_e),
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.hdmi_hsync (hdmi_hsync),
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.hdmi_out_clk (hdmi_out_clk),
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.hdmi_vsync (hdmi_vsync),
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.iic_main_scl_io (iic_scl),
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.iic_main_sda_io (iic_sda),
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.ps_intr_0 (ps_intrs[0]),
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.ps_intr_1 (ps_intrs[1]),
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.ps_intr_10 (ps_intrs[10]),
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.ps_intr_11 (ps_intrs[11]),
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.ps_intr_12 (ps_intrs[12]),
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.ps_intr_13 (ps_intrs[13]),
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.ps_intr_2 (ps_intrs[2]),
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.ps_intr_3 (ps_intrs[3]),
|
||||
.ps_intr_4 (ps_intrs[4]),
|
||||
.ps_intr_5 (ps_intrs[5]),
|
||||
.ps_intr_6 (ps_intrs[6]),
|
||||
.ps_intr_7 (ps_intrs[7]),
|
||||
.ps_intr_8 (ps_intrs[8]),
|
||||
.ps_intr_9 (ps_intrs[9]),
|
||||
.ad9361_dac_dma_irq (ps_intrs[12]),
|
||||
.ad9361_adc_dma_irq (ps_intrs[13]),
|
||||
.rx_clk_in_n (rx_clk_in_n),
|
||||
.rx_clk_in_p (rx_clk_in_p),
|
||||
.rx_data_in_n (rx_data_in_n),
|
||||
.rx_data_in_p (rx_data_in_p),
|
||||
.rx_frame_in_n (rx_frame_in_n),
|
||||
.rx_frame_in_p (rx_frame_in_p),
|
||||
.spdif (spdif),
|
||||
.spi_csn_i (1'b1),
|
||||
.spi_csn_o (spi_csn),
|
||||
.spi_miso_i (spi_miso),
|
||||
.spi_mosi_i (1'b0),
|
||||
.spi_mosi_o (spi_mosi),
|
||||
.spi_sclk_i (1'b0),
|
||||
.spi_sclk_o (spi_clk),
|
||||
.tx_clk_out_n (tx_clk_out_n),
|
||||
.tx_clk_out_p (tx_clk_out_p),
|
||||
.tx_data_out_n (tx_data_out_n),
|
||||
.tx_data_out_p (tx_data_out_p),
|
||||
.tx_frame_out_n (tx_frame_out_n),
|
||||
.tx_frame_out_p (tx_frame_out_p),
|
||||
.spi_udc_clk_i (1'b0),
|
||||
.spi_udc_clk_o (spi_udc_sclk),
|
||||
.spi_udc_csn_i (1'b1),
|
||||
.spi_udc_csn_tx_o (spi_udc_csn_tx),
|
||||
.spi_udc_csn_rx_o (spi_udc_csn_rx),
|
||||
.spi_udc_mosi_i (spi_udc_data),
|
||||
.spi_udc_mosi_o (spi_udc_data),
|
||||
.spi_udc_miso_i (1'b0));
|
||||
|
||||
endmodule
|
||||
|
||||
// ***************************************************************************
|
||||
// ***************************************************************************
|
||||
Loading…
Reference in New Issue