adrv2crr_fmcxmwbr1: Merge with xmicrowave

main
StancaPop 2023-12-06 14:17:39 +02:00 committed by StancaPop
parent 1e4dc519fc
commit 4b8f3f06f7
7 changed files with 53 additions and 263 deletions

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@ -7,6 +7,33 @@ source ../../../scripts/adi_env.tcl
source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
source $ad_hdl_dir/projects/scripts/adi_board.tcl
##-----------------------------------------------------------------------------
# IMPORTANT: Set interface mode
#
# The get_env_param procedure retrieves parameter value from the environment if
# exists, other case returns the default value specified in its second parameter
# field.
#
# How to use over-writable parameters from the environment:
#
# e.g.
# make ADI_PRODUCTION = 1
#
# ADI_PRODUCTION - Defines the interface type (XMICROWAVE or FMCXMWBR1)
#
# LEGEND: 0 - XMICROWAVE - uses all the spi lines and gpios
# 1 - FMCXMWBR1 - used for production testing
#
##-----------------------------------------------------------------------------
set intf 0
if {[info exists ::env(ADI_PRODUCTION)]} {
set intf $::env(ADI_PRODUCTION)
} else {
set env(ADI_PRODUCTION) $intf
}
adi_project_create adrv9009zu11eg_fmcxmwbr1 0 [list \
RX_JESD_M [get_env_param RX_JESD_M 8] \
RX_JESD_L [get_env_param RX_JESD_L 4] \
@ -20,13 +47,23 @@ adi_project_create adrv9009zu11eg_fmcxmwbr1 0 [list \
] "xczu11eg-ffvf1517-2-i"
adi_project_files adrv9009zu11eg_fmcxmwbr1 [list \
"system_top.v" \
"system_constr.xdc"\
"../common/adrv9009zu11eg_spi.v" \
"../common/adrv9009zu11eg_constr.xdc" \
"../common/adrv2crr_fmc_constr.xdc" \
"$ad_hdl_dir/library/common/ad_iobuf.v" ]
switch $intf {
0 {
adi_project_files adrv9009zu11eg_fmcxmwbr1 [list \
"system_top_xmicrowave.v" ]
}
1 {
adi_project_files adrv9009zu11eg_fmcxmwbr1 [list \
"system_top_fmcxmwbr1.v" ]
}
}
## To improve timing in DDR4 MIG
set_property strategy Performance_ExploreWithRemap [get_runs impl_1]

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@ -26,7 +26,7 @@
//
// 2. An ADI specific BSD license, which can be found in the top level directory
// of this repository (LICENSE_ADIBSD), and also on-line at:
// https://github.com/analogdevicesinc/hdl/blob/main/LICENSE_ADIBSD
// https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
// This will allow to generate bit files and not release the source code,
// as long as it attaches to an ADI device.
//
@ -282,9 +282,9 @@ module system_top (
wire [94:0] gpio_o;
wire [94:0] gpio_t;
wire [63:0] xmicrowave_gpio_i;
wire [63:0] xmicrowave_gpio_o;
wire [63:0] xmicrowave_gpio_t;
wire [63:0] fmcxmwbr1_gpio_i;
wire [63:0] fmcxmwbr1_gpio_o;
wire [63:0] fmcxmwbr1_gpio_t;
wire [2:0] spi_csn;
wire [7:0] spi1_csn;
@ -365,14 +365,14 @@ module system_top (
assign gpio_i[31:28] = gpio_o[31:28];
assign gpio_i[21:20] = gpio_o[21:20];
assign xmicrowave_gpio_i[63:16] = xmicrowave_gpio_o[63:16];
assign fmcxmwbr1_gpio_i[63:16] = fmcxmwbr1_gpio_o[63:16];
ad_iobuf #(
.DATA_WIDTH(16)
) i_xmicrowave_iobuf (
.dio_t ({xmicrowave_gpio_t[15:0]}),
.dio_i ({xmicrowave_gpio_o[15:0]}),
.dio_o ({xmicrowave_gpio_i[15:0]}),
) i_fmcxmwbr1_iobuf (
.dio_t ({fmcxmwbr1_gpio_t[15:0]}),
.dio_i ({fmcxmwbr1_gpio_o[15:0]}),
.dio_o ({fmcxmwbr1_gpio_i[15:0]}),
.dio_p ({
dir_gpio7, // 15
dir_gpio6, // 14
@ -667,11 +667,11 @@ module system_top (
.iic_1_sda_io (sdaout1),
.iic_2_scl_io (sclout2),
.iic_2_sda_io (sdaout2),
.xmicrowave_gpio0_o(xmicrowave_gpio_o[31:0]),
.xmicrowave_gpio0_t(xmicrowave_gpio_t[31:0]),
.xmicrowave_gpio0_i(xmicrowave_gpio_i[31:0]),
.xmicrowave_gpio1_o(xmicrowave_gpio_o[63:32]),
.xmicrowave_gpio1_t(xmicrowave_gpio_t[63:32]),
.xmicrowave_gpio1_i(xmicrowave_gpio_i[63:32]));
.fmcxmwbr1_gpio0_o(fmcxmwbr1_gpio_o[31:0]),
.fmcxmwbr1_gpio0_t(fmcxmwbr1_gpio_t[31:0]),
.fmcxmwbr1_gpio0_i(fmcxmwbr1_gpio_i[31:0]),
.fmcxmwbr1_gpio1_o(fmcxmwbr1_gpio_o[63:32]),
.fmcxmwbr1_gpio1_t(fmcxmwbr1_gpio_t[63:32]),
.fmcxmwbr1_gpio1_i(fmcxmwbr1_gpio_i[63:32]));
endmodule

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@ -1,35 +0,0 @@
####################################################################################
## Copyright (c) 2018 - 2023 Analog Devices, Inc.
### SPDX short identifier: BSD-1-Clause
## Auto-generated, do not modify!
####################################################################################
PROJECT_NAME := adrv9009zu11eg_xmicrowave
M_DEPS += ../common/adrv9009zu11eg_spi.v
M_DEPS += ../common/adrv9009zu11eg_constr.xdc
M_DEPS += ../common/adrv9009zu11eg_bd.tcl
M_DEPS += ../common/adrv2crr_fmc_constr.xdc
M_DEPS += ../common/adrv2crr_fmc_bd.tcl
M_DEPS += ../../scripts/adi_pd.tcl
M_DEPS += ../../../library/jesd204/scripts/jesd204.tcl
M_DEPS += ../../../library/common/ad_iobuf.v
LIB_DEPS += axi_dmac
LIB_DEPS += axi_fan_control
LIB_DEPS += axi_i2s_adi
LIB_DEPS += axi_sysid
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
LIB_DEPS += jesd204/axi_jesd204_rx
LIB_DEPS += jesd204/axi_jesd204_tx
LIB_DEPS += jesd204/jesd204_rx
LIB_DEPS += jesd204/jesd204_tx
LIB_DEPS += sysid_rom
LIB_DEPS += util_pack/util_cpack2
LIB_DEPS += util_pack/util_upack2
LIB_DEPS += xilinx/axi_adxcvr
LIB_DEPS += xilinx/axi_dacfifo
LIB_DEPS += xilinx/util_adxcvr
include ../../scripts/project-xilinx.mk

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@ -1,115 +0,0 @@
###############################################################################
## Copyright (C) 2021-2023 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
source ../common/adrv9009zu11eg_bd.tcl
source ../common/adrv2crr_fmc_bd.tcl
source $ad_hdl_dir/projects/scripts/adi_pd.tcl
set mem_init_sys_path [get_env_param ADI_PROJECT_DIR ""]mem_init_sys.txt;
ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9
ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "[pwd]/$mem_init_sys_path"
ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9
sysid_gen_sys_init_file
# iic
create_bd_intf_port -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 iic_1
create_bd_intf_port -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 iic_2
ad_ip_instance axi_iic axi_iic_1
ad_connect iic_1 axi_iic_1/iic
ad_ip_instance axi_iic axi_iic_2
ad_connect iic_2 axi_iic_2/iic
# spi
create_bd_port -dir O -from 7 -to 0 spi1_csn_o
create_bd_port -dir I -from 7 -to 0 spi1_csn_i
create_bd_port -dir I spi1_clk_i
create_bd_port -dir O spi1_clk_o
create_bd_port -dir I spi1_sdo_i
create_bd_port -dir O spi1_sdo_o
create_bd_port -dir I spi1_sdi_i
ad_ip_instance axi_quad_spi axi_spi1
ad_ip_parameter axi_spi1 CONFIG.C_USE_STARTUP 0
ad_ip_parameter axi_spi1 CONFIG.C_NUM_SS_BITS 8
ad_ip_parameter axi_spi1 CONFIG.C_SCK_RATIO 16
ad_connect spi1_csn_i axi_spi1/ss_i
ad_connect spi1_csn_o axi_spi1/ss_o
ad_connect spi1_clk_i axi_spi1/sck_i
ad_connect spi1_clk_o axi_spi1/sck_o
ad_connect spi1_sdo_i axi_spi1/io0_i
ad_connect spi1_sdo_o axi_spi1/io0_o
ad_connect spi1_sdi_i axi_spi1/io1_i
set_property -dict [list CONFIG.PSU__FPGA_PL3_ENABLE {1} CONFIG.PSU__CRL_APB__PL3_REF_CTRL__SRCSEL {IOPLL} CONFIG.PSU__CRL_APB__PL3_REF_CTRL__FREQMHZ {8}] [get_bd_cells sys_ps8]
ad_connect sys_ps8/pl_clk3 axi_spi1/ext_spi_clk
create_bd_port -dir O -from 7 -to 0 spi2_csn_o
create_bd_port -dir I -from 7 -to 0 spi2_csn_i
create_bd_port -dir I spi2_clk_i
create_bd_port -dir O spi2_clk_o
create_bd_port -dir I spi2_sdo_i
create_bd_port -dir O spi2_sdo_o
create_bd_port -dir I spi2_sdi_i
ad_ip_instance axi_quad_spi axi_spi2
ad_ip_parameter axi_spi2 CONFIG.C_USE_STARTUP 0
ad_ip_parameter axi_spi2 CONFIG.C_NUM_SS_BITS 8
ad_ip_parameter axi_spi2 CONFIG.C_SCK_RATIO 16
ad_connect spi2_csn_i axi_spi2/ss_i
ad_connect spi2_csn_o axi_spi2/ss_o
ad_connect spi2_clk_i axi_spi2/sck_i
ad_connect spi2_clk_o axi_spi2/sck_o
ad_connect spi2_sdo_i axi_spi2/io0_i
ad_connect spi2_sdo_o axi_spi2/io0_o
ad_connect spi2_sdi_i axi_spi2/io1_i
ad_connect axi_spi2/ext_spi_clk sys_ps8/pl_clk3
# gpio
create_bd_port -dir I -from 31 -to 0 xmicrowave_gpio0_i
create_bd_port -dir O -from 31 -to 0 xmicrowave_gpio0_o
create_bd_port -dir O -from 31 -to 0 xmicrowave_gpio0_t
create_bd_port -dir I -from 31 -to 0 xmicrowave_gpio1_i
create_bd_port -dir O -from 31 -to 0 xmicrowave_gpio1_o
create_bd_port -dir O -from 31 -to 0 xmicrowave_gpio1_t
ad_ip_instance axi_gpio axi_xmicrowave_gpio
ad_ip_parameter axi_xmicrowave_gpio CONFIG.C_IS_DUAL 1
ad_ip_parameter axi_xmicrowave_gpio CONFIG.C_GPIO_WIDTH 32
ad_ip_parameter axi_xmicrowave_gpio CONFIG.C_GPIO2_WIDTH 32
ad_ip_parameter axi_xmicrowave_gpio CONFIG.C_INTERRUPT_PRESENT 1
ad_connect xmicrowave_gpio0_i axi_xmicrowave_gpio/gpio_io_i
ad_connect xmicrowave_gpio0_o axi_xmicrowave_gpio/gpio_io_o
ad_connect xmicrowave_gpio0_t axi_xmicrowave_gpio/gpio_io_t
ad_connect xmicrowave_gpio1_i axi_xmicrowave_gpio/gpio2_io_i
ad_connect xmicrowave_gpio1_o axi_xmicrowave_gpio/gpio2_io_o
ad_connect xmicrowave_gpio1_t axi_xmicrowave_gpio/gpio2_io_t
# AXI address definitions
ad_cpu_interconnect 0x43000000 axi_iic_1
ad_cpu_interconnect 0x43100000 axi_iic_2
ad_cpu_interconnect 0x44000000 axi_spi1
ad_cpu_interconnect 0x44500000 axi_spi2
ad_cpu_interconnect 0x46000000 axi_xmicrowave_gpio
# interrupts
ad_cpu_interrupt "ps-1" "mb-1" axi_iic_1/iic2intc_irpt
ad_cpu_interrupt "ps-2" "mb-2" axi_iic_2/iic2intc_irpt
ad_cpu_interrupt "ps-3" "mb-3" axi_spi1/ip2intc_irpt
ad_cpu_interrupt "ps-4" "mb-4" axi_spi2/ip2intc_irpt
ad_cpu_interrupt "ps-5" "mb-5" axi_xmicrowave_gpio/ip2intc_irpt

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@ -1,64 +0,0 @@
###############################################################################
## Copyright (C) 2021-2023 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
# gpios
set_property -dict {PACKAGE_PIN AG22 IOSTANDARD LVCMOS18} [get_ports gpio0] ; ## LA10_P IO_L20P_T3L_N2_AD1P_67
set_property -dict {PACKAGE_PIN AG23 IOSTANDARD LVCMOS18} [get_ports gpio1] ; ## LA10_N IO_L20N_T3L_N3_AD1N_67
set_property -dict {PACKAGE_PIN H31 IOSTANDARD LVCMOS18} [get_ports gpio2] ; ## LA13_P IO_L8P_T1L_N2_AD5P_68
set_property -dict {PACKAGE_PIN H32 IOSTANDARD LVCMOS18} [get_ports gpio3] ; ## LA13_N IO_L8N_T1L_N3_AD5N_68
set_property -dict {PACKAGE_PIN AJ26 IOSTANDARD LVCMOS18} [get_ports gpio4] ; ## LA05_N IO_L21N_T3L_N5_AD8N_67
set_property -dict {PACKAGE_PIN AJ25 IOSTANDARD LVCMOS18} [get_ports gpio5] ; ## LA05_P IO_L21P_T3L_N4_AD8P_67
set_property -dict {PACKAGE_PIN AJ22 IOSTANDARD LVCMOS18} [get_ports gpio6] ; ## LA06_N IO_L22N_T3U_N7_DBC_AD0N_67
set_property -dict {PACKAGE_PIN AH22 IOSTANDARD LVCMOS18} [get_ports gpio7] ; ## LA06_P IO_L22P_T3U_N6_DBC_AD0P_67
# gpio directions
set_property -dict {PACKAGE_PIN AT25 IOSTANDARD LVCMOS18} [get_ports dir_gpio0] ; ## LA04_N IO_L9N_T1L_N5_AD12N_67
set_property -dict {PACKAGE_PIN AR25 IOSTANDARD LVCMOS18} [get_ports dir_gpio1] ; ## LA04_P IO_L9P_T1L_N4_AD12P_67
set_property -dict {PACKAGE_PIN AK25 IOSTANDARD LVCMOS18} [get_ports dir_gpio2] ; ## LA03_N IO_L19N_T3L_N1_DBC_AD9N_67
set_property -dict {PACKAGE_PIN AK24 IOSTANDARD LVCMOS18} [get_ports dir_gpio3] ; ## LA03_P IO_L19P_T3L_N0_DBC_AD9P_67
set_property -dict {PACKAGE_PIN AW27 IOSTANDARD LVCMOS18} [get_ports dir_gpio4] ; ## LA02_N IO_L1N_T0L_N1_DBC_67
set_property -dict {PACKAGE_PIN AW26 IOSTANDARD LVCMOS18} [get_ports dir_gpio5] ; ## LA02_P IO_L1P_T0L_N0_DBC_67
set_property -dict {PACKAGE_PIN AR24 IOSTANDARD LVCMOS18} [get_ports dir_gpio6] ; ## LA00_N_CC IO_L12N_T1U_N11_GC_67
set_property -dict {PACKAGE_PIN AP24 IOSTANDARD LVCMOS18} [get_ports dir_gpio7] ; ## LA00_P_CC IO_L12P_T1U_N10_GC_67
# iic
set_property -dict {PACKAGE_PIN A37 IOSTANDARD LVCMOS18} [get_ports sclout1] ; ## LA26_P IO_L24P_T3U_N10_68
set_property -dict {PACKAGE_PIN A38 IOSTANDARD LVCMOS18} [get_ports sdaout1] ; ## LA26_N IO_L24N_T3U_N11_68
set_property -dict {PACKAGE_PIN F38 IOSTANDARD LVCMOS18} [get_ports sclout2] ; ## LA23_P IO_L2P_T0L_N2_68
set_property -dict {PACKAGE_PIN E38 IOSTANDARD LVCMOS18} [get_ports sdaout2] ; ## LA23_N IO_L2N_T0L_N3_68
set_property PULLUP true [get_ports sclout1]
set_property PULLUP true [get_ports sdaout1]
set_property PULLUP true [get_ports sclout2]
set_property PULLUP true [get_ports sdaout2]
# spi
set_property -dict {PACKAGE_PIN AM24 IOSTANDARD LVCMOS18} [get_ports spi1_clk] ; ## LA16_N IO_L18N_T2U_N11_AD2N_67
set_property -dict {PACKAGE_PIN J32 IOSTANDARD LVCMOS18} [get_ports spi1_copi] ; ## LA20_P IO_L7P_T1L_N0_QBC_AD13P_68
set_property -dict {PACKAGE_PIN H33 IOSTANDARD LVCMOS18} [get_ports spi1_cipo] ; ## LA20_N IO_L7N_T1L_N1_QBC_AD13N_68
set_property -dict {PACKAGE_PIN B38 IOSTANDARD LVCMOS18} [get_ports spi1_cs0] ; ## LA25_N IO_L21N_T3L_N5_AD8N_68
set_property -dict {PACKAGE_PIN C37 IOSTANDARD LVCMOS18} [get_ports spi1_cs1] ; ## LA25_P IO_L21P_T3L_N4_AD8P_68
set_property -dict {PACKAGE_PIN B34 IOSTANDARD LVCMOS18} [get_ports spi1_cs2] ; ## LA21_N IO_L16N_T2U_N7_QBC_AD3N_68
set_property -dict {PACKAGE_PIN B33 IOSTANDARD LVCMOS18} [get_ports spi1_cs3] ; ## LA21_P IO_L16P_T2U_N6_QBC_AD3P_68
set_property -dict {PACKAGE_PIN H39 IOSTANDARD LVCMOS18} [get_ports spi1_cs4] ; ## LA22_N IO_L1N_T0L_N1_DBC_68
set_property -dict {PACKAGE_PIN H38 IOSTANDARD LVCMOS18} [get_ports spi1_cs5] ; ## LA22_P IO_L1P_T0L_N0_DBC_68
set_property -dict {PACKAGE_PIN C39 IOSTANDARD LVCMOS18} [get_ports spi1_cs6] ; ## LA19_N IO_L20N_T3L_N3_AD1N_68
set_property -dict {PACKAGE_PIN C38 IOSTANDARD LVCMOS18} [get_ports spi1_cs7] ; ## LA19_P IO_L20P_T3L_N2_AD1P_68
set_property -dict {PACKAGE_PIN AT22 IOSTANDARD LVCMOS18} [get_ports spi2_clk] ; ## LA24_N IO_L8N_T1L_N3_AD5N_67
set_property -dict {PACKAGE_PIN E35 IOSTANDARD LVCMOS18} [get_ports spi2_copi] ; ## LA28_P IO_L13P_T2L_N0_GC_QBC_68
set_property -dict {PACKAGE_PIN D35 IOSTANDARD LVCMOS18} [get_ports spi2_cipo] ; ## LA28_N IO_L13N_T2L_N1_GC_QBC_68
set_property -dict {PACKAGE_PIN A32 IOSTANDARD LVCMOS18} [get_ports spi2_cs0] ; ## LA31_P IO_L18P_T2U_N10_AD2P_68
set_property -dict {PACKAGE_PIN A33 IOSTANDARD LVCMOS18} [get_ports spi2_cs1] ; ## LA31_N IO_L18N_T2U_N11_AD2N_68
set_property -dict {PACKAGE_PIN AK22 IOSTANDARD LVCMOS18} [get_ports spi2_cs2] ; ## LA30_P IO_L24P_T3U_N10_67
set_property -dict {PACKAGE_PIN AK23 IOSTANDARD LVCMOS18} [get_ports spi2_cs3] ; ## LA30_N IO_L24N_T3U_N11_67
set_property -dict {PACKAGE_PIN D32 IOSTANDARD LVCMOS18} [get_ports spi2_cs4] ; ## LA33_P IO_L17P_T2U_N8_AD10P_68
set_property -dict {PACKAGE_PIN C32 IOSTANDARD LVCMOS18} [get_ports spi2_cs5] ; ## LA33_N IO_L17N_T2U_N9_AD10N_68
set_property -dict {PACKAGE_PIN G33 IOSTANDARD LVCMOS18} [get_ports spi2_cs6] ; ## LA32_P IO_L9P_T1L_N4_AD12P_68
set_property -dict {PACKAGE_PIN G34 IOSTANDARD LVCMOS18} [get_ports spi2_cs7] ; ## LA32_N IO_L9N_T1L_N5_AD12N_68

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@ -1,33 +0,0 @@
###############################################################################
## Copyright (C) 2019-2023 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
source ../../../scripts/adi_env.tcl
source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
source $ad_hdl_dir/projects/scripts/adi_board.tcl
adi_project_create adrv9009zu11eg_xmicrowave 0 [list \
RX_JESD_M [get_env_param RX_JESD_M 8] \
RX_JESD_L [get_env_param RX_JESD_L 4] \
RX_JESD_S [get_env_param RX_JESD_S 1] \
TX_JESD_M [get_env_param TX_JESD_M 8] \
TX_JESD_L [get_env_param TX_JESD_L 8] \
TX_JESD_S [get_env_param TX_JESD_S 1] \
RX_OS_JESD_M [get_env_param RX_OS_JESD_M 4] \
RX_OS_JESD_L [get_env_param RX_OS_JESD_L 4] \
RX_OS_JESD_S [get_env_param RX_OS_JESD_S 1] \
] "xczu11eg-ffvf1517-2-i"
adi_project_files adrv9009zu11eg_xmicrowave [list \
"system_top.v" \
"system_constr.xdc"\
"../common/adrv9009zu11eg_spi.v" \
"../common/adrv9009zu11eg_constr.xdc" \
"../common/adrv2crr_fmc_constr.xdc" \
"$ad_hdl_dir/library/common/ad_iobuf.v" ]
## To improve timing in DDR4 MIG
set_property strategy Performance_ExploreWithRemap [get_runs impl_1]
adi_project_run adrv9009zu11eg_xmicrowave