zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

ad9152: altera syntax error

main
Rejeesh Kutty 2015-12-11 12:49:00 -05:00
parent da2e1bdc9a
commit 4c2d08a9be
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
library/axi_ad9152/axi_ad9152_hw.tcl
View File

@ -85,12 +85,12 @@ ad_alt_intf clock dac_clk output 1
add_interface fifo_ch_0_out conduit end
add_interface_port fifo_ch_0_out dac_enable_0 enable Output 1
add_interface_port fifo_ch_0_out dac_valid_0 valid Output 1
add_interface_port fifo_ch_0_out dac_data_0 data Input 64
add_interface_port fifo_ch_0_out dac_ddata_0 data Input 64
add_interface fifo_ch_1_out conduit end
add_interface_port fifo_ch_1_out dac_enable_1 enable Output 1
add_interface_port fifo_ch_1_out dac_valid_1 valid Output 1
add_interface_port fifo_ch_1_out dac_data_1 data Input 64
add_interface_port fifo_ch_1_out dac_ddata_1 data Input 64
ad_alt_intf signal dac_dovf input 1 ovf
ad_alt_intf signal dac_dunf input 1 unf