From 4d4f66fbdd5789017031fb1b40ac9859badacb7d Mon Sep 17 00:00:00 2001 From: Rejeesh Kutty Date: Sun, 4 May 2014 10:38:53 -0400 Subject: [PATCH] a5soc: increase pipeline for qsys --- .gitignore | 23 + projects/common/a5soc/a5soc_system_assign.tcl | 41 +- projects/fmcjesdadc1/a5soc/system_bd.qsys | 609 ++++++++++++++++-- projects/fmcjesdadc1/a5soc/system_constr.sdc | 25 +- projects/fmcjesdadc1/a5soc/system_top.v | 43 +- 5 files changed, 664 insertions(+), 77 deletions(-) diff --git a/.gitignore b/.gitignore index 9dfb0099f..b5e0f97bc 100644 --- a/.gitignore +++ b/.gitignore @@ -9,3 +9,26 @@ xgui *.srcs *.sdk .Xil +*_INFO.txt +*_dump.txt +db +*.asm.rpt +*.done +*.eda.rpt +*.fit.* +*.map.* +*.sta.* +*.qsf +*.qpf +*.qws +*.sof +hc_output +hps_isw_handoff +hps_sdram_*.csv +incremental_db +reconfig_mif +*.sopcinfo +*.jdi +*.pin + + diff --git a/projects/common/a5soc/a5soc_system_assign.tcl b/projects/common/a5soc/a5soc_system_assign.tcl index 2e79736f1..cdf1016d5 100755 --- a/projects/common/a5soc/a5soc_system_assign.tcl +++ b/projects/common/a5soc/a5soc_system_assign.tcl @@ -1,9 +1,48 @@ # clocks -set_location_assignment PIN_AU32 -to sys_clk +set_location_assignment PIN_AL20 -to sys_clk set_instance_assignment -name IO_STANDARD "1.5 V" -to sys_clk +# hdmi +# data[6] (C23) and data[10] (C22) are not populated +# replacing with C19) and C18 for now + +set_location_assignment PIN_A21 -to hdmi_out_clk +set_location_assignment PIN_B25 -to hdmi_data[0] +set_location_assignment PIN_A25 -to hdmi_data[1] +set_location_assignment PIN_A24 -to hdmi_data[2] +set_location_assignment PIN_T25 -to hdmi_data[3] +set_location_assignment PIN_A23 -to hdmi_data[4] +set_location_assignment PIN_P22 -to hdmi_data[5] +set_location_assignment PIN_T27 -to hdmi_data[6] +set_location_assignment PIN_T26 -to hdmi_data[7] +set_location_assignment PIN_N22 -to hdmi_data[8] +set_location_assignment PIN_T21 -to hdmi_data[9] +set_location_assignment PIN_R26 -to hdmi_data[10] +set_location_assignment PIN_D20 -to hdmi_data[11] +set_location_assignment PIN_R21 -to hdmi_data[12] +set_location_assignment PIN_F22 -to hdmi_data[13] +set_location_assignment PIN_C20 -to hdmi_data[14] +set_location_assignment PIN_E22 -to hdmi_data[15] +set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_out_clk +set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_data[0] +set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_data[1] +set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_data[2] +set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_data[3] +set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_data[4] +set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_data[5] +set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_data[6] +set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_data[7] +set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_data[8] +set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_data[9] +set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_data[10] +set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_data[11] +set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_data[12] +set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_data[13] +set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_data[14] +set_instance_assignment -name IO_STANDARD "2.5 V" -to hdmi_data[15] + # ethernet set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to eth1_tx_clk diff --git a/projects/fmcjesdadc1/a5soc/system_bd.qsys b/projects/fmcjesdadc1/a5soc/system_bd.qsys index 3316de6a9..5b05981d0 100755 --- a/projects/fmcjesdadc1/a5soc/system_bd.qsys +++ b/projects/fmcjesdadc1/a5soc/system_bd.qsys @@ -16,7 +16,7 @@ { datum baseAddress { - value = "66576"; + value = "83280"; type = "String"; } } @@ -24,11 +24,55 @@ { datum _sortIndex { - value = "9"; + value = "13"; type = "int"; } + datum sopceditor_expanded + { + value = "1"; + type = "boolean"; + } } element axi_ad9250_1 + { + datum _sortIndex + { + value = "15"; + type = "int"; + } + datum sopceditor_expanded + { + value = "1"; + type = "boolean"; + } + } + element axi_dmac_0 + { + datum _sortIndex + { + value = "14"; + type = "int"; + } + datum sopceditor_expanded + { + value = "1"; + type = "boolean"; + } + } + element axi_dmac_1 + { + datum _sortIndex + { + value = "16"; + type = "int"; + } + datum sopceditor_expanded + { + value = "1"; + type = "boolean"; + } + } + element axi_hdmi_dma { datum _sortIndex { @@ -36,15 +80,7 @@ type = "int"; } } - element axi_dmac_0 - { - datum _sortIndex - { - value = "10"; - type = "int"; - } - } - element axi_dmac_1 + element axi_hdmi_tx { datum _sortIndex { @@ -56,7 +92,15 @@ { datum baseAddress { - value = "66584"; + value = "83288"; + type = "String"; + } + } + element axi_hdmi_dma.csr + { + datum baseAddress + { + value = "83200"; type = "String"; } } @@ -88,15 +132,15 @@ { datum baseAddress { - value = "65536"; + value = "81920"; type = "String"; } } - element sys_gpio.s1 + element sys_hdmi_pll_reconfig.mgmt_avalon_slave { datum baseAddress { - value = "66560"; + value = "82944"; type = "String"; } } @@ -108,15 +152,23 @@ type = "String"; } } - element axi_dmac_0.s_axi + element sys_gpio.s1 { datum baseAddress { - value = "32768"; + value = "83264"; type = "String"; } } element axi_ad9250_0.s_axi + { + datum baseAddress + { + value = "65536"; + type = "String"; + } + } + element axi_dmac_0.s_axi { datum baseAddress { @@ -128,7 +180,15 @@ { datum baseAddress { - value = "16384"; + value = "32768"; + type = "String"; + } + } + element axi_hdmi_tx.s_axi + { + datum baseAddress + { + value = "0"; type = "String"; } } @@ -136,7 +196,7 @@ { datum baseAddress { - value = "0"; + value = "16384"; type = "String"; } } @@ -156,6 +216,22 @@ type = "int"; } } + element sys_hdmi_pll + { + datum _sortIndex + { + value = "9"; + type = "int"; + } + } + element sys_hdmi_pll_reconfig + { + datum _sortIndex + { + value = "10"; + type = "int"; + } + } element sys_hps { datum _sortIndex @@ -184,33 +260,53 @@ { datum _sortIndex { - value = "16"; + value = "20"; type = "int"; } + datum sopceditor_expanded + { + value = "1"; + type = "boolean"; + } } element sys_jesd204b_s1_pll { datum _sortIndex { - value = "14"; + value = "18"; type = "int"; } + datum sopceditor_expanded + { + value = "1"; + type = "boolean"; + } } element sys_jesd204b_s1_ref_clk { datum _sortIndex { - value = "13"; + value = "17"; type = "int"; } + datum sopceditor_expanded + { + value = "1"; + type = "boolean"; + } } element sys_jesd204b_s1_rx_clk { datum _sortIndex { - value = "15"; + value = "19"; type = "int"; } + datum sopceditor_expanded + { + value = "1"; + type = "boolean"; + } } element sys_jtag_hps_axi { @@ -255,7 +351,7 @@ - + fmcjesdadc1_a5soc.qpf @@ -453,6 +549,31 @@ internal="sys_gpio.external_connection" type="conduit" dir="end" /> + + + + + @@ -671,6 +792,7 @@ + @@ -848,20 +970,20 @@ Yes,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,Yes,Yes,No,No,No,Yes,No,Yes,No,Yes,Yes,No,No,No,No,No,No,No,Yes,No,No,No,No,Yes,Yes,Yes,Yes,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No - + - + - - - - - + + + + + @@ -946,7 +1068,7 @@ name="sys_id"> - + - + - + @@ -1031,7 +1153,7 @@ - + @@ -1050,13 +1172,13 @@ - + - + @@ -1075,7 +1197,7 @@ - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Automatic Switchover + + + + + + + Create an adjpllin signal to connect with an upstream PLL + + + + + + + + + + + + + + + + + + + + + + + + + @@ -1363,7 +1731,7 @@ start="sys_jtag_pl.master" end="sys_uart.avalon_jtag_slave"> - + - + - + - + - + - + - + - + - - - + - + - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - + + diff --git a/projects/fmcjesdadc1/a5soc/system_constr.sdc b/projects/fmcjesdadc1/a5soc/system_constr.sdc index d4f1af9b8..d777aa616 100755 --- a/projects/fmcjesdadc1/a5soc/system_constr.sdc +++ b/projects/fmcjesdadc1/a5soc/system_constr.sdc @@ -1,18 +1,25 @@ -create_clock -period "20.000 ns" -name clk_50m [get_ports {sys_clk}] -create_clock -period "4.000 ns" -name clk_250m [get_ports {ref_clk}] -create_clock -period "5.000 ns" -name clk_200m [get_pins {i_system_bd|sys_hps|fpga_interfaces|clocks_resets|h2f_user0_clk}] +create_clock -period "10.000 ns" -name clk_100m [get_ports {sys_clk}] +create_clock -period "4.000 ns" -name clk_250m [get_ports {ref_clk}] +create_clock -period "6.666 ns" -name clk_150m [get_pins {i_system_bd|sys_hps|fpga_interfaces|clocks_resets|h2f_user0_clk}] derive_pll_clocks derive_clock_uncertainty +set clk_148m [get_clocks {i_system_bd|sys_hdmi_pll|altera_pll_i|arriav_pll|counter[0].output_counter|divclk}] set clk_rxlink [get_clocks {i_system_bd|sys_jesd204b_s1_pll|altera_pll_i|general[0].gpll~PLL_OUTPUT_COUNTER|divclk}] -set_false_path -from clk_50m -to clk_200m -set_false_path -from clk_50m -to $clk_rxlink -set_false_path -from clk_200m -to clk_50m -set_false_path -from clk_200m -to $clk_rxlink -set_false_path -from $clk_rxlink -to clk_50m -set_false_path -from $clk_rxlink -to clk_200m +set_false_path -from clk_100m -to clk_150m +set_false_path -from clk_100m -to $clk_148m +set_false_path -from clk_100m -to $clk_rxlink +set_false_path -from clk_150m -to clk_100m +set_false_path -from clk_150m -to $clk_148m +set_false_path -from clk_150m -to $clk_rxlink +set_false_path -from $clk_rxlink -to clk_100m +set_false_path -from $clk_rxlink -to clk_150m +set_false_path -from $clk_rxlink -to $clk_148m +set_false_path -from $clk_148m -to clk_100m +set_false_path -from $clk_148m -to clk_150m +set_false_path -from $clk_148m -to $clk_rxlink diff --git a/projects/fmcjesdadc1/a5soc/system_top.v b/projects/fmcjesdadc1/a5soc/system_top.v index 7c49e903f..e5feda392 100755 --- a/projects/fmcjesdadc1/a5soc/system_top.v +++ b/projects/fmcjesdadc1/a5soc/system_top.v @@ -133,6 +133,11 @@ module system_top ( push_buttons, dip_switches, + // hdmi + + hdmi_out_clk, + hdmi_data, + // lane interface ref_clk, @@ -240,6 +245,11 @@ module system_top ( input [ 3:0] push_buttons; input [ 3:0] dip_switches; + // hdmi + + output hdmi_out_clk; + output [ 3:0] hdmi_data; + // lane interface input ref_clk; @@ -259,6 +269,8 @@ module system_top ( reg rx_sysref_m2 = 'd0; reg rx_sysref_m3 = 'd0; reg rx_sysref = 'd0; + reg [ 63:0] sys_hdmi_pll_reconfig_in = 'd0; + reg [ 63:0] sys_hdmi_pll_reconfig_reconfig_in = 'd0; // internal clocks and resets @@ -301,6 +313,10 @@ module system_top ( wire [ 3:0] rx_cal_busy_s; wire rx_pll_locked_s; wire [ 15:0] rx_xcvr_status_s; + wire [ 63:0] sys_hdmi_pll_reconfig_out; + wire [ 63:0] sys_hdmi_pll_reconfig_reconfig_out; + + // instantiations always @(posedge rx_clk) begin rx_sysref_m1 <= rx_sysref_s; @@ -373,6 +389,13 @@ module system_top ( .spi3_clk (spi_clk), .spi3_sdio (spi_sdio)); + // pipe line to fix timing + + always @(posedge sys_clk) begin + sys_hdmi_pll_reconfig_in <= sys_hdmi_pll_reconfig_reconfig_out; + sys_hdmi_pll_reconfig_reconfig_in <= sys_hdmi_pll_reconfig_out; + end + system_bd i_system_bd ( .memory_mem_a (ddr3_a), .memory_mem_ba (ddr3_ba), @@ -516,7 +539,25 @@ module system_top ( .hps_io_hps_io_gpio_inst_GPIO43 (gpio_gpio43), .sys_hps_h2f_reset_reset_n (sys_resetn), .sys_gpio_external_connection_in_port ({rx_xcvr_status_s, 4'd0, push_buttons, 4'd0, dip_switches}), - .sys_gpio_external_connection_out_port ({14'd0, rx_sw_rstn_s, rx_sysref_s, 12'd0, led})); + .sys_gpio_external_connection_out_port ({14'd0, rx_sw_rstn_s, rx_sysref_s, 12'd0, led}), + .axi_hdmi_tx_0_hdmi_if_h_clk (hdmi_out_clk), + .axi_hdmi_tx_0_hdmi_if_h16_hsync (), + .axi_hdmi_tx_0_hdmi_if_h16_vsync (), + .axi_hdmi_tx_0_hdmi_if_h16_data_e (), + .axi_hdmi_tx_0_hdmi_if_h16_data (), + .axi_hdmi_tx_0_hdmi_if_h16_es_data (hdmi_data), + .axi_hdmi_tx_0_hdmi_if_h24_hsync (), + .axi_hdmi_tx_0_hdmi_if_h24_vsync (), + .axi_hdmi_tx_0_hdmi_if_h24_data_e (), + .axi_hdmi_tx_0_hdmi_if_h24_data (), + .axi_hdmi_tx_0_hdmi_if_h36_hsync (), + .axi_hdmi_tx_0_hdmi_if_h36_vsync (), + .axi_hdmi_tx_0_hdmi_if_h36_data_e (), + .axi_hdmi_tx_0_hdmi_if_h36_data (), + .sys_hdmi_pll_reconfig_to_pll_reconfig_to_pll (sys_hdmi_pll_reconfig_in), + .sys_hdmi_pll_reconfig_from_pll_reconfig_from_pll (sys_hdmi_pll_reconfig_out), + .sys_hdmi_pll_reconfig_reconfig_to_pll_reconfig_to_pll (sys_hdmi_pll_reconfig_reconfig_out), + .sys_hdmi_pll_reconfig_reconfig_from_pll_reconfig_from_pll (sys_hdmi_pll_reconfig_reconfig_in)); endmodule