util_wfifo: Cosmetic changes.
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@ -1,9 +1,9 @@
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// ***************************************************************************
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// ***************************************************************************
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// Copyright 2011(c) Analog Devices, Inc.
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//
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//
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// All rights reserved.
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//
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//
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// Redistribution and use in source and binary forms, with or without modification,
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// are permitted provided that the following conditions are met:
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// - Redistributions of source code must retain the above copyright
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@ -21,16 +21,16 @@
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// patent holders to use this software.
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// - Use of the software either in source or binary form, must be run
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// on or directly connected to an Analog Devices Inc. component.
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//
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//
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// THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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// INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT, MERCHANTABILITY AND FITNESS FOR A
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// PARTICULAR PURPOSE ARE DISCLAIMED.
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//
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// IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, INTELLECTUAL PROPERTY
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// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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// RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
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// STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
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// THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// ***************************************************************************
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// ***************************************************************************
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@ -182,20 +182,20 @@ module util_wfifo (
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reg [ 7:0] din_enable = 'd0;
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reg [ 2:0] din_dcnt = 'd0;
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reg din_wr = 'd0;
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reg [(ADDRESS_WIDTH-1):0] din_waddr = 'd0;
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reg [(ADDRESS_WIDTH-1):0] din_waddr = 'd0;
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reg din_waddr_rel_t = 'd0;
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reg [(ADDRESS_WIDTH-1):0] din_waddr_rel = 'd0;
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reg [(ADDRESS_WIDTH-1):0] din_waddr_rel = 'd0;
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reg [ 2:0] din_ovf_m = 'd0;
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reg din_ovf = 'd0;
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reg [ 2:0] dout_waddr_rel_t_m = 'd0;
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reg [(ADDRESS_WIDTH-1):0] dout_waddr_rel = 'd0;
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reg [(ADDRESS_WIDTH-1):0] dout_waddr_rel = 'd0;
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reg dout_ovf_int = 'd0;
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reg [ 7:0] dout_enable_m = 'd0;
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reg [ 7:0] dout_enable = 'd0;
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reg dout_rd = 'd0;
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reg dout_rd_d = 'd0;
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reg [(DATA_WIDTH-1):0] dout_rdata_d = 'd0;
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reg [(ADDRESS_WIDTH-1):0] dout_raddr = 'd0;
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reg [(ADDRESS_WIDTH-1):0] dout_raddr = 'd0;
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// internal signals
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