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fmcadc2: update adcfifo/dacfifo

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Laszlo Nagy 2019-01-22 13:20:15 +00:00 committed by Laszlo Nagy
parent 27f1e4eaed
commit 51e35e081f
3 changed files with 6 additions and 6 deletions
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6
projects/fmcadc2/common/fmcadc2_bd.tcl
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@ -1,6 +1,10 @@
source $ad_hdl_dir/library/jesd204/scripts/jesd204.tcl
set adc_fifo_name axi_ad9625_fifo
set adc_data_width 256
set adc_dma_data_width 64
# adc peripherals
ad_ip_instance axi_ad9625 axi_ad9625_core
@ -28,6 +32,8 @@ ad_ip_parameter axi_ad9625_dma CONFIG.CYCLIC 0
ad_ip_parameter axi_ad9625_dma CONFIG.DMA_DATA_WIDTH_SRC 64
ad_ip_parameter axi_ad9625_dma CONFIG.DMA_DATA_WIDTH_DEST 64
ad_adcfifo_create $adc_fifo_name $adc_data_width $adc_dma_data_width $adc_fifo_address_width
ad_ip_instance util_adxcvr util_fmcadc2_xcvr
ad_ip_parameter util_fmcadc2_xcvr CONFIG.QPLL_FBDIV 0x80 ;# N = 40
ad_ip_parameter util_fmcadc2_xcvr CONFIG.CPLL_FBDIV 1

3
projects/fmcadc2/vc707/system_bd.tcl
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@ -1,9 +1,6 @@
## FIFO depth is 16Mb - 1M samples
set adc_fifo_name axi_ad9625_fifo
set adc_fifo_address_width 18
set adc_data_width 256
set adc_dma_data_width 64
## NOTE: With this configuration the #36Kb BRAM utilization is at ~68%

3
projects/fmcadc2/zc706/system_bd.tcl
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@ -1,8 +1,5 @@
set adc_fifo_name axi_ad9625_fifo
set adc_fifo_address_width 18
set adc_data_width 256
set adc_dma_data_width 64
source $ad_hdl_dir/projects/common/zc706/zc706_system_bd.tcl
source $ad_hdl_dir/projects/common/zc706/zc706_plddr3_adcfifo_bd.tcl