ad9371-hw- add dsp slice
parent
5b2a90ffff
commit
54f398cc36
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@ -15,6 +15,7 @@ set_module_property DISPLAY_NAME axi_ad9371
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add_fileset quartus_synth QUARTUS_SYNTH "" "Quartus Synthesis"
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add_fileset quartus_synth QUARTUS_SYNTH "" "Quartus Synthesis"
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set_fileset_property quartus_synth TOP_LEVEL axi_ad9371
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set_fileset_property quartus_synth TOP_LEVEL axi_ad9371
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add_fileset_file MULT_MACRO.v VERILOG PATH $ad_hdl_dir/library/common/altera/MULT_MACRO.v
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add_fileset_file MULT_MACRO.v VERILOG PATH $ad_hdl_dir/library/common/altera/MULT_MACRO.v
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add_fileset_file DSP48E1.v VERILOG PATH $ad_hdl_dir/library/common/altera/DSP48E1.v
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add_fileset_file ad_rst.v VERILOG PATH $ad_hdl_dir/library/common/ad_rst.v
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add_fileset_file ad_rst.v VERILOG PATH $ad_hdl_dir/library/common/ad_rst.v
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add_fileset_file ad_mul.v VERILOG PATH $ad_hdl_dir/library/common/ad_mul.v
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add_fileset_file ad_mul.v VERILOG PATH $ad_hdl_dir/library/common/ad_mul.v
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add_fileset_file ad_dds_sine.v VERILOG PATH $ad_hdl_dir/library/common/ad_dds_sine.v
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add_fileset_file ad_dds_sine.v VERILOG PATH $ad_hdl_dir/library/common/ad_dds_sine.v
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