From 559e00fd758af38f8b1194d18e273d5106bc6551 Mon Sep 17 00:00:00 2001 From: Istvan Csomortani Date: Wed, 5 Sep 2018 09:32:28 +0100 Subject: [PATCH] adrv9009/zcu102: Increase DAC buffer depth to 18Mb --- projects/adrv9009/zcu102/system_bd.tcl | 5 ++++- projects/adrv9009/zcu102/system_project.tcl | 3 +++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/projects/adrv9009/zcu102/system_bd.tcl b/projects/adrv9009/zcu102/system_bd.tcl index cc5a801de..05ea48711 100644 --- a/projects/adrv9009/zcu102/system_bd.tcl +++ b/projects/adrv9009/zcu102/system_bd.tcl @@ -1,9 +1,12 @@ +## FIFO depth is 18Mb - 1M samples set dac_fifo_name axi_adrv9009_dacfifo -set dac_fifo_address_width 14 +set dac_fifo_address_width 17 set dac_data_width 128 set dac_dma_data_width 128 +## NOTE: With this configuration the #36Kb BRAM utilization is at ~57% + source $ad_hdl_dir/projects/common/zcu102/zcu102_system_bd.tcl source $ad_hdl_dir/projects/common/xilinx/dacfifo_bd.tcl diff --git a/projects/adrv9009/zcu102/system_project.tcl b/projects/adrv9009/zcu102/system_project.tcl index 1386b7106..3ec4ef1f2 100644 --- a/projects/adrv9009/zcu102/system_project.tcl +++ b/projects/adrv9009/zcu102/system_project.tcl @@ -10,5 +10,8 @@ adi_project_files adrv9009_zcu102 [list \ "$ad_hdl_dir/library/xilinx/common/ad_iobuf.v" \ "$ad_hdl_dir/projects/common/zcu102/zcu102_system_constr.xdc" ] +## To improve timing of the BRAM buffers +set_property strategy Performance_RefinePlacement [get_runs impl_1] + adi_project_run adrv9009_zcu102