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docs/regmap: Added the new ADDRESS_HIGH registers to the DMAC regmap 

Signed-off-by: Filip Gherman <Filip.Gherman@analog.com>
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Filip Gherman 2022-10-18 16:21:34 +03:00 committed by Filip Gherman
parent cef4adb81d
commit 56789abf2b
1 changed files with 67 additions and 1 deletions
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68
docs/regmap/adi_regmap_dmac.txt
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@ -9,7 +9,7 @@ ENDTITLE
REG
0x000
VERSION
Version of the peripheral. Follows semantic versioning. Current version 4.03.61.
Version of the peripheral. Follows semantic versioning. Current version 4.04.61.
ENDREG
FIELD
@ -558,4 +558,70 @@ ENDFIELD
############################################################################################
############################################################################################
REG
0x124
DEST_ADDRESS_HIGH
ENDREG
FIELD
[31:0] 0x00000000
DEST_ADDRESS_HIGH
RW
This register contains the HIGH segment of the destination address of the transfer.
This register is only valid if the DMA_AXI_ADDR_WIDTH is bigger than 32 and if DMA channel has been configured for write to memory support.
ENDFIELD
############################################################################################
############################################################################################
REG
0x125
SRC_ADDRESS_HIGH
ENDREG
FIELD
[31:0] 0x00000000
SRC_ADDRESS_HIGH
RW
This register contains the HIGH segment of the source address of the transfer.
This register is only valid if the DMA_AXI_ADDR_WIDTH is bigger than 32 and if the DMA channel has been configured for read from memory support.
ENDFIELD
############################################################################################
############################################################################################
REG
0x126
CURRENT_DEST_ADDRESS_HIGH
ENDREG
FIELD
[31:0] 0x00
CURRENT_DEST_ADDRESS_HIGH
RO
HIGH segment of the address to which the next data sample is written to.
This register is only valid if the DMA_AXI_ADDR_WIDTH is bigger than 32 and if the DMA channel has been configured for write to memory support.
ENDFIELD
############################################################################################
############################################################################################
REG
0x127
CURRENT_SRC_ADDRESS_HIGH
ENDREG
FIELD
[31:0] 0x00
CURRENT_SRC_ADDRESS_HIGH
RO
HIGH segment of the address from which the next data sample is read.
This register is only valid if the DMA_AXI_ADDR_WIDTH is bigger than 32 and if the DMA channel has been configured for read from memory support.
ENDFIELD
############################################################################################
############################################################################################